Hi,
[auto build test WARNING on phy/next]
[also build test WARNING on v4.7-rc6 next-20160708]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Rajesh-Bhagat/drivers-usb-chipidea-Add-qoriq
Hi,
[auto build test WARNING on phy/next]
[also build test WARNING on v4.7-rc6 next-20160708]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Rajesh-Bhagat/drivers-usb-chipidea-Add-qoriq
On Fri, Jul 08, 2016 at 07:35:33AM -0700, James Bottomley wrote:
> On Fri, 2016-07-08 at 02:44 -0500, Eric W. Biederman wrote:
> > Andrew Vagin writes:
> >
> > > On Wed, Jul 06, 2016 at 10:46:33AM -0500, Eric W. Biederman wrote:
> > > > "Serge E. Hallyn"
On Fri, Jul 08, 2016 at 07:35:33AM -0700, James Bottomley wrote:
> On Fri, 2016-07-08 at 02:44 -0500, Eric W. Biederman wrote:
> > Andrew Vagin writes:
> >
> > > On Wed, Jul 06, 2016 at 10:46:33AM -0500, Eric W. Biederman wrote:
> > > > "Serge E. Hallyn" writes:
> > > >
> > > > > On Wed, Jul
On Thu, Jul 07, 2016 at 09:42:32AM +0200, Peter Zijlstra wrote:
> On Thu, Jul 07, 2016 at 11:20:36AM +1200, Campbell Steven wrote:
>
> > > commit 8974189222159154c55f24ddad33e3613960521a
> > > Author: Peter Zijlstra
> > > Date: Thu Jun 16 10:50:40 2016 +0200
>
> > Since
On Thu, Jul 07, 2016 at 09:42:32AM +0200, Peter Zijlstra wrote:
> On Thu, Jul 07, 2016 at 11:20:36AM +1200, Campbell Steven wrote:
>
> > > commit 8974189222159154c55f24ddad33e3613960521a
> > > Author: Peter Zijlstra
> > > Date: Thu Jun 16 10:50:40 2016 +0200
>
> > Since these early reports
On Thu, Jul 07, 2016 at 07:39:12PM +0200, Andreas Noever wrote:
> On Tue, Jun 14, 2016 at 10:22 PM, Bjorn Helgaas wrote:
> > On Tue, Jun 14, 2016 at 09:14:27PM +0200, Andreas Noever wrote:
> >> On Tue, Jun 14, 2016 at 6:37 PM, Bjorn Helgaas wrote:
> >> >
On Thu, Jul 07, 2016 at 07:39:12PM +0200, Andreas Noever wrote:
> On Tue, Jun 14, 2016 at 10:22 PM, Bjorn Helgaas wrote:
> > On Tue, Jun 14, 2016 at 09:14:27PM +0200, Andreas Noever wrote:
> >> On Tue, Jun 14, 2016 at 6:37 PM, Bjorn Helgaas wrote:
> >> > [+cc linux-kernel]
> >> >
> >> > On Sat,
On Thu, Jul 07, 2016 at 09:45:30PM -0600, Shuah Khan wrote:
> On 07/06/2016 07:18 PM, Greg Kroah-Hartman wrote:
> > ---
> > Note, I'm on vacation this week, so I only took a few "easy" patches for
> > the stable trees, due to me not having much time to debug anything here,
> >
On Thu, Jul 07, 2016 at 09:45:30PM -0600, Shuah Khan wrote:
> On 07/06/2016 07:18 PM, Greg Kroah-Hartman wrote:
> > ---
> > Note, I'm on vacation this week, so I only took a few "easy" patches for
> > the stable trees, due to me not having much time to debug anything here,
> >
Adds qoriq platform driver for chipidea controller as well as
qoriq usb 2.0 phy driver. Also, enables chipidea driver and QorIQ
USB 2.0 PHY driver on LS1021A platform.
Rajesh Bhagat (5):
drivers: usb: chipidea: Add qoriq platform driver
usb: DT binding documentation for qoriq usb 2.0
Adds qoriq platform driver for chipidea controller as well as
qoriq usb 2.0 phy driver. Also, enables chipidea driver and QorIQ
USB 2.0 PHY driver on LS1021A platform.
Rajesh Bhagat (5):
drivers: usb: chipidea: Add qoriq platform driver
usb: DT binding documentation for qoriq usb 2.0
Describes the qoriq usb 2.0 controller driver binding, currently used
for LS1021A and LS1012A platform.
Signed-off-by: Rajesh Bhagat
---
Changes in v2:
- Adds DT binding documentation for qoriq usb 2.0 controller
- Changed the compatible string to fsl,ci-qoriq-usb2
Adds qoriq usb 2.0 phy driver support for LS1021A and LS1012A
platform.
Signed-off-by: Rajesh Bhagat
---
Changes in v2:
- Replaced Freescale with QorIQ in comments section
- Changed the compatible string to fsl,qoriq-usb2-phy and added version
- Added dependency on
Describes the qoriq usb 2.0 controller driver binding, currently used
for LS1021A and LS1012A platform.
Signed-off-by: Rajesh Bhagat
---
Changes in v2:
- Adds DT binding documentation for qoriq usb 2.0 controller
- Changed the compatible string to fsl,ci-qoriq-usb2
Adds qoriq usb 2.0 phy driver support for LS1021A and LS1012A
platform.
Signed-off-by: Rajesh Bhagat
---
Changes in v2:
- Replaced Freescale with QorIQ in comments section
- Changed the compatible string to fsl,qoriq-usb2-phy and added version
- Added dependency on ARCH_MXC/ARCH_LAYERSCAPE
This patch adds entries in dts to enable chipidea platform driver
and USB 2.0 PHY driver.
Signed-off-by: Rajesh Bhagat
---
Changes in v2:
- Reworked for latest changes
arch/arm/boot/dts/ls1021a.dtsi | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
This patch adds entries in dts to enable chipidea platform driver
and USB 2.0 PHY driver.
Signed-off-by: Rajesh Bhagat
---
Changes in v2:
- Reworked for latest changes
arch/arm/boot/dts/ls1021a.dtsi | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git
-Return type of 'qe_muram_alloc' is 'unsigned long', That Was trying to
assigned in ucc_fast_tx_virtual_fifo_base_offset and
ucc_fast_rx_virtual_fifo_base_offset. It will work on 32-bit architectures
But data can be loss on 64-bit architectures if 'qe_muram_alloc' will
return greater then MAX
-Return type of 'qe_muram_alloc' is 'unsigned long', That Was trying to
assigned in ucc_fast_tx_virtual_fifo_base_offset and
ucc_fast_rx_virtual_fifo_base_offset. It will work on 32-bit architectures
But data can be loss on 64-bit architectures if 'qe_muram_alloc' will
return greater then MAX
Adds qoriq platform driver for chipidea controller,
verfied on LS1021A and LS1012A platforms.
Signed-off-by: Rajesh Bhagat
---
Changes in v2:
- Replaced Freescale with QorIQ in comments section
- Added macros to remove hardcoding while programming registers
- Changed
Adds qoriq platform driver for chipidea controller,
verfied on LS1021A and LS1012A platforms.
Signed-off-by: Rajesh Bhagat
---
Changes in v2:
- Replaced Freescale with QorIQ in comments section
- Added macros to remove hardcoding while programming registers
- Changed the compatible string to
Describes the qoriq usb 2.0 phy driver binding, currently used
for LS1021A and LS1012A platform.
Signed-off-by: Rajesh Bhagat
---
Changes in v2:
- Adds DT binding documentation for qoriq usb 2.0 phy
- Changed the compatible string to fsl,qoriq-usb2-phy
Describes the qoriq usb 2.0 phy driver binding, currently used
for LS1021A and LS1012A platform.
Signed-off-by: Rajesh Bhagat
---
Changes in v2:
- Adds DT binding documentation for qoriq usb 2.0 phy
- Changed the compatible string to fsl,qoriq-usb2-phy
From: Vivien Didelot
Date: Wed, 6 Jul 2016 20:03:54 -0400
> The routing table of every switch in a tree is currently initialized to
> all zeros. This is an issue since 0 is a valid port number.
>
> Add a DSA_RTABLE_NONE=-1 constant to initialize the signed
From: Vivien Didelot
Date: Wed, 6 Jul 2016 20:03:54 -0400
> The routing table of every switch in a tree is currently initialized to
> all zeros. This is an issue since 0 is a valid port number.
>
> Add a DSA_RTABLE_NONE=-1 constant to initialize the signed values of the
> routing table
From: David Howells
Date: Wed, 06 Jul 2016 11:48:15 +0100
> Hi Dave,
>
> Can you pull this into net-next please?
I'll pull, but this is not how I want you to operate.
If you change stuff, you must repost the entire series. And this is
one of many reasons I want people to
From: David Howells
Date: Wed, 06 Jul 2016 11:48:15 +0100
> Hi Dave,
>
> Can you pull this into net-next please?
I'll pull, but this is not how I want you to operate.
If you change stuff, you must repost the entire series. And this is
one of many reasons I want people to keep patch sets
From: Hayes Wang
Date: Wed, 6 Jul 2016 17:03:29 +0800
> The LAN_WAKE_EN is not used to determine if the device could support
> WOL. It is used to sigal a GPIO pin when a WOL event occurs. The WOL
> still works even though it is disabled.
>
> Signed-off-by: Hayes Wang
From: Hayes Wang
Date: Wed, 6 Jul 2016 17:03:29 +0800
> The LAN_WAKE_EN is not used to determine if the device could support
> WOL. It is used to sigal a GPIO pin when a WOL event occurs. The WOL
> still works even though it is disabled.
>
> Signed-off-by: Hayes Wang
Applied.
On 2016/7/8 21:22, Lorenzo Pieralisi wrote:
On Thu, Jul 07, 2016 at 03:58:04PM +0200, Rafael J. Wysocki wrote:
[...]
Anyway let's avoid these petty arguments, I agree there must be some
sort of ARM64 ACPI maintainership for the reasons you mentioned above.
To avoid confusion on who's going
On 2016/7/8 21:22, Lorenzo Pieralisi wrote:
On Thu, Jul 07, 2016 at 03:58:04PM +0200, Rafael J. Wysocki wrote:
[...]
Anyway let's avoid these petty arguments, I agree there must be some
sort of ARM64 ACPI maintainership for the reasons you mentioned above.
To avoid confusion on who's going
From: Marcin Wojtas
Date: Wed, 6 Jul 2016 04:18:58 +0200
> From: Dmitri Epshtein
>
> Commit aebea2ba0f74 ("net: mvneta: fix Tx interrupt delay") intended to
> set coalescing threshold to a value guaranteeing interrupt generation
> per each sent packet, so
From: Marcin Wojtas
Date: Wed, 6 Jul 2016 04:18:58 +0200
> From: Dmitri Epshtein
>
> Commit aebea2ba0f74 ("net: mvneta: fix Tx interrupt delay") intended to
> set coalescing threshold to a value guaranteeing interrupt generation
> per each sent packet, so that buffers can be released with no
On Jul 8, 2016, at 11:10 PM, Al Viro wrote:
> On Fri, Jul 08, 2016 at 05:47:22PM -0400, Oleg Drokin wrote:
>
>> I wonder if people just accept that "NFS is just weird" and code in
>> workarounds,
>> where as with Lustre we promise (almost) full POSIX compliance, and also
>> came much later
>>
On Jul 8, 2016, at 11:10 PM, Al Viro wrote:
> On Fri, Jul 08, 2016 at 05:47:22PM -0400, Oleg Drokin wrote:
>
>> I wonder if people just accept that "NFS is just weird" and code in
>> workarounds,
>> where as with Lustre we promise (almost) full POSIX compliance, and also
>> came much later
>>
Dear Heiko & Balbi,
On 2016/7/8 21:29, Felipe Balbi wrote:
Hi,
Heiko Stuebner writes:
Am Donnerstag, 7. Juli 2016, 10:54:24 schrieb William Wu:
Add a quirk to configure the core to support the
UTMI+ PHY with an 8- or 16-bit interface. UTMI+ PHY
interface is hardware
Dear Heiko & Balbi,
On 2016/7/8 21:29, Felipe Balbi wrote:
Hi,
Heiko Stuebner writes:
Am Donnerstag, 7. Juli 2016, 10:54:24 schrieb William Wu:
Add a quirk to configure the core to support the
UTMI+ PHY with an 8- or 16-bit interface. UTMI+ PHY
interface is hardware property, and it's
"W. Trevor King" writes:
> On Thu, Jul 07, 2016 at 08:01:52AM -0700, James Bottomley wrote:
>> In theory, we could get nsfs to show this information as an option
>> (just add a show_options entry to the superblock ops), but the
>> problem is that although each namespace has a
On 2016年06月29日 23:27, Arnd Bergmann wrote:
On Saturday, June 25, 2016 6:37:20 PM CEST Wan Zongshun wrote:
+#define IRQ_WDTW90X900_IRQ(1)
+#define IRQ_WWDT W90X900_IRQ(2)
+#define IRQ_LVDW90X900_IRQ(3)
+#define IRQ_EXT0 W90X900_IRQ(4)
+#define
"W. Trevor King" writes:
> On Thu, Jul 07, 2016 at 08:01:52AM -0700, James Bottomley wrote:
>> In theory, we could get nsfs to show this information as an option
>> (just add a show_options entry to the superblock ops), but the
>> problem is that although each namespace has a parent user_ns,
>>
On 2016年06月29日 23:27, Arnd Bergmann wrote:
On Saturday, June 25, 2016 6:37:20 PM CEST Wan Zongshun wrote:
+#define IRQ_WDTW90X900_IRQ(1)
+#define IRQ_WWDT W90X900_IRQ(2)
+#define IRQ_LVDW90X900_IRQ(3)
+#define IRQ_EXT0 W90X900_IRQ(4)
+#define
James Bottomley writes:
> On Fri, 2016-07-08 at 18:52 -0500, Eric W. Biederman wrote:
>> James Bottomley writes:
>>
>> > On July 8, 2016 1:38:19 PM PDT, Andrew Vagin
>> > wrote:
>>
>> > > What
James Bottomley writes:
> On Fri, 2016-07-08 at 18:52 -0500, Eric W. Biederman wrote:
>> James Bottomley writes:
>>
>> > On July 8, 2016 1:38:19 PM PDT, Andrew Vagin
>> > wrote:
>>
>> > > What do you think about the idea to mount nsfs and be able to
>> > > look up any alive namespace by
On Thu, Jul 07, 2016 at 08:01:52AM -0700, James Bottomley wrote:
> In theory, we could get nsfs to show this information as an option
> (just add a show_options entry to the superblock ops), but the
> problem is that although each namespace has a parent user_ns,
> there's no way to get it without
On Thu, Jul 07, 2016 at 08:01:52AM -0700, James Bottomley wrote:
> In theory, we could get nsfs to show this information as an option
> (just add a show_options entry to the superblock ops), but the
> problem is that although each namespace has a parent user_ns,
> there's no way to get it without
On Fri, Jul 08, 2016 at 10:58:38PM -0400, Oleg Drokin wrote:
> > When more than one condition applies, we have every right to return any of
> > them. POSIX does *NOT* specify the order of checks. Never had.
>
> Out of curiosity, why does filename_create() delay EROFS then?
QoI and historical
On Fri, Jul 08, 2016 at 10:58:38PM -0400, Oleg Drokin wrote:
> > When more than one condition applies, we have every right to return any of
> > them. POSIX does *NOT* specify the order of checks. Never had.
>
> Out of curiosity, why does filename_create() delay EROFS then?
QoI and historical
From: k...@exchange.microsoft.com
Date: Tue, 5 Jul 2016 16:52:46 -0700
> From: K. Y. Srinivasan
>
> Use the new APIs for eliminating a copy on the receive path. These new APIs
> also
> help in minimizing the number of memory barriers we end up issuing (in the
> ringbuffer
From: k...@exchange.microsoft.com
Date: Tue, 5 Jul 2016 16:52:46 -0700
> From: K. Y. Srinivasan
>
> Use the new APIs for eliminating a copy on the receive path. These new APIs
> also
> help in minimizing the number of memory barriers we end up issuing (in the
> ringbuffer code) since we can
On Fri, Jul 08, 2016 at 05:47:22PM -0400, Oleg Drokin wrote:
> I wonder if people just accept that "NFS is just weird" and code in
> workarounds,
> where as with Lustre we promise (almost) full POSIX compliance, and also came
> much later
> so people are just seeing that "this does not work"
On Fri, Jul 08, 2016 at 05:47:22PM -0400, Oleg Drokin wrote:
> I wonder if people just accept that "NFS is just weird" and code in
> workarounds,
> where as with Lustre we promise (almost) full POSIX compliance, and also came
> much later
> so people are just seeing that "this does not work"
On 2016/7/7 21:58, Rafael J. Wysocki wrote:
On Thursday, July 07, 2016 02:40:23 PM Lorenzo Pieralisi wrote:
[+Sudeep]
On Thu, Jul 07, 2016 at 02:03:17PM +0200, Rafael J. Wysocki wrote:
[...]
So is this a documentation issue in which case Fu Wei can add that to
the file to explain its
On 2016/7/7 21:58, Rafael J. Wysocki wrote:
On Thursday, July 07, 2016 02:40:23 PM Lorenzo Pieralisi wrote:
[+Sudeep]
On Thu, Jul 07, 2016 at 02:03:17PM +0200, Rafael J. Wysocki wrote:
[...]
So is this a documentation issue in which case Fu Wei can add that to
the file to explain its
On Jul 8, 2016, at 10:52 PM, Al Viro wrote:
> On Fri, Jul 08, 2016 at 11:59:50AM -0400, Oleg Drokin wrote:
>
>> "If path names a symbolic link, mkdir() shall fail and set errno to
>> [EEXIST]."
>>
>> This sounds pretty straightforward to me, no?
>> Since it does not matter that we do not have
On Jul 8, 2016, at 10:52 PM, Al Viro wrote:
> On Fri, Jul 08, 2016 at 11:59:50AM -0400, Oleg Drokin wrote:
>
>> "If path names a symbolic link, mkdir() shall fail and set errno to
>> [EEXIST]."
>>
>> This sounds pretty straightforward to me, no?
>> Since it does not matter that we do not have
On Fri, Jul 08, 2016 at 11:59:50AM -0400, Oleg Drokin wrote:
> "If path names a symbolic link, mkdir() shall fail and set errno to [EEXIST]."
>
> This sounds pretty straightforward to me, no?
> Since it does not matter that we do not have write permissions here, because
> the name already
On Fri, Jul 08, 2016 at 11:59:50AM -0400, Oleg Drokin wrote:
> "If path names a symbolic link, mkdir() shall fail and set errno to [EEXIST]."
>
> This sounds pretty straightforward to me, no?
> Since it does not matter that we do not have write permissions here, because
> the name already
On Fri, 2016-07-08 at 19:22 -0700, Laura Abbott wrote:
>
> Even with the SLUB fixup I'm still seeing this blow up on my arm64
> system. This is a
> Fedora rawhide kernel + the patches
>
> [0.666700] usercopy: kernel memory exposure attempt detected from
> fc0008b4dd58 () (8 bytes)
> [
On Fri, 2016-07-08 at 19:22 -0700, Laura Abbott wrote:
>
> Even with the SLUB fixup I'm still seeing this blow up on my arm64
> system. This is a
> Fedora rawhide kernel + the patches
>
> [0.666700] usercopy: kernel memory exposure attempt detected from
> fc0008b4dd58 () (8 bytes)
> [
On Fri, 2016-07-08 at 05:08 -0700, tip-bot for Borislav Petkov wrote:
> printk: Make the printk*once() variants return a value
[]
> diff --git a/include/linux/printk.h b/include/linux/printk.h
[]
> @@ -108,11 +108,14 @@ struct va_format {
> * Dummy printk for disabled debugging statements to use
On Fri, 2016-07-08 at 05:08 -0700, tip-bot for Borislav Petkov wrote:
> printk: Make the printk*once() variants return a value
[]
> diff --git a/include/linux/printk.h b/include/linux/printk.h
[]
> @@ -108,11 +108,14 @@ struct va_format {
> * Dummy printk for disabled debugging statements to use
> > The issue I have is that the i2c device emulates several other devices
> > with existing drivers (pca953x, ds1672, at24) and those drivers don't
> > have any retry mechanism in place for a retry.
> >
> > Maybe if I converted those drivers to use regmap I could implement a
> > regmap with
On 07/08/2016 02:44 PM, Arvind Yadav wrote:
I would really suggest to read section 14 of Documentation/SubmittingPatches
and to follow the guidance it provides.
For the subject line: The subsystem/driver is still not listed,
and I am quite sure that this is not v1 of this patch.
It also does
> > The issue I have is that the i2c device emulates several other devices
> > with existing drivers (pca953x, ds1672, at24) and those drivers don't
> > have any retry mechanism in place for a retry.
> >
> > Maybe if I converted those drivers to use regmap I could implement a
> > regmap with
On 07/08/2016 02:44 PM, Arvind Yadav wrote:
I would really suggest to read section 14 of Documentation/SubmittingPatches
and to follow the guidance it provides.
For the subject line: The subsystem/driver is still not listed,
and I am quite sure that this is not v1 of this patch.
It also does
Hi Jaegeuk,
On 2016/6/9 1:24, Jaegeuk Kim wrote:
> In f2fs, we don't need to keep block plugging for NODE and DATA writes, since
> we already merged bios as much as possible.
IMO, we can not remove block plug, this is because there are still many
conditions which stops us merging r/w IOs into
Hi Jaegeuk,
On 2016/6/9 1:24, Jaegeuk Kim wrote:
> In f2fs, we don't need to keep block plugging for NODE and DATA writes, since
> we already merged bios as much as possible.
IMO, we can not remove block plug, this is because there are still many
conditions which stops us merging r/w IOs into
From: Jeremy Gebben
Allow the creation of privileged mode mappings, for stage 1 only.
Signed-off-by: Jeremy Gebben
---
drivers/iommu/io-pgtable-arm.c | 16 +++-
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git
This reverts commit d346180e70b9 ("iommu/arm-smmu: Treat all device
transactions as unprivileged") since some platforms actually make use of
privileged transactions.
Signed-off-by: Mitchel Humpherys
---
drivers/iommu/arm-smmu.c | 5 +
1 file changed, 1 insertion(+),
The newly added DMA_ATTR_PRIVILEGED_EXECUTABLE is useful for creating
mappings that are executable by privileged DMA engines. Implement it in
dma-iommu.c so that the ARM64 DMA IOMMU mapper can make use of it.
Signed-off-by: Mitchel Humpherys
---
This patch adds the DMA_ATTR_PRIVILEGED_EXECUTABLE attribute to the
DMA-mapping subsystem.
Some architectures require that writable mappings also be non-executable at
lesser-privileged levels of execution. This attribute is used to indicate
to the DMA-mapping subsystem that it should do whatever
From: Jeremy Gebben
Allow the creation of privileged mode mappings, for stage 1 only.
Signed-off-by: Jeremy Gebben
---
drivers/iommu/io-pgtable-arm.c | 16 +++-
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/drivers/iommu/io-pgtable-arm.c
This reverts commit d346180e70b9 ("iommu/arm-smmu: Treat all device
transactions as unprivileged") since some platforms actually make use of
privileged transactions.
Signed-off-by: Mitchel Humpherys
---
drivers/iommu/arm-smmu.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff
The newly added DMA_ATTR_PRIVILEGED_EXECUTABLE is useful for creating
mappings that are executable by privileged DMA engines. Implement it in
dma-iommu.c so that the ARM64 DMA IOMMU mapper can make use of it.
Signed-off-by: Mitchel Humpherys
---
arch/arm64/mm/dma-mapping.c | 6 +++---
This patch adds the DMA_ATTR_PRIVILEGED_EXECUTABLE attribute to the
DMA-mapping subsystem.
Some architectures require that writable mappings also be non-executable at
lesser-privileged levels of execution. This attribute is used to indicate
to the DMA-mapping subsystem that it should do whatever
Add the IOMMU_PRIV attribute, which is used to indicate privileged
mappings.
Signed-off-by: Mitchel Humpherys
---
include/linux/iommu.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index 664683aedcce..01c9f2667f2b
Add the IOMMU_PRIV attribute, which is used to indicate privileged
mappings.
Signed-off-by: Mitchel Humpherys
---
include/linux/iommu.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index 664683aedcce..01c9f2667f2b 100644
---
The following patch to the ARM SMMU driver:
commit d346180e70b91b3d5a1ae7e5603e65593d4622bc
Author: Robin Murphy
Date: Tue Jan 26 18:06:34 2016 +
iommu/arm-smmu: Treat all device transactions as unprivileged
started forcing all SMMU
The PL330 can perform privileged instruction fetches. This can result
in SMMU permission faults on SMMUs that implement the ARMv8 VMSA, which
specifies that mappings that are writeable at one execution level shall
not be executable at any higher-privileged level. Fix this by using the
The following patch to the ARM SMMU driver:
commit d346180e70b91b3d5a1ae7e5603e65593d4622bc
Author: Robin Murphy
Date: Tue Jan 26 18:06:34 2016 +
iommu/arm-smmu: Treat all device transactions as unprivileged
started forcing all SMMU transactions to come through as
The PL330 can perform privileged instruction fetches. This can result
in SMMU permission faults on SMMUs that implement the ARMv8 VMSA, which
specifies that mappings that are writeable at one execution level shall
not be executable at any higher-privileged level. Fix this by using the
On (06/27/16 22:50), Sergey Senozhatsky wrote:
> Messages' levels and console log level are inspected when the
> actual printing occurs, which may provoke console_unlock() and
> console_cont_flush() to waste CPU cycles on every message that
> has loglevel above the current console_loglevel.
>
>
On (06/27/16 22:50), Sergey Senozhatsky wrote:
> Messages' levels and console log level are inspected when the
> actual printing occurs, which may provoke console_unlock() and
> console_cont_flush() to waste CPU cycles on every message that
> has loglevel above the current console_loglevel.
>
>
Hi Ingo,
On 07/08/16 at 02:27pm, Ingo Molnar wrote:
>
> * Baoquan He wrote:
>
> > ACPI MADT has a 32-bit field providing lapic address at which
> > each processor can access its lapic information. MADT also contains
> > an optional entry to provide a 64-bit address to override
Hi Ingo,
On 07/08/16 at 02:27pm, Ingo Molnar wrote:
>
> * Baoquan He wrote:
>
> > ACPI MADT has a 32-bit field providing lapic address at which
> > each processor can access its lapic information. MADT also contains
> > an optional entry to provide a 64-bit address to override the 32-bit
> >
A common way of multiplexing buttons on a single input in cheap devices is
to use a resistor ladder on an ADC. This driver supports that configuration
by polling an ADC channel provided by IIO.
Signed-off-by: Alexandre Belloni
---
Changes in v2:
- removed
A common way of multiplexing buttons on a single input in cheap devices is
to use a resistor ladder on an ADC. This driver supports that configuration
by polling an ADC channel provided by IIO.
Signed-off-by: Alexandre Belloni
---
Changes in v2:
- removed dependency on COMPILE_TEST which is not
Add documentation for ADC keys
Signed-off-by: Alexandre Belloni
---
Changes in v2:
- fix title
- use keyup-threshold-mvolt and press-threshold-mvolt instead of
voltage-keyup-mvolt and voltage-mvolt.
.../devicetree/bindings/input/adc-keys.txt |
Add documentation for ADC keys
Signed-off-by: Alexandre Belloni
---
Changes in v2:
- fix title
- use keyup-threshold-mvolt and press-threshold-mvolt instead of
voltage-keyup-mvolt and voltage-mvolt.
.../devicetree/bindings/input/adc-keys.txt | 45 ++
1 file
On 07/08/2016 04:32 PM, Michael Turquette wrote:
> ---
> drivers/clk/clk.c | 10 --
> 1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
> index 820a939fb6bb..70efe4c4e0cc 100644
> --- a/drivers/clk/clk.c
> +++ b/drivers/clk/clk.c
> @@
On 07/08/2016 04:32 PM, Michael Turquette wrote:
> ---
> drivers/clk/clk.c | 10 --
> 1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
> index 820a939fb6bb..70efe4c4e0cc 100644
> --- a/drivers/clk/clk.c
> +++ b/drivers/clk/clk.c
> @@
On 07/08/2016 05:23 PM, Michael Turquette wrote:
> Quoting Jorge Ramirez (2016-07-08 14:39:50)
>> On 07/08/2016 07:14 PM, Michael Turquette wrote:
>>> Quoting Jorge Ramirez-Ortiz (2016-07-08 01:11:06)
Allow to specify the clock frequency for any given port via the
assigned-clock-rates
On 07/08/2016 05:23 PM, Michael Turquette wrote:
> Quoting Jorge Ramirez (2016-07-08 14:39:50)
>> On 07/08/2016 07:14 PM, Michael Turquette wrote:
>>> Quoting Jorge Ramirez-Ortiz (2016-07-08 01:11:06)
Allow to specify the clock frequency for any given port via the
assigned-clock-rates
On Friday, July 08, 2016 12:39:07 PM Srinivas Pandruvada wrote:
> On Fri, 2016-07-08 at 20:42 +0200, Jan Kiszka wrote:
> > If MSR_CONFIG_TDP_CONTROL is locked, we currently try to address some
> > MSR 0x8648 or so. Mask out the relevant level bits 0 and 1.
> >
> > Found while running over the
On Friday, July 08, 2016 12:39:07 PM Srinivas Pandruvada wrote:
> On Fri, 2016-07-08 at 20:42 +0200, Jan Kiszka wrote:
> > If MSR_CONFIG_TDP_CONTROL is locked, we currently try to address some
> > MSR 0x8648 or so. Mask out the relevant level bits 0 and 1.
> >
> > Found while running over the
Hi KT,
On Fri, Jul 08, 2016 at 08:12:09PM +0800, KT Liao wrote:
> Signed-off-by: KT Liao
Please make sure you add a blan line between change subject and the rest
of description. Then git send-email will compose your email properly
instead of lumping everything into one long
Hi KT,
On Fri, Jul 08, 2016 at 08:12:09PM +0800, KT Liao wrote:
> Signed-off-by: KT Liao
Please make sure you add a blan line between change subject and the rest
of description. Then git send-email will compose your email properly
instead of lumping everything into one long line subject.
> ---
Quoting Jorge Ramirez (2016-07-08 14:39:50)
> On 07/08/2016 07:14 PM, Michael Turquette wrote:
> > Quoting Jorge Ramirez-Ortiz (2016-07-08 01:11:06)
> >> Allow to specify the clock frequency for any given port via the
> >> assigned-clock-rates device tree property.
> >>
> >> Signed-off-by: Jorge
Quoting Jorge Ramirez (2016-07-08 14:39:50)
> On 07/08/2016 07:14 PM, Michael Turquette wrote:
> > Quoting Jorge Ramirez-Ortiz (2016-07-08 01:11:06)
> >> Allow to specify the clock frequency for any given port via the
> >> assigned-clock-rates device tree property.
> >>
> >> Signed-off-by: Jorge
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