Re: Driver for tango DMA engine

Marc Gonzalez writes: > Hello Mans, > > I would like to push upstream the driver you wrote for the tango > DMA engine. Could you take a look at my fixes, perhaps some/all > can be squashed into the initial patch? > > Vinod, can you take a look at this submission,

Re: Driver for tango DMA engine

Marc Gonzalez writes: > Hello Mans, > > I would like to push upstream the driver you wrote for the tango > DMA engine. Could you take a look at my fixes, perhaps some/all > can be squashed into the initial patch? > > Vinod, can you take a look at this submission, and tell me if > you spot any

Re: [PATCH 2/2] gpio: axp209: add pinctrl support

Hi Quentin, [auto build test WARNING on gpio/for-next] [also build test WARNING on v4.9-rc6 next-20161123] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Quentin-Schulz/add-support-for-AXP209

Re: [PATCH 2/2] gpio: axp209: add pinctrl support

Hi Quentin, [auto build test WARNING on gpio/for-next] [also build test WARNING on v4.9-rc6 next-20161123] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Quentin-Schulz/add-support-for-AXP209

Re: [PATCH v6 2/2] console: Add persistent scrollback buffers for all VGA consoles

On Di, 2016-11-22 at 19:31 +, Andrey Utkin wrote: > I'm not sure my emails with review of previous submission reached you, but in > them I meant to mention that there are some style nits which are easy to > eliminate. I am afraid I did not get it. I will fix these style issues in the next

Re: [PATCH v6 2/2] console: Add persistent scrollback buffers for all VGA consoles

On Di, 2016-11-22 at 19:31 +, Andrey Utkin wrote: > I'm not sure my emails with review of previous submission reached you, but in > them I meant to mention that there are some style nits which are easy to > eliminate. I am afraid I did not get it. I will fix these style issues in the next

Re: Tearing down DMA transfer setup after DMA client has finished

Mason writes: > On 23/11/2016 13:13, Måns Rullgård wrote: > >> Mason wrote: >> >>> On my platform, setting up a DMA transfer is a two-step process: >>> >>> 1) configure the "switch box" to connect a device to a memory channel >>> 2) configure the transfer details (address,

Re: Tearing down DMA transfer setup after DMA client has finished

Mason writes: > On 23/11/2016 13:13, Måns Rullgård wrote: > >> Mason wrote: >> >>> On my platform, setting up a DMA transfer is a two-step process: >>> >>> 1) configure the "switch box" to connect a device to a memory channel >>> 2) configure the transfer details (address, size, command) >>>

[PATCH v5 0/3] tpm: securityfs support for TPM 2.0 firmware event log

The TPM device driver defines ascii and binary methods for displaying the TPM 1.2 event log via securityfs files, which are needed for validating a TPM quote. The device driver for TPM 2.0 does not have similar support for displaying the TPM 2.0 event log. This patch set adds the support for

[PATCH v5 0/3] tpm: securityfs support for TPM 2.0 firmware event log

The TPM device driver defines ascii and binary methods for displaying the TPM 1.2 event log via securityfs files, which are needed for validating a TPM quote. The device driver for TPM 2.0 does not have similar support for displaying the TPM 2.0 event log. This patch set adds the support for

[PATCH v5 2/3] tpm: enhance read_log_of() to support Physical TPM event log

Physical TPMs use Open Firmware Device Tree bindings that are similar to the IBM Power virtual TPM to support event log. However, these properties store the values in different endianness for Physical and Virtual TPM. This patch fixes the endianness issue by doing appropriate conversion based on

[PATCH v5 3/3] tpm: add securityfs support for TPM 2.0 firmware event log

Unlike the device driver support for TPM 1.2, the TPM 2.0 does not support the securityfs pseudo files for displaying the firmware event log. This patch enables support for providing the TPM 2.0 event log in binary form. TPM 2.0 event log supports a crypto agile format that records multiple

[PATCH v5 2/3] tpm: enhance read_log_of() to support Physical TPM event log

Physical TPMs use Open Firmware Device Tree bindings that are similar to the IBM Power virtual TPM to support event log. However, these properties store the values in different endianness for Physical and Virtual TPM. This patch fixes the endianness issue by doing appropriate conversion based on

[PATCH v5 3/3] tpm: add securityfs support for TPM 2.0 firmware event log

Unlike the device driver support for TPM 1.2, the TPM 2.0 does not support the securityfs pseudo files for displaying the firmware event log. This patch enables support for providing the TPM 2.0 event log in binary form. TPM 2.0 event log supports a crypto agile format that records multiple

[PATCH v5 1/3] tpm: move event log init functions to tpm_eventlog_init.c

The device driver code for the event log has the init functions and TPM 1.2 parsing logic both defined in same file(tpm_eventlog.c). Since the initialization functions are common with the TPM 2.0 event log support, this patch splits tpm_eventlog.c to have only TPM 1.2 event log parsing logic and

[PATCH v5 1/3] tpm: move event log init functions to tpm_eventlog_init.c

The device driver code for the event log has the init functions and TPM 1.2 parsing logic both defined in same file(tpm_eventlog.c). Since the initialization functions are common with the TPM 2.0 event log support, this patch splits tpm_eventlog.c to have only TPM 1.2 event log parsing logic and

Re: [PATCH] drivers: net: davinci_mdio: use builtin_platform_driver

On 11/23/2016 08:45 AM, Geliang Tang wrote: Use builtin_platform_driver() helper to simplify the code. Not sure about this. We do support this driver to be a module. Signed-off-by: Geliang Tang --- drivers/net/ethernet/ti/davinci_mdio.c | 6 +- 1 file changed,

Re: [PATCH] drivers: net: davinci_mdio: use builtin_platform_driver

On 11/23/2016 08:45 AM, Geliang Tang wrote: Use builtin_platform_driver() helper to simplify the code. Not sure about this. We do support this driver to be a module. Signed-off-by: Geliang Tang --- drivers/net/ethernet/ti/davinci_mdio.c | 6 +- 1 file changed, 1 insertion(+), 5

Re: [PATCH] ARM: dts: sunxi: Enable UEXT related nodes for Olimex A20 SOM EVB

On Wed, 23 Nov 2016 09:03:50 +0100 Maxime Ripard wrote: > On Mon, Nov 21, 2016 at 05:49:11PM +0100, Emmanuel Vadot wrote: > > UEXT are Universal EXTension connector from Olimex. They embed i2c, spi > > and uart pins along power in one connector and are found on

Re: [PATCH] ARM: dts: sunxi: Enable UEXT related nodes for Olimex A20 SOM EVB

On Wed, 23 Nov 2016 09:03:50 +0100 Maxime Ripard wrote: > On Mon, Nov 21, 2016 at 05:49:11PM +0100, Emmanuel Vadot wrote: > > UEXT are Universal EXTension connector from Olimex. They embed i2c, spi > > and uart pins along power in one connector and are found on most, > > if not all, Olimex

Re: [PATCH] ARM: dts: exynos: remove the cd-gpios property for eMMC of odroid-xu3/4

On Tue, Nov 22, 2016 at 05:19:30PM +0900, Jaehoon Chung wrote: > On 11/22/2016 04:51 PM, Andrzej Hajda wrote: > > On 22.11.2016 02:24, Jaehoon Chung wrote: > >> On 11/22/2016 02:06 AM, Krzysztof Kozlowski wrote: > >>> On Mon, Nov 21, 2016 at 04:10:32PM +0900, Jaehoon Chung wrote: >

Re: [PATCH] ARM: dts: exynos: remove the cd-gpios property for eMMC of odroid-xu3/4

On Tue, Nov 22, 2016 at 05:19:30PM +0900, Jaehoon Chung wrote: > On 11/22/2016 04:51 PM, Andrzej Hajda wrote: > > On 22.11.2016 02:24, Jaehoon Chung wrote: > >> On 11/22/2016 02:06 AM, Krzysztof Kozlowski wrote: > >>> On Mon, Nov 21, 2016 at 04:10:32PM +0900, Jaehoon Chung wrote: >

Re: RFC: documentation of the autogroup feature

On Wed, 2016-11-23 at 17:05 +0100, Michael Kerrisk (man-pages) wrote: > > I don't think we need group scheduling details, there's plenty of > > documentation elsewhere for those who want theory. > > Actually, which documentation were you referring to here? Documentation/scheduler/*

Re: [PATCH 2/4] ARM: dts: exynos: specify snps,dwmac in compatible string for gmac

On Wed, Nov 23, 2016 at 03:24:51PM +0100, Niklas Cassel wrote: > From: Niklas Cassel > > devicetree binding for stmmac states: > - compatible: Should be "snps,dwmac-", "snps,dwmac" > For backwards compatibility: "st,spear600-gmac" is also supported. > > No

Re: RFC: documentation of the autogroup feature

On Wed, 2016-11-23 at 17:05 +0100, Michael Kerrisk (man-pages) wrote: > > I don't think we need group scheduling details, there's plenty of > > documentation elsewhere for those who want theory. > > Actually, which documentation were you referring to here? Documentation/scheduler/*

Re: [PATCH 2/4] ARM: dts: exynos: specify snps,dwmac in compatible string for gmac

On Wed, Nov 23, 2016 at 03:24:51PM +0100, Niklas Cassel wrote: > From: Niklas Cassel > > devicetree binding for stmmac states: > - compatible: Should be "snps,dwmac-", "snps,dwmac" > For backwards compatibility: "st,spear600-gmac" is also supported. > > No functional change intended. > >

Re: [PATCH 2/2] gpio: axp209: add pinctrl support

Hi Quentin, [auto build test ERROR on gpio/for-next] [also build test ERROR on v4.9-rc6 next-20161123] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Quentin-Schulz/add-support-for-AXP209-GPIOs

Re: [PATCH 2/2] gpio: axp209: add pinctrl support

Hi Quentin, [auto build test ERROR on gpio/for-next] [also build test ERROR on v4.9-rc6 next-20161123] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Quentin-Schulz/add-support-for-AXP209-GPIOs

Re: Enabling peer to peer device transactions for PCIe devices

Hey, On 22/11/16 11:59 AM, Serguei Sagalovitch wrote: > - How well we will be able to handle case when we need to "move"/"evict" >memory/data to the new location so CPU pointer should point to the > new physical location/address > (and may be not in PCI device memory at all)? IMO any

Re: Enabling peer to peer device transactions for PCIe devices

Hey, On 22/11/16 11:59 AM, Serguei Sagalovitch wrote: > - How well we will be able to handle case when we need to "move"/"evict" >memory/data to the new location so CPU pointer should point to the > new physical location/address > (and may be not in PCI device memory at all)? IMO any

Re: [PATCH 1/4] serial: core: Add LED trigger support

On Wed, Nov 23, 2016 at 11:01:03AM +0100, Sascha Hauer wrote: > With this patch the serial core provides LED triggers for RX and TX. > > As the serial core layer does not know when the hardware actually sends > or receives characters, this needs help from the UART drivers. The > LED triggers are

Re: [PATCH 1/4] serial: core: Add LED trigger support

On Wed, Nov 23, 2016 at 11:01:03AM +0100, Sascha Hauer wrote: > With this patch the serial core provides LED triggers for RX and TX. > > As the serial core layer does not know when the hardware actually sends > or receives characters, this needs help from the UART drivers. The > LED triggers are

Re: RFC: documentation of the autogroup feature

On Wed, 2016-11-23 at 17:04 +0100, Michael Kerrisk (man-pages) wrote: > > > In what circumstances does a process get moved back to the root > > > task group? > > > > Userspace actions, tool or human fingers. > > Could you say a little more please. What Kernel-user-space > APIs/system

Re: RFC: documentation of the autogroup feature

On Wed, 2016-11-23 at 17:04 +0100, Michael Kerrisk (man-pages) wrote: > > > In what circumstances does a process get moved back to the root > > > task group? > > > > Userspace actions, tool or human fingers. > > Could you say a little more please. What Kernel-user-space > APIs/system

Re: [PATCH V5 3/3] ARM64 LPC: LPC driver implementation on Hip06

On Wednesday, November 23, 2016 3:22:33 PM CET Gabriele Paoloni wrote: > From: Arnd Bergmann [mailto:a...@arndb.de] > > On Friday, November 18, 2016 5:03:11 PM CET Gabriele Paoloni wrote: > > > I think this is effectively what we are doing so far with patch 2/3. > > > The problem with this patch

Re: [PATCH V5 3/3] ARM64 LPC: LPC driver implementation on Hip06

On Wednesday, November 23, 2016 3:22:33 PM CET Gabriele Paoloni wrote: > From: Arnd Bergmann [mailto:a...@arndb.de] > > On Friday, November 18, 2016 5:03:11 PM CET Gabriele Paoloni wrote: > > > I think this is effectively what we are doing so far with patch 2/3. > > > The problem with this patch

[PATCH v2 0/3] x86: SVM: add additional SVM NPF error and use HW GPA

This patch series is taken from SEV RFC series [1]. These patches do not depend on the SEV feature and can be reviewed and merged on their own. - Add support for additional SVM NFP error codes - Add kvm_fast_pio_in support - Use the hardware provided GPA instead of page walk [1]

[PATCH v2 0/3] x86: SVM: add additional SVM NPF error and use HW GPA

This patch series is taken from SEV RFC series [1]. These patches do not depend on the SEV feature and can be reviewed and merged on their own. - Add support for additional SVM NFP error codes - Add kvm_fast_pio_in support - Use the hardware provided GPA instead of page walk [1]

Re: Enabling peer to peer device transactions for PCIe devices

On 11/22/2016 11:49 PM, Daniel Vetter wrote: > Yes, agreed. My idea with exposing vram sections using numa nodes wasn't > to reuse all the existing allocation policies directly, those won't work. > So at boot-up your default numa policy would exclude any vram nodes. > > But I think (as an -mm

Re: Enabling peer to peer device transactions for PCIe devices

On 11/22/2016 11:49 PM, Daniel Vetter wrote: > Yes, agreed. My idea with exposing vram sections using numa nodes wasn't > to reuse all the existing allocation policies directly, those won't work. > So at boot-up your default numa policy would exclude any vram nodes. > > But I think (as an -mm

[PATCH v2 3/3] kvm: svm: Use the hardware provided GPA instead of page walk

From: Tom Lendacky When a guest causes a NPF which requires emulation, KVM sometimes walks the guest page tables to translate the GVA to a GPA. This is unnecessary most of the time on AMD hardware since the hardware provides the GPA in EXITINFO2. The only exception

[PATCH 4/6] Fixup tangox_dma_sbox_map

--- drivers/dma/tango-dma.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/dma/tango-dma.c b/drivers/dma/tango-dma.c index 6a32d234ffb0..5250c053a7b9 100644 --- a/drivers/dma/tango-dma.c +++ b/drivers/dma/tango-dma.c @@ -108,11 +108,11 @@ static struct

[PATCH v2 3/3] kvm: svm: Use the hardware provided GPA instead of page walk

From: Tom Lendacky When a guest causes a NPF which requires emulation, KVM sometimes walks the guest page tables to translate the GVA to a GPA. This is unnecessary most of the time on AMD hardware since the hardware provides the GPA in EXITINFO2. The only exception cases involve string

[PATCH 4/6] Fixup tangox_dma_sbox_map

--- drivers/dma/tango-dma.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/dma/tango-dma.c b/drivers/dma/tango-dma.c index 6a32d234ffb0..5250c053a7b9 100644 --- a/drivers/dma/tango-dma.c +++ b/drivers/dma/tango-dma.c @@ -108,11 +108,11 @@ static struct

[PATCH v2 1/3] kvm: svm: Add support for additional SVM NPF error codes

From: Tom Lendacky AMD hardware adds two additional bits to aid in nested page fault handling. Bit 32 - NPF occurred while translating the guest's final physical address Bit 33 - NPF occurred while translating the guest page tables The guest page tables fault indicator

Re: [PATCH 1/7] add binding for stm32 multifunctions timer driver

2016-11-23 10:21 GMT+01:00 Lee Jones : > On Wed, 23 Nov 2016, Benjamin Gaignard wrote: > >> 2016-11-22 17:52 GMT+01:00 Lee Jones : >> > On Tue, 22 Nov 2016, Benjamin Gaignard wrote: >> > >> >> Add bindings information for stm32 timer MFD >> >> >> >>

[PATCH v2 1/3] kvm: svm: Add support for additional SVM NPF error codes

From: Tom Lendacky AMD hardware adds two additional bits to aid in nested page fault handling. Bit 32 - NPF occurred while translating the guest's final physical address Bit 33 - NPF occurred while translating the guest page tables The guest page tables fault indicator can be used as an aid

Re: [PATCH 1/7] add binding for stm32 multifunctions timer driver

2016-11-23 10:21 GMT+01:00 Lee Jones : > On Wed, 23 Nov 2016, Benjamin Gaignard wrote: > >> 2016-11-22 17:52 GMT+01:00 Lee Jones : >> > On Tue, 22 Nov 2016, Benjamin Gaignard wrote: >> > >> >> Add bindings information for stm32 timer MFD >> >> >> >> Signed-off-by: Benjamin Gaignard >> >> --- >>

Re: [PATCH] Add support for disabling Intel PT trace in ftrace

> This will create unexplainable gaps in the trace, at least we should > output RECORD_AUX when this happens, maybe add a flag for "had to stop > the trace for reasons external to perf". I don't think it's unexplainable. After all the user set it up this way. It's the same as with an address

Re: [PATCH] Add support for disabling Intel PT trace in ftrace

> This will create unexplainable gaps in the trace, at least we should > output RECORD_AUX when this happens, maybe add a flag for "had to stop > the trace for reasons external to perf". I don't think it's unexplainable. After all the user set it up this way. It's the same as with an address

[PATCH 6/6] Relax write accesses

--- drivers/dma/tango-dma.c | 8 +++- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/dma/tango-dma.c b/drivers/dma/tango-dma.c index 24e124942a2f..7049b7c3c0db 100644 --- a/drivers/dma/tango-dma.c +++ b/drivers/dma/tango-dma.c @@ -153,11 +153,9 @@ static void

Re: [PATCH] tpm: use get_unaligned_be32 unaligned buffer access.

On Wed, Nov 23, 2016 at 01:04:54PM +0200, Tomas Winkler wrote: > Use get_unaligned_be32 as b32_to_cpu doesn't work correctly on > all platforms for unaligned access. > > The fix doesn't cover all the cases as also some cast > structures have members on unaligned addresses. I think this is a good

[PATCH 6/6] Relax write accesses

--- drivers/dma/tango-dma.c | 8 +++- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/dma/tango-dma.c b/drivers/dma/tango-dma.c index 24e124942a2f..7049b7c3c0db 100644 --- a/drivers/dma/tango-dma.c +++ b/drivers/dma/tango-dma.c @@ -153,11 +153,9 @@ static void

Re: [PATCH] tpm: use get_unaligned_be32 unaligned buffer access.

On Wed, Nov 23, 2016 at 01:04:54PM +0200, Tomas Winkler wrote: > Use get_unaligned_be32 as b32_to_cpu doesn't work correctly on > all platforms for unaligned access. > > The fix doesn't cover all the cases as also some cast > structures have members on unaligned addresses. I think this is a good

[PATCH 1/6] dmaengine: Import tango MBUS driver

From: Mans Rullgard https://github.com/mansr/linux-tangox/blob/master/drivers/dma/tangox-dma.c --- drivers/dma/Kconfig | 6 + drivers/dma/Makefile| 1 + drivers/dma/tango-dma.c | 583 3 files changed, 590 insertions(+)

[PATCH 1/6] dmaengine: Import tango MBUS driver

From: Mans Rullgard https://github.com/mansr/linux-tangox/blob/master/drivers/dma/tangox-dma.c --- drivers/dma/Kconfig | 6 + drivers/dma/Makefile| 1 + drivers/dma/tango-dma.c | 583 3 files changed, 590 insertions(+) create mode

[PATCH 5/6] Fixup tangox_dma_reset

--- drivers/dma/tango-dma.c | 16 ++-- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/drivers/dma/tango-dma.c b/drivers/dma/tango-dma.c index 5250c053a7b9..24e124942a2f 100644 --- a/drivers/dma/tango-dma.c +++ b/drivers/dma/tango-dma.c @@ -414,18 +414,14 @@ static void

[PATCH 5/6] Fixup tangox_dma_reset

--- drivers/dma/tango-dma.c | 16 ++-- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/drivers/dma/tango-dma.c b/drivers/dma/tango-dma.c index 5250c053a7b9..24e124942a2f 100644 --- a/drivers/dma/tango-dma.c +++ b/drivers/dma/tango-dma.c @@ -414,18 +414,14 @@ static void

Re: [PATCH v2] x86/mce: Include the PPIN in machine check records when it is available

On Wed, Nov 23, 2016 at 08:42:40AM -0800, Tony Luck wrote: > If the BIOS writes 10b, then PPIN is disabled and will remain so until > the processor is reset. Bit 1 is a one way trip, it can be set by s/w, > but not cleared again. 10b means bit 1, i.e., Enable_PPIN is set, right? Which actually

Driver for tango DMA engine

Hello Mans, I would like to push upstream the driver you wrote for the tango DMA engine. Could you take a look at my fixes, perhaps some/all can be squashed into the initial patch? Vinod, can you take a look at this submission, and tell me if you spot any issue? Regards. Mans Rullgard (1):

Re: [PATCH v2] x86/mce: Include the PPIN in machine check records when it is available

On Wed, Nov 23, 2016 at 08:42:40AM -0800, Tony Luck wrote: > If the BIOS writes 10b, then PPIN is disabled and will remain so until > the processor is reset. Bit 1 is a one way trip, it can be set by s/w, > but not cleared again. 10b means bit 1, i.e., Enable_PPIN is set, right? Which actually

Driver for tango DMA engine

Hello Mans, I would like to push upstream the driver you wrote for the tango DMA engine. Could you take a look at my fixes, perhaps some/all can be squashed into the initial patch? Vinod, can you take a look at this submission, and tell me if you spot any issue? Regards. Mans Rullgard (1):

[PATCH 3/6] Fixup for tango4 support

--- drivers/dma/tango-dma.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/dma/tango-dma.c b/drivers/dma/tango-dma.c index 494b046d1d3d..6a32d234ffb0 100644 --- a/drivers/dma/tango-dma.c +++ b/drivers/dma/tango-dma.c @@ -156,7 +156,7 @@ static int

[PATCH 2/6] Provide names for SBOX register offsets

--- drivers/dma/tango-dma.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/dma/tango-dma.c b/drivers/dma/tango-dma.c index 53f6c7f61599..494b046d1d3d 100644 --- a/drivers/dma/tango-dma.c +++ b/drivers/dma/tango-dma.c @@ -38,6 +38,11 @@ #define DMA_MODE_DOUBLE2 #define

[PATCH 3/6] Fixup for tango4 support

--- drivers/dma/tango-dma.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/dma/tango-dma.c b/drivers/dma/tango-dma.c index 494b046d1d3d..6a32d234ffb0 100644 --- a/drivers/dma/tango-dma.c +++ b/drivers/dma/tango-dma.c @@ -156,7 +156,7 @@ static int

[PATCH 2/6] Provide names for SBOX register offsets

--- drivers/dma/tango-dma.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/dma/tango-dma.c b/drivers/dma/tango-dma.c index 53f6c7f61599..494b046d1d3d 100644 --- a/drivers/dma/tango-dma.c +++ b/drivers/dma/tango-dma.c @@ -38,6 +38,11 @@ #define DMA_MODE_DOUBLE2 #define

[PATCH 14/18] perf sched timehist: Introduce timehist command

From: David Ahern 'perf sched timehist' provides an analysis of scheduling events. Example usage: perf sched record -- sleep 1 perf sched timehist By default it shows the individual schedule events, including the wait time (time between sched-out and next sched-in

[PATCH 14/18] perf sched timehist: Introduce timehist command

From: David Ahern 'perf sched timehist' provides an analysis of scheduling events. Example usage: perf sched record -- sleep 1 perf sched timehist By default it shows the individual schedule events, including the wait time (time between sched-out and next sched-in events for the task),

[PATCH 17/18] perf sched timehist: Add call graph options

From: David Ahern If callchains were recorded they are appended to the line with a default stack depth of 5: 1.874569 [0011] gcc[31949] 0.014 0.000 1.148 wait_for_completion_killable <- do_fork <- sys_vfork <- stub_vfork <- __vfork 1.874591 [0010] gcc[31951]

[PATCH 17/18] perf sched timehist: Add call graph options

From: David Ahern If callchains were recorded they are appended to the line with a default stack depth of 5: 1.874569 [0011] gcc[31949] 0.014 0.000 1.148 wait_for_completion_killable <- do_fork <- sys_vfork <- stub_vfork <- __vfork 1.874591 [0010] gcc[31951] 0.000 0.000 0.024

[PATCH 10/18] perf c2c report: Display total HITMs on default

From: Jiri Olsa Currently we display the cacheline list sorted on remote HITMs by default. The problem is that they might not be always counted and 'perf c2c report' displays an empty output. Thus it's more convenient to display and sort the cacheline list based on the total

[PATCH 10/18] perf c2c report: Display total HITMs on default

From: Jiri Olsa Currently we display the cacheline list sorted on remote HITMs by default. The problem is that they might not be always counted and 'perf c2c report' displays an empty output. Thus it's more convenient to display and sort the cacheline list based on the total of HITMs and have

[PATCH 16/18] perf sched timehist: Add -w/--wakeups option

From: David Ahern The -w option is to show wakeup events with timehist. $ perf sched timehist -w timecpu task name b/n time sch delay run time [tid/pid](msec) (msec) (msec) ---

[PATCH 16/18] perf sched timehist: Add -w/--wakeups option

From: David Ahern The -w option is to show wakeup events with timehist. $ perf sched timehist -w timecpu task name b/n time sch delay run time [tid/pid](msec) (msec) (msec) --- --

[PATCH 04/18] tools lib traceevent: Use USECS_PER_SEC instead of hardcoded number

From: Steven Rostedt Instead of using 100, use the define in time64.h instead. Also remove the the duplicate defines for NSECS_PER_SEC. Signed-off-by: Steven Rostedt Acked-by: Namhyung Kim Cc: Andrew Morton

[PATCH 15/18] perf sched timehist: Add summary options

From: David Ahern The -s/--summary option is to show process runtime statistics. And the -S/--with-summary option is to show the stats with the normal output. $ perf sched timehist -s Runtime summary comm parent sched-in run-time

[PATCH 04/18] tools lib traceevent: Use USECS_PER_SEC instead of hardcoded number

From: Steven Rostedt Instead of using 100, use the define in time64.h instead. Also remove the the duplicate defines for NSECS_PER_SEC. Signed-off-by: Steven Rostedt Acked-by: Namhyung Kim Cc: Andrew Morton Cc: Jiri Olsa Link:

[PATCH 15/18] perf sched timehist: Add summary options

From: David Ahern The -s/--summary option is to show process runtime statistics. And the -S/--with-summary option is to show the stats with the normal output. $ perf sched timehist -s Runtime summary comm parent sched-in run-timemin-run avg-run

Re: Problem with USB driver using two devices

On Wed, Nov 23, 2016 at 05:17:35PM +0100, Wolfgang Wilhelm wrote: > Thankyou very much for the really fast answer. > > I don't get any error messages and I can communicate with > the driver for the second device via ioctrl and write functions, > i.e. write registers and read registers via the

Re: Problem with USB driver using two devices

On Wed, Nov 23, 2016 at 05:17:35PM +0100, Wolfgang Wilhelm wrote: > Thankyou very much for the really fast answer. > > I don't get any error messages and I can communicate with > the driver for the second device via ioctrl and write functions, > i.e. write registers and read registers via the

[PATCH 18/18] perf sched timehist: Add -V/--cpu-visual option

From: David Ahern The -V option provides a visual aid for sched switches by cpu: $ perf sched timehist -V timecpu 0123456789abc task name b/n time sch delay run time [tid/pid](msec)

[PATCH 07/18] perf c2c report: Setup browser after opening perf.data

From: Jiri Olsa Because of the early browser switch we won't get possible error messages, as it will clear the screen right after showing the message, e.g.: Before: $ sudo perf c2c report -d lcl $ After: $ sudo perf c2c report -d lcl File perf.data not owned by

Re: [RFC PATCH] mm: page_alloc: High-order per-cpu page allocator

On Wed, Nov 23, 2016 at 04:37:06PM +0100, Vlastimil Babka wrote: > On 11/21/2016 04:55 PM, Mel Gorman wrote: > > ... > > > hackbench was also tested with both socket and pipes and both processes > > and threads and the results are interesting in terms of how variability > > is imapcted > > > >

[PATCH] mpi: Fix NULL ptr dereference in mpi_powm()

Parsing certain certificates (see [1]) triggers NULL-ptr dereference in mpi_powm(): BUG: unable to handle kernel NULL pointer dereference at (null) IP: [] mpi_powm+0xf8/0x10b0 ... Call Trace: [] _rsa_dec.isra.2+0x66/0x80 [] rsa_verify+0x103/0x1c0

[PATCH 18/18] perf sched timehist: Add -V/--cpu-visual option

From: David Ahern The -V option provides a visual aid for sched switches by cpu: $ perf sched timehist -V timecpu 0123456789abc task name b/n time sch delay run time [tid/pid](msec) (msec)

[PATCH 07/18] perf c2c report: Setup browser after opening perf.data

From: Jiri Olsa Because of the early browser switch we won't get possible error messages, as it will clear the screen right after showing the message, e.g.: Before: $ sudo perf c2c report -d lcl $ After: $ sudo perf c2c report -d lcl File perf.data not owned by current user or

Re: [RFC PATCH] mm: page_alloc: High-order per-cpu page allocator

On Wed, Nov 23, 2016 at 04:37:06PM +0100, Vlastimil Babka wrote: > On 11/21/2016 04:55 PM, Mel Gorman wrote: > > ... > > > hackbench was also tested with both socket and pipes and both processes > > and threads and the results are interesting in terms of how variability > > is imapcted > > > >

[PATCH] mpi: Fix NULL ptr dereference in mpi_powm()

Parsing certain certificates (see [1]) triggers NULL-ptr dereference in mpi_powm(): BUG: unable to handle kernel NULL pointer dereference at (null) IP: [] mpi_powm+0xf8/0x10b0 ... Call Trace: [] _rsa_dec.isra.2+0x66/0x80 [] rsa_verify+0x103/0x1c0

[PATCH 11/18] perf c2c: Support cascading options

From: Jiri Olsa Adding support for cascading options added by Namhyung in: commit 369a2478973a ("tools lib subcmd: Support cascading options") This way the report and record command share options with with c2c command and can save some option duplicates. For now it's the

Re: [PATCH 0/4] HID: fix few non-DMA capable HID transfers

On Mon, 21 Nov 2016, Benjamin Tissoires wrote: > While playing a little bit with the CP2112 (for hid-rmi I must confess), I > realized that kernel v4.9 now enforces DMA capable buffers when calling > hid_hw_raw_request(). Kernel v4.8 works fine (but gives a stacktrace the first > time), but v4.9

[PATCH 12/18] perf symbols: Print symbol offsets conditionally

From: Namhyung Kim The __symbol__fprintf_symname_offs() always shows symbol offsets. So there's no difference between 'perf script -F ip,sym' and 'perf script -F ip,sym,symoff'. I don't think it's a desired behavior.. Signed-off-by: Namhyung Kim

[PATCH 12/18] perf symbols: Print symbol offsets conditionally

From: Namhyung Kim The __symbol__fprintf_symname_offs() always shows symbol offsets. So there's no difference between 'perf script -F ip,sym' and 'perf script -F ip,sym,symoff'. I don't think it's a desired behavior.. Signed-off-by: Namhyung Kim Acked-by: Ingo Molnar Acked-by: Jiri Olsa

[PATCH 11/18] perf c2c: Support cascading options

From: Jiri Olsa Adding support for cascading options added by Namhyung in: commit 369a2478973a ("tools lib subcmd: Support cascading options") This way the report and record command share options with with c2c command and can save some option duplicates. For now it's the 'v' option.

Re: [PATCH 0/4] HID: fix few non-DMA capable HID transfers

On Mon, 21 Nov 2016, Benjamin Tissoires wrote: > While playing a little bit with the CP2112 (for hid-rmi I must confess), I > realized that kernel v4.9 now enforces DMA capable buffers when calling > hid_hw_raw_request(). Kernel v4.8 works fine (but gives a stacktrace the first > time), but v4.9

Re: [PATCH v2] x86/mce: Include the PPIN in machine check records when it is available

If the BIOS writes 10b, then PPIN is disabled and will remain so until the processor is reset. Bit 1 is a one way trip, it can be set by s/w, but not cleared again. All this is because of the huge stink last time Intel tried to add a serial number to CPUs a decade and a half ago. The lockout

Re: [PATCH v2] x86/mce: Include the PPIN in machine check records when it is available

If the BIOS writes 10b, then PPIN is disabled and will remain so until the processor is reset. Bit 1 is a one way trip, it can be set by s/w, but not cleared again. All this is because of the huge stink last time Intel tried to add a serial number to CPUs a decade and a half ago. The lockout

Re: [PATCHv12 3/3] usb: typec: add driver for Intel Whiskey Cove PMIC USB Type-C PHY

On Tue, Nov 22, 2016 at 04:11:47PM +0200, Heikki Krogerus wrote: > This adds driver for the USB Type-C PHY on Intel WhiskeyCove > PMIC which is available on some of the Intel Broxton SoC > based platforms. > > Signed-off-by: Heikki Krogerus LGTM, though I don't

Re: [PATCHv12 3/3] usb: typec: add driver for Intel Whiskey Cove PMIC USB Type-C PHY

On Tue, Nov 22, 2016 at 04:11:47PM +0200, Heikki Krogerus wrote: > This adds driver for the USB Type-C PHY on Intel WhiskeyCove > PMIC which is available on some of the Intel Broxton SoC > based platforms. > > Signed-off-by: Heikki Krogerus LGTM, though I don't really know anything about the

[PATCH 06/18] perf tools: Show event fd in debug output

From: Jiri Olsa It is useful for debug to see file descriptors for each event. Before: $ perf stat -vvv -e cycles,cache-misses ls ... sys_perf_event_open: pid 12146 cpu -1 group_fd -1 flags 0x8 ... sys_perf_event_open: pid 12146 cpu -1 group_fd 3 flags 0x8

[PATCH 13/18] perf evsel: Support printing callchains with arrows

From: Namhyung Kim The EVSEL__PRINT_CALLCHAIN_ARROW options can be used to print callchains with arrows for readability. It will be used 'sched timehist' command like below: __schedule <- schedule <- schedule_timeout <- rcu_gp_kthread <- kthread <- ret_from_fork

<    5   6   7   8   9   10   11   12   13   14   >