RE: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

Ansis Atteka [mailto:aatt...@nicira.com] > Sent: Tuesday, January 03, 2017 8:41 AM [...] > Hayes, in your iperf reproduction environment did you > 1) connect sender and receiver directly with an Ethernet cable? > 2) use iperf's TCP mode instead of UDP mode, because I believe that > with UDP mode

RE: [PATCH net 1/2] r8152: fix the sw rx checksum is unavailable

Ansis Atteka [mailto:aatt...@nicira.com] > Sent: Tuesday, January 03, 2017 8:41 AM [...] > Hayes, in your iperf reproduction environment did you > 1) connect sender and receiver directly with an Ethernet cable? > 2) use iperf's TCP mode instead of UDP mode, because I believe that > with UDP mode

Re: Linux 4.4.41

diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt index 092ee9fbaf2b..df8ab4fc240a 100644 --- a/Documentation/virtual/kvm/api.txt +++ b/Documentation/virtual/kvm/api.txt @@ -1991,6 +1991,7 @@ registers, find a list below: PPC | KVM_REG_PPC_TM_VSCR |

Re: Linux 4.8.17

diff --git a/Documentation/sphinx/rstFlatTable.py b/Documentation/sphinx/rstFlatTable.py index 26db852e3c74..99163598f18b 100644 --- a/Documentation/sphinx/rstFlatTable.py +++ b/Documentation/sphinx/rstFlatTable.py @@ -151,6 +151,11 @@ class ListTableBuilder(object): def

Re: Linux 4.4.41

diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt index 092ee9fbaf2b..df8ab4fc240a 100644 --- a/Documentation/virtual/kvm/api.txt +++ b/Documentation/virtual/kvm/api.txt @@ -1991,6 +1991,7 @@ registers, find a list below: PPC | KVM_REG_PPC_TM_VSCR |

Re: Linux 4.8.17

diff --git a/Documentation/sphinx/rstFlatTable.py b/Documentation/sphinx/rstFlatTable.py index 26db852e3c74..99163598f18b 100644 --- a/Documentation/sphinx/rstFlatTable.py +++ b/Documentation/sphinx/rstFlatTable.py @@ -151,6 +151,11 @@ class ListTableBuilder(object): def

Linux 4.4.41

I'm announcing the release of the 4.4.41 kernel. All users of the 4.4 kernel series must upgrade. The updated 4.4.y git tree can be found at: git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git linux-4.4.y and can be browsed at the normal kernel.org git web browser:

Linux 4.4.41

I'm announcing the release of the 4.4.41 kernel. All users of the 4.4 kernel series must upgrade. The updated 4.4.y git tree can be found at: git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git linux-4.4.y and can be browsed at the normal kernel.org git web browser:

Linux 4.8.17

I'm announcing the release of the 4.8.17 kernel. -- NOTE, this is the LAST 4.8-stable kernel to be released. This tree is now end-of-life. Please move to the 4.9-stable tree. If there are any reasons preventing you from doing this, please let me know. -- All

Linux 4.8.17

I'm announcing the release of the 4.8.17 kernel. -- NOTE, this is the LAST 4.8-stable kernel to be released. This tree is now end-of-life. Please move to the 4.9-stable tree. If there are any reasons preventing you from doing this, please let me know. -- All

Re: Linux 4.9.2

diff --git a/Documentation/sphinx/rstFlatTable.py b/Documentation/sphinx/rstFlatTable.py index 55f275793028..25feb0d35e7a 100755 --- a/Documentation/sphinx/rstFlatTable.py +++ b/Documentation/sphinx/rstFlatTable.py @@ -157,6 +157,11 @@ class ListTableBuilder(object): def

Re: Linux 4.9.2

diff --git a/Documentation/sphinx/rstFlatTable.py b/Documentation/sphinx/rstFlatTable.py index 55f275793028..25feb0d35e7a 100755 --- a/Documentation/sphinx/rstFlatTable.py +++ b/Documentation/sphinx/rstFlatTable.py @@ -157,6 +157,11 @@ class ListTableBuilder(object): def

Linux 4.9.2

I'm announcing the release of the 4.9.2 kernel. All users of the 4.9 kernel series must upgrade. The updated 4.9.y git tree can be found at: git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git linux-4.9.y and can be browsed at the normal kernel.org git web browser:

Linux 4.9.2

I'm announcing the release of the 4.9.2 kernel. All users of the 4.9 kernel series must upgrade. The updated 4.9.y git tree can be found at: git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git linux-4.9.y and can be browsed at the normal kernel.org git web browser:

[PATCH v2] ipv4: make tcp_notsent_lowat sysctl knob behave as true unsigned int

> cat /proc/sys/net/ipv4/tcp_notsent_lowat -1 > echo 4294967295 > /proc/sys/net/ipv4/tcp_notsent_lowat -bash: echo: write error: Invalid argument > echo -2147483648 > /proc/sys/net/ipv4/tcp_notsent_lowat > cat /proc/sys/net/ipv4/tcp_notsent_lowat -2147483648 but in documentation we have

[PATCH v2] ipv4: make tcp_notsent_lowat sysctl knob behave as true unsigned int

> cat /proc/sys/net/ipv4/tcp_notsent_lowat -1 > echo 4294967295 > /proc/sys/net/ipv4/tcp_notsent_lowat -bash: echo: write error: Invalid argument > echo -2147483648 > /proc/sys/net/ipv4/tcp_notsent_lowat > cat /proc/sys/net/ipv4/tcp_notsent_lowat -2147483648 but in documentation we have

Re: [alsa-devel] [PATCH] Revert "ASoC: core: replace aux_comp_list to component_dev_list"

>>> I run into same issue and posted a patch: >> >>> "ASoC: Fix binding and probing of auxiliary components". >> >> Which I applied so I guess things are fine now without the revert? I'm >> still working through backlog from the holidays so didn't check >> properly yet. > > This fixes the

Re: [alsa-devel] [PATCH] Revert "ASoC: core: replace aux_comp_list to component_dev_list"

>>> I run into same issue and posted a patch: >> >>> "ASoC: Fix binding and probing of auxiliary components". >> >> Which I applied so I guess things are fine now without the revert? I'm >> still working through backlog from the holidays so didn't check >> properly yet. > > This fixes the

Re: [PATCH v7 3/4] drm/panel: Add support for S6E3HA2 panel driver on TM2 board

On 06.01.2017 09:36, Inki Dae wrote: > > 2017년 01월 06일 17:18에 Andi Shyti 이(가) 쓴 글: >> Hi Inki, >> >> Thanks for the reply, but... >> > +static const struct drm_display_mode default_mode = { > + .clock = 222372, > + .hdisplay = 1440, > + .hsync_start = 1440 + 1, > + .hsync_end =

Re: [PATCH v7 3/4] drm/panel: Add support for S6E3HA2 panel driver on TM2 board

On 06.01.2017 09:36, Inki Dae wrote: > > 2017년 01월 06일 17:18에 Andi Shyti 이(가) 쓴 글: >> Hi Inki, >> >> Thanks for the reply, but... >> > +static const struct drm_display_mode default_mode = { > + .clock = 222372, > + .hdisplay = 1440, > + .hsync_start = 1440 + 1, > + .hsync_end =

Re: eMMC boot problem: switch to bus width 8 ddr failed

On 2017/1/7 0:07, Clemens Gruber wrote: On Fri, Jan 06, 2017 at 10:54:35AM +0800, Shawn Lin wrote: On 2017/1/6 8:41, Clemens Gruber wrote: Hi, with the current mainline 4.10-rc2 kernel, I can no longer boot from the eMMC on my i.MX6Q board. Details: The eMMC is a Micron MTFC4GACAJCN-1M WT

Re: eMMC boot problem: switch to bus width 8 ddr failed

On 2017/1/7 0:07, Clemens Gruber wrote: On Fri, Jan 06, 2017 at 10:54:35AM +0800, Shawn Lin wrote: On 2017/1/6 8:41, Clemens Gruber wrote: Hi, with the current mainline 4.10-rc2 kernel, I can no longer boot from the eMMC on my i.MX6Q board. Details: The eMMC is a Micron MTFC4GACAJCN-1M WT

Re: [PATCH net-next v2] net: dsa: make "label" property optional for dsa2

Mon, Jan 09, 2017 at 12:15:52AM CET, vivien.dide...@savoirfairelinux.com wrote: >In the new DTS bindings for DSA (dsa2), the "ethernet" and "link" >phandles are respectively mandatory and exclusive to CPU port and DSA >link device tree nodes. > >Simplify dsa2.c a bit by checking the presence of

Re: [PATCH net-next v2] net: dsa: make "label" property optional for dsa2

Mon, Jan 09, 2017 at 12:15:52AM CET, vivien.dide...@savoirfairelinux.com wrote: >In the new DTS bindings for DSA (dsa2), the "ethernet" and "link" >phandles are respectively mandatory and exclusive to CPU port and DSA >link device tree nodes. > >Simplify dsa2.c a bit by checking the presence of

Re: [PATCH v6 3/3] arm64: dts: exynos: Add tm2 touchkey node

Hi Jaechul, I tested this patch on TM2 board. It is well working with platform. Reviewed-by: Chanwoo Choi Tested-by: Chanwoo Choi Best Regards, Chanwoo Choi On 2017년 01월 09일 16:22, Jaechul Lee wrote: > Add DT node support for TM2 touchkey device.

Re: [PATCH v6 3/3] arm64: dts: exynos: Add tm2 touchkey node

Hi Jaechul, I tested this patch on TM2 board. It is well working with platform. Reviewed-by: Chanwoo Choi Tested-by: Chanwoo Choi Best Regards, Chanwoo Choi On 2017년 01월 09일 16:22, Jaechul Lee wrote: > Add DT node support for TM2 touchkey device. > > Signed-off-by: Beomho Seo >

[PATCH v2] arm64: do not set dma masks that device connection can't handle

It is possible that device is capable of 64-bit DMA addresses, and device driver tries to set wide DMA mask, but bridge or bus used to connect device to the system can't handle wide addresses. With swiotlb, memory above 4G still can be used by drivers for streaming DMA, but *dev->mask and

[PATCH v2] arm64: do not set dma masks that device connection can't handle

It is possible that device is capable of 64-bit DMA addresses, and device driver tries to set wide DMA mask, but bridge or bus used to connect device to the system can't handle wide addresses. With swiotlb, memory above 4G still can be used by drivers for streaming DMA, but *dev->mask and

Re: [PATCH v6 2/3] input: tm2-touchkey: Add touchkey driver support for TM2

Hi Jaechul, Looks good to me. I tested this patch on TM2 board. It is well working. Reviewed-by: Chanwoo Choi Tested-by: Chanwoo Choi Best Regards, Chanwoo Choi On 2017년 01월 09일 16:22, Jaechul Lee wrote: > This patch adds support for the TM2

Re: [PATCH v6 2/3] input: tm2-touchkey: Add touchkey driver support for TM2

Hi Jaechul, Looks good to me. I tested this patch on TM2 board. It is well working. Reviewed-by: Chanwoo Choi Tested-by: Chanwoo Choi Best Regards, Chanwoo Choi On 2017년 01월 09일 16:22, Jaechul Lee wrote: > This patch adds support for the TM2 touch key and led > functionality. > > The driver

[PATCH v6 3/3] arm64: dts: exynos: Add tm2 touchkey node

Add DT node support for TM2 touchkey device. Signed-off-by: Beomho Seo Signed-off-by: Jaechul Lee Signed-off-by: Andi Shyti Reviewed-by: Javier Martinez Canillas ---

[PATCH v6 3/3] arm64: dts: exynos: Add tm2 touchkey node

Add DT node support for TM2 touchkey device. Signed-off-by: Beomho Seo Signed-off-by: Jaechul Lee Signed-off-by: Andi Shyti Reviewed-by: Javier Martinez Canillas --- arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 13 + 1 file changed, 13 insertions(+) diff --git

[PATCH v6 1/3] input: Add support for the tm2 touchkey device driver

This patch adds the binding description of the tm2 touchkey device driver. Signed-off-by: Jaechul Lee Reviewed-by: Javier Martinez Canillas Reviewed-by: Andi Shyti Reviewed-by: Chanwoo Choi

[PATCH v6 2/3] input: tm2-touchkey: Add touchkey driver support for TM2

This patch adds support for the TM2 touch key and led functionality. The driver interfaces with userspace through an input device and reports KEY_PHONE and KEY_BACK event types. LED brightness can be controlled by "/sys/class/leds/tm2-touchkey/brightness". Signed-off-by: Beomho Seo

[PATCH v6 0/3] Add touch key driver support for TM2

Hi, This patch is last three patch from https://lkml.org/lkml/2017/1/6/277. because 1 and 2 patches have already been merged by Krzysztof. This patchset adds support for the tm2 touchkey device. The driver has been ported from Tizen Kernel, originally written by Beomho. I ported it to the

[PATCH v6 1/3] input: Add support for the tm2 touchkey device driver

This patch adds the binding description of the tm2 touchkey device driver. Signed-off-by: Jaechul Lee Reviewed-by: Javier Martinez Canillas Reviewed-by: Andi Shyti Reviewed-by: Chanwoo Choi Acked-by: Rob Herring Acked-by: Krzysztof Kozlowski --- .../bindings/input/cypress,tm2-touchkey.txt

[PATCH v6 2/3] input: tm2-touchkey: Add touchkey driver support for TM2

This patch adds support for the TM2 touch key and led functionality. The driver interfaces with userspace through an input device and reports KEY_PHONE and KEY_BACK event types. LED brightness can be controlled by "/sys/class/leds/tm2-touchkey/brightness". Signed-off-by: Beomho Seo

[PATCH v6 0/3] Add touch key driver support for TM2

Hi, This patch is last three patch from https://lkml.org/lkml/2017/1/6/277. because 1 and 2 patches have already been merged by Krzysztof. This patchset adds support for the tm2 touchkey device. The driver has been ported from Tizen Kernel, originally written by Beomho. I ported it to the

Re: [PATCH 2/3] xen: modify xenstore watch event interface

On 06/01/17 22:57, Boris Ostrovsky wrote: > On 01/06/2017 10:05 AM, Juergen Gross wrote: >> Today a Xenstore watch event is delivered via a callback function >> declared as: >> >> void (*callback)(struct xenbus_watch *, >> const char **vec, unsigned int len); >> >> As all watch

Re: [PATCH 2/3] xen: modify xenstore watch event interface

On 06/01/17 22:57, Boris Ostrovsky wrote: > On 01/06/2017 10:05 AM, Juergen Gross wrote: >> Today a Xenstore watch event is delivered via a callback function >> declared as: >> >> void (*callback)(struct xenbus_watch *, >> const char **vec, unsigned int len); >> >> As all watch

Re: eMMC boot problem: switch to bus width 8 ddr failed

On 2017/1/6 23:56, Clemens Gruber wrote: On Fri, Jan 06, 2017 at 10:33:49AM +0800, Shawn Lin wrote: On 2017/1/6 8:41, Clemens Gruber wrote: Hi, with the current mainline 4.10-rc2 kernel, I can no longer boot from the eMMC on my i.MX6Q board. Details: The eMMC is a Micron MTFC4GACAJCN-1M WT

Re: eMMC boot problem: switch to bus width 8 ddr failed

On 2017/1/6 23:56, Clemens Gruber wrote: On Fri, Jan 06, 2017 at 10:33:49AM +0800, Shawn Lin wrote: On 2017/1/6 8:41, Clemens Gruber wrote: Hi, with the current mainline 4.10-rc2 kernel, I can no longer boot from the eMMC on my i.MX6Q board. Details: The eMMC is a Micron MTFC4GACAJCN-1M WT

Re: [PATCH 1/3] xen: clean up xenbus internal headers

On 06/01/17 21:52, Boris Ostrovsky wrote: > On 01/06/2017 10:05 AM, Juergen Gross wrote: >> The xenbus driver has an awful mixture of internal and global visible >> headers: some of the internal used only stuff is defined in the >> global header include/xen/xenbus.h while some stuff defined in

Re: [PATCH 1/3] xen: clean up xenbus internal headers

On 06/01/17 21:52, Boris Ostrovsky wrote: > On 01/06/2017 10:05 AM, Juergen Gross wrote: >> The xenbus driver has an awful mixture of internal and global visible >> headers: some of the internal used only stuff is defined in the >> global header include/xen/xenbus.h while some stuff defined in

[PATCH v2] arm64: dts: rockchip: add "rockchip,grf" property for RK3399 PMUCRU/CRU

The structure rockchip_clk_provider needs to refer the GRF regmap in somewhere, if the CRU node has not "rockchip,grf" property, calling syscon_regmap_lookup_by_phandle will return an invalid GRF regmap, and the MUXGRF type clock will be not supported. Therefore, we need to add them.

[PATCH v2] arm64: dts: rockchip: add "rockchip,grf" property for RK3399 PMUCRU/CRU

The structure rockchip_clk_provider needs to refer the GRF regmap in somewhere, if the CRU node has not "rockchip,grf" property, calling syscon_regmap_lookup_by_phandle will return an invalid GRF regmap, and the MUXGRF type clock will be not supported. Therefore, we need to add them.

Re: [PATCH] arm64: do not set dma masks that device connection can't handle

>> +if (mask > dev->archdata.parent_dma_mask) >> +mask = dev->archdata.parent_dma_mask; >> + >> + > >One empty line is enough... Ok >> +/* >> + * Whatever the parent bus can set. A device must not set >> + * a DMA mask larger than this. >> + */ >> +

Re: [PATCH] arm64: do not set dma masks that device connection can't handle

>> +if (mask > dev->archdata.parent_dma_mask) >> +mask = dev->archdata.parent_dma_mask; >> + >> + > >One empty line is enough... Ok >> +/* >> + * Whatever the parent bus can set. A device must not set >> + * a DMA mask larger than this. >> + */ >> +

Re: [PATCH] ACPI/IORT: Fix iort_node_get_id() mapping entries indexing

On 2017/1/9 14:34, Hanjun Guo wrote: Hi Sinan, On 2017/1/8 5:09, Sinan Kaya wrote: On 1/5/2017 1:29 PM, Lorenzo Pieralisi wrote: Commit 618f535a6062 ("ACPI/IORT: Add single mapping function") introduced a function (iort_node_get_id()) to retrieve ids for IORT named components.

Re: [PATCH] ACPI/IORT: Fix iort_node_get_id() mapping entries indexing

On 2017/1/9 14:34, Hanjun Guo wrote: Hi Sinan, On 2017/1/8 5:09, Sinan Kaya wrote: On 1/5/2017 1:29 PM, Lorenzo Pieralisi wrote: Commit 618f535a6062 ("ACPI/IORT: Add single mapping function") introduced a function (iort_node_get_id()) to retrieve ids for IORT named components.

[tip:efi/urgent] x86/efi: Don't allocate memmap through memblock after mm_init()

Commit-ID: 20b1e22d01a4b0b11d3a1066e9feb04be38607ec Gitweb: http://git.kernel.org/tip/20b1e22d01a4b0b11d3a1066e9feb04be38607ec Author: Nicolai Stange AuthorDate: Thu, 5 Jan 2017 13:51:29 +0100 Committer: Ingo Molnar CommitDate: Sat, 7 Jan 2017

[tip:efi/urgent] x86/efi: Don't allocate memmap through memblock after mm_init()

Commit-ID: 20b1e22d01a4b0b11d3a1066e9feb04be38607ec Gitweb: http://git.kernel.org/tip/20b1e22d01a4b0b11d3a1066e9feb04be38607ec Author: Nicolai Stange AuthorDate: Thu, 5 Jan 2017 13:51:29 +0100 Committer: Ingo Molnar CommitDate: Sat, 7 Jan 2017 08:58:07 +0100 x86/efi: Don't allocate

[tip:perf/urgent] perf/x86/intel/uncore: Fix hardcoded socket 0 assumption in the Haswell init code

Commit-ID: fa37361e291bfe528872b9aef5c8644a3fc7ff20 Gitweb: http://git.kernel.org/tip/fa37361e291bfe528872b9aef5c8644a3fc7ff20 Author: Prarit Bhargava AuthorDate: Thu, 5 Jan 2017 10:09:25 -0500 Committer: Ingo Molnar CommitDate: Sat, 7 Jan 2017

[tip:perf/urgent] perf/x86/intel/uncore: Fix hardcoded socket 0 assumption in the Haswell init code

Commit-ID: fa37361e291bfe528872b9aef5c8644a3fc7ff20 Gitweb: http://git.kernel.org/tip/fa37361e291bfe528872b9aef5c8644a3fc7ff20 Author: Prarit Bhargava AuthorDate: Thu, 5 Jan 2017 10:09:25 -0500 Committer: Ingo Molnar CommitDate: Sat, 7 Jan 2017 08:54:38 +0100 perf/x86/intel/uncore:

[RFC 01/55] arm64: Add missing TCR hw defines

From: Christoffer Dall Some bits of the TCR weren't defined and since we're about to use these in KVM, add these defines. Signed-off-by: Christoffer Dall Signed-off-by: Jintack Lim ---

Re: [PATCH v4] mmc: dw_mmc: force setup bus if active slots exist

On 2017/1/9 13:41, Jaehoon Chung wrote: On 01/09/2017 12:39 PM, Ziyuan wrote: On 01/05/2017 03:34 PM, Shawn Lin wrote: On 2017/1/5 15:23, Ziyuan Xu wrote: It's necessary to setup bus if any slots are present. - update clock after ctrl reset - if the host has genpd node, we can guarantee the

[RFC 03/55] KVM: arm64: Add KVM nesting feature

From: Christoffer Dall Set the initial exception level of the guest to EL2 if nested virtualization feature is enabled. Signed-off-by: Christoffer Dall Signed-off-by: Jintack Lim ---

[RFC 02/55] KVM: arm64: Add nesting config option

From: Christoffer Dall Add an option that allows nested hypervisor support. Signed-off-by: Christoffer Dall Signed-off-by: Jintack Lim --- arch/arm64/kvm/Kconfig | 6 ++ 1 file changed, 6 insertions(+)

[RFC 10/55] KVM: arm64: Synchronize EL1 system registers on virtual EL2 entry and exit

From: Christoffer Dall When running in virtual EL2 we use the shadow EL1 systerm register array for the save/restore process, so that hardware and especially the memory subsystem behaves as code written for EL2 expects while really running in EL1. This works great

[RFC 01/55] arm64: Add missing TCR hw defines

From: Christoffer Dall Some bits of the TCR weren't defined and since we're about to use these in KVM, add these defines. Signed-off-by: Christoffer Dall Signed-off-by: Jintack Lim --- arch/arm64/include/asm/pgtable-hwdef.h | 6 ++ 1 file changed, 6 insertions(+) diff --git

Re: [PATCH v4] mmc: dw_mmc: force setup bus if active slots exist

On 2017/1/9 13:41, Jaehoon Chung wrote: On 01/09/2017 12:39 PM, Ziyuan wrote: On 01/05/2017 03:34 PM, Shawn Lin wrote: On 2017/1/5 15:23, Ziyuan Xu wrote: It's necessary to setup bus if any slots are present. - update clock after ctrl reset - if the host has genpd node, we can guarantee the

[RFC 03/55] KVM: arm64: Add KVM nesting feature

From: Christoffer Dall Set the initial exception level of the guest to EL2 if nested virtualization feature is enabled. Signed-off-by: Christoffer Dall Signed-off-by: Jintack Lim --- arch/arm64/include/asm/kvm_host.h | 2 +- arch/arm64/include/uapi/asm/kvm.h | 1 + arch/arm64/kvm/reset.c

[RFC 02/55] KVM: arm64: Add nesting config option

From: Christoffer Dall Add an option that allows nested hypervisor support. Signed-off-by: Christoffer Dall Signed-off-by: Jintack Lim --- arch/arm64/kvm/Kconfig | 6 ++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/kvm/Kconfig b/arch/arm64/kvm/Kconfig index 6eaf12c..37263ff

[RFC 10/55] KVM: arm64: Synchronize EL1 system registers on virtual EL2 entry and exit

From: Christoffer Dall When running in virtual EL2 we use the shadow EL1 systerm register array for the save/restore process, so that hardware and especially the memory subsystem behaves as code written for EL2 expects while really running in EL1. This works great for EL1 system register

[RFC 05/55] KVM: arm64: Add vcpu_mode_el2 primitive to support nesting

From: Christoffer Dall When running a nested hypervisor we occasionally have to figure out if the mode we are switching into is the virtual EL2 mode or a regular EL0/1 mode. Signed-off-by: Christoffer Dall Signed-off-by: Jintack Lim

[RFC 04/55] KVM: arm64: Allow userspace to set PSR_MODE_EL2x

From: Christoffer Dall We were not allowing userspace to set a more privileged mode for the VCPU than EL1, but now that we support nesting with a virtual EL2 mode, do allow this! Signed-off-by: Christoffer Dall Signed-off-by: Jintack

[RFC 00/55] Nested Virtualization on KVM/ARM

Nested virtualization is the ability to run a virtual machine inside another virtual machine. In other words, it???s about running a hypervisor (the guest hypervisor) on top of another hypervisor (the host hypervisor). This series supports nested virtualization on arm64. ARM recently announced an

[RFC 05/55] KVM: arm64: Add vcpu_mode_el2 primitive to support nesting

From: Christoffer Dall When running a nested hypervisor we occasionally have to figure out if the mode we are switching into is the virtual EL2 mode or a regular EL0/1 mode. Signed-off-by: Christoffer Dall Signed-off-by: Jintack Lim --- arch/arm/include/asm/kvm_emulate.h | 6 ++

[RFC 04/55] KVM: arm64: Allow userspace to set PSR_MODE_EL2x

From: Christoffer Dall We were not allowing userspace to set a more privileged mode for the VCPU than EL1, but now that we support nesting with a virtual EL2 mode, do allow this! Signed-off-by: Christoffer Dall Signed-off-by: Jintack Lim --- arch/arm64/kvm/guest.c | 2 ++ 1 file changed, 2

[RFC 00/55] Nested Virtualization on KVM/ARM

Nested virtualization is the ability to run a virtual machine inside another virtual machine. In other words, it???s about running a hypervisor (the guest hypervisor) on top of another hypervisor (the host hypervisor). This series supports nested virtualization on arm64. ARM recently announced an

[RFC 09/55] KVM: arm64: Set shadow EL1 registers for virtual EL2 execution

From: Christoffer Dall When entering virtual EL2, we need to reflect virtual EL2 register states to corresponding shadow EL1 registers. We can simply copy them if their formats are identical. Otherwise, we need to convert EL2 register state to EL1 register state.

[RFC 09/55] KVM: arm64: Set shadow EL1 registers for virtual EL2 execution

From: Christoffer Dall When entering virtual EL2, we need to reflect virtual EL2 register states to corresponding shadow EL1 registers. We can simply copy them if their formats are identical. Otherwise, we need to convert EL2 register state to EL1 register state. Signed-off-by: Christoffer

[RFC 11/55] KVM: arm64: Emulate taking an exception to the guest hypervisor

Emulate taking an exception to the guest hypervisor running in the virtual EL2 as described in ARM ARM AArch64.TakeException(). Signed-off-by: Jintack Lim --- arch/arm/include/asm/kvm_emulate.h | 14 arch/arm64/include/asm/kvm_emulate.h | 19 +++

[RFC 13/55] KVM: arm64: Handle eret instruction traps

When HCR.NV bit is set, eret instruction execution in the guest hypervisor will trap with EC code 0x1A. Let ELR_EL2 and SPSR_EL2 state from the guest's perspective be restored to the hardware on the next guest entry. Signed-off-by: Jintack Lim ---

[RFC 16/55] KVM: arm64: Forward VM reg traps to the guest hypervisor

Forward virtual memory register traps to the guest hypervisor if it has set corresponding bits to the virtual HCR_EL2. Signed-off-by: Jintack Lim --- arch/arm64/kvm/sys_regs.c | 20 1 file changed, 20 insertions(+) diff --git

[RFC 11/55] KVM: arm64: Emulate taking an exception to the guest hypervisor

Emulate taking an exception to the guest hypervisor running in the virtual EL2 as described in ARM ARM AArch64.TakeException(). Signed-off-by: Jintack Lim --- arch/arm/include/asm/kvm_emulate.h | 14 arch/arm64/include/asm/kvm_emulate.h | 19 +++ arch/arm64/kvm/Makefile

[RFC 13/55] KVM: arm64: Handle eret instruction traps

When HCR.NV bit is set, eret instruction execution in the guest hypervisor will trap with EC code 0x1A. Let ELR_EL2 and SPSR_EL2 state from the guest's perspective be restored to the hardware on the next guest entry. Signed-off-by: Jintack Lim --- arch/arm64/include/asm/esr.h | 1 +

[RFC 16/55] KVM: arm64: Forward VM reg traps to the guest hypervisor

Forward virtual memory register traps to the guest hypervisor if it has set corresponding bits to the virtual HCR_EL2. Signed-off-by: Jintack Lim --- arch/arm64/kvm/sys_regs.c | 20 1 file changed, 20 insertions(+) diff --git a/arch/arm64/kvm/sys_regs.c

[RFC 15/55] KVM: arm64: Trap EL1 VM register accesses in virtual EL2

From: Christoffer Dall When running in virtual EL2 mode, we actually run the hardware in EL1 and therefore have to use the EL1 registers to ensure correct operation. By setting the HCR.TVM and HCR.TVRM we ensure that the virtual EL2 mode doesn't shoot itself in the

[RFC 20/55] KVM: arm64: Forward CPACR_EL1 traps to the guest hypervisor

Forward CPACR_EL1 traps to the guest hypervisor if it has configured the virtual CPTR_EL2 to do so. Signed-off-by: Jintack Lim --- arch/arm64/kvm/sys_regs.c | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c

[RFC 17/55] KVM: arm64: Trap SPSR_EL1, ELR_EL1 and VBAR_EL1 in virtual EL2

For the same reason we trap virtual memory register accesses in virtual EL2, we need to trap SPSR_EL1, ELR_EL1 and VBAR_EL1 accesses. ARM v8.3 introduces the HCR_EL2.NV1 bit to be able to trap on those register accesses in EL1. Do not set this bit until the whole nesting support is complete.

[RFC 18/55] KVM: arm64: Forward traps due to HCR_EL2.NV1 bit to the guest hypervisor

Forward ELR_EL1, SPSR_EL1 and VBAR_EL1 traps to the guest hypervisor if it has set the NV1 bit to the virtual HCR_EL2. The guest hypervisor would set this NV1 bit to run a hypervisor in its VM (i.e. another level of nested hypervisor). Signed-off-by: Jintack Lim ---

[RFC 19/55] KVM: arm64: Trap CPACR_EL1 access in virtual EL2

For the same reason we trap virtual memory register accesses in virtual EL2, we trap CPACR_EL1 access too. Basically, we don't want the guest hypervisor to access the real CPACR_EL1, which is used to emulate virtual EL2. Instead, we want it to access virtual CPACR_EL1 which is used to run software

[RFC 17/55] KVM: arm64: Trap SPSR_EL1, ELR_EL1 and VBAR_EL1 in virtual EL2

For the same reason we trap virtual memory register accesses in virtual EL2, we need to trap SPSR_EL1, ELR_EL1 and VBAR_EL1 accesses. ARM v8.3 introduces the HCR_EL2.NV1 bit to be able to trap on those register accesses in EL1. Do not set this bit until the whole nesting support is complete.

[RFC 18/55] KVM: arm64: Forward traps due to HCR_EL2.NV1 bit to the guest hypervisor

Forward ELR_EL1, SPSR_EL1 and VBAR_EL1 traps to the guest hypervisor if it has set the NV1 bit to the virtual HCR_EL2. The guest hypervisor would set this NV1 bit to run a hypervisor in its VM (i.e. another level of nested hypervisor). Signed-off-by: Jintack Lim ---

[RFC 19/55] KVM: arm64: Trap CPACR_EL1 access in virtual EL2

For the same reason we trap virtual memory register accesses in virtual EL2, we trap CPACR_EL1 access too. Basically, we don't want the guest hypervisor to access the real CPACR_EL1, which is used to emulate virtual EL2. Instead, we want it to access virtual CPACR_EL1 which is used to run software

[RFC 15/55] KVM: arm64: Trap EL1 VM register accesses in virtual EL2

From: Christoffer Dall When running in virtual EL2 mode, we actually run the hardware in EL1 and therefore have to use the EL1 registers to ensure correct operation. By setting the HCR.TVM and HCR.TVRM we ensure that the virtual EL2 mode doesn't shoot itself in the foot when setting up what it

[RFC 20/55] KVM: arm64: Forward CPACR_EL1 traps to the guest hypervisor

Forward CPACR_EL1 traps to the guest hypervisor if it has configured the virtual CPTR_EL2 to do so. Signed-off-by: Jintack Lim --- arch/arm64/kvm/sys_regs.c | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 321ecbc..e66f40d

[RFC 31/55] KVM: arm/arm64: Inject maintenance interrupts to the guest hypervisor

From: Christoffer Dall If we exit a nested VM with a pending maintenance interrupt from the GIC, then we need to forward this to the guest hypervisor so that it can re-sync the appropriate LRs and sample level triggered interrupts again. Signed-off-by: Christoffer

[RFC 22/55] KVM: arm64: Handle PSCI call from the guest

VMs used to execute hvc #0 for the psci call. However, when we come to provide virtual EL2 to the VM, the host OS inside the VM also calls kvm_call_hyp which is also hvc #0. So, it's hard to differentiate between them from the host hypervisor's point of view. So, let the VM execute smc for the

[RFC 31/55] KVM: arm/arm64: Inject maintenance interrupts to the guest hypervisor

From: Christoffer Dall If we exit a nested VM with a pending maintenance interrupt from the GIC, then we need to forward this to the guest hypervisor so that it can re-sync the appropriate LRs and sample level triggered interrupts again. Signed-off-by: Christoffer Dall Signed-off-by: Jintack

[RFC 22/55] KVM: arm64: Handle PSCI call from the guest

VMs used to execute hvc #0 for the psci call. However, when we come to provide virtual EL2 to the VM, the host OS inside the VM also calls kvm_call_hyp which is also hvc #0. So, it's hard to differentiate between them from the host hypervisor's point of view. So, let the VM execute smc for the

[RFC 21/55] KVM: arm64: Forward HVC instruction to the guest hypervisor

Forward exceptions due to hvc instruction to the guest hypervisor. Signed-off-by: Jintack Lim --- arch/arm64/include/asm/kvm_nested.h | 5 + arch/arm64/kvm/Makefile | 1 + arch/arm64/kvm/handle_exit.c| 11 +++

Re: [PATCH v11 3/3] fpga: Add support for Lattice iCE40 FPGAs

Hi Joel, [auto build test WARNING on next-20170106] [also build test WARNING on v4.10-rc3] [cannot apply to linus/master linux/master robh/for-next v4.9-rc8 v4.9-rc7 v4.9-rc6] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url:

[RFC 21/55] KVM: arm64: Forward HVC instruction to the guest hypervisor

Forward exceptions due to hvc instruction to the guest hypervisor. Signed-off-by: Jintack Lim --- arch/arm64/include/asm/kvm_nested.h | 5 + arch/arm64/kvm/Makefile | 1 + arch/arm64/kvm/handle_exit.c| 11 +++ arch/arm64/kvm/handle_exit_nested.c | 27

Re: [PATCH v11 3/3] fpga: Add support for Lattice iCE40 FPGAs

Hi Joel, [auto build test WARNING on next-20170106] [also build test WARNING on v4.10-rc3] [cannot apply to linus/master linux/master robh/for-next v4.9-rc8 v4.9-rc7 v4.9-rc6] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url:

[RFC 35/55] KVM: arm/arm64: Support mmu for the virtual EL2 execution

From: Christoffer Dall When running a guest hypervisor in virtual EL2, the translation context has to be separate from the rest of the system, including the guest EL1/0 translation regime, so we allocate a separate VMID for this mode. Considering that we have two

[RFC 34/55] KVM: arm/arm64: Abstract stage-2 MMU state into a separate structure

From: Christoffer Dall Abstract stage-2 MMU state into a separate structure and change all callers referring to page tables, VMIDs, and the VTTBR to use this new indirection. This is about to become very handy when using shadow stage-2 page tables. Signed-off-by:

[RFC 37/55] KVM: arm64: Setup vttbr_el2 on each VM entry

From: Christoffer Dall Now that the vttbr value will be different depending on the VM's exception level, we set it on each VM entry. We only have one mmu instance at this point, but there will be multiple of them when we run nested VMs. Signed-off-by: Christoffer

BUG: 4.10 i915 drm display noise regression - bisected to a6a7cc4b7

Hello all, I'm experiencing display noise in the form of 8x1 pixel bars spuriously appearing in random locations. This doesn't happen on 4.9, the machine is an X61s, a Core2Duo 1.8Ghz w/XGA via LVDS. I was able to bisect the issue to a6a7cc4b7: commit a6a7cc4b7db6deaeca11cdd38844ea147a354c7a

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