---
sound/soc/sunxi/sun4i-codec.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/sound/soc/sunxi/sun4i-codec.c b/sound/soc/sunxi/sun4i-codec.c
index c47ffd5..564df33 100644
--- a/sound/soc/sunxi/sun4i-codec.c
+++ b/sound/soc/sunxi/sun4i-codec.c
@@ -107,6 +107,7 @@
#define
---
sound/soc/sunxi/sun4i-codec.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/sound/soc/sunxi/sun4i-codec.c b/sound/soc/sunxi/sun4i-codec.c
index c47ffd5..564df33 100644
--- a/sound/soc/sunxi/sun4i-codec.c
+++ b/sound/soc/sunxi/sun4i-codec.c
@@ -107,6 +107,7 @@
#define
---
sound/soc/sunxi/sun4i-codec.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/sound/soc/sunxi/sun4i-codec.c b/sound/soc/sunxi/sun4i-codec.c
index 65a4685..a596249 100644
--- a/sound/soc/sunxi/sun4i-codec.c
+++ b/sound/soc/sunxi/sun4i-codec.c
@@ -675,6 +675,7 @@ static
---
sound/soc/sunxi/sun4i-codec.c | 50 +++
1 file changed, 50 insertions(+)
diff --git a/sound/soc/sunxi/sun4i-codec.c b/sound/soc/sunxi/sun4i-codec.c
index 085a603..65a4685 100644
--- a/sound/soc/sunxi/sun4i-codec.c
+++ b/sound/soc/sunxi/sun4i-codec.c
@@
---
sound/soc/sunxi/sun4i-codec.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/sound/soc/sunxi/sun4i-codec.c b/sound/soc/sunxi/sun4i-codec.c
index 65a4685..a596249 100644
--- a/sound/soc/sunxi/sun4i-codec.c
+++ b/sound/soc/sunxi/sun4i-codec.c
@@ -675,6 +675,7 @@ static
---
sound/soc/sunxi/sun4i-codec.c | 50 +++
1 file changed, 50 insertions(+)
diff --git a/sound/soc/sunxi/sun4i-codec.c b/sound/soc/sunxi/sun4i-codec.c
index 085a603..65a4685 100644
--- a/sound/soc/sunxi/sun4i-codec.c
+++ b/sound/soc/sunxi/sun4i-codec.c
@@
---
sound/soc/sunxi/sun4i-codec.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/sound/soc/sunxi/sun4i-codec.c b/sound/soc/sunxi/sun4i-codec.c
index 564df33..bcd665d 100644
--- a/sound/soc/sunxi/sun4i-codec.c
+++ b/sound/soc/sunxi/sun4i-codec.c
@@ -67,6 +67,8 @@
#define
---
sound/soc/sunxi/sun4i-codec.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/sound/soc/sunxi/sun4i-codec.c b/sound/soc/sunxi/sun4i-codec.c
index 564df33..bcd665d 100644
--- a/sound/soc/sunxi/sun4i-codec.c
+++ b/sound/soc/sunxi/sun4i-codec.c
@@ -67,6 +67,8 @@
#define
---
sound/soc/sunxi/sun4i-codec.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/sound/soc/sunxi/sun4i-codec.c b/sound/soc/sunxi/sun4i-codec.c
index 55687f9..5b6f100 100644
--- a/sound/soc/sunxi/sun4i-codec.c
+++ b/sound/soc/sunxi/sun4i-codec.c
@@ -64,6 +64,7 @@
#define
---
sound/soc/sunxi/sun4i-codec.c | 24
1 file changed, 24 insertions(+)
diff --git a/sound/soc/sunxi/sun4i-codec.c b/sound/soc/sunxi/sun4i-codec.c
index bcd665d..085a603 100644
--- a/sound/soc/sunxi/sun4i-codec.c
+++ b/sound/soc/sunxi/sun4i-codec.c
@@ -110,6 +110,7 @@
---
sound/soc/sunxi/sun4i-codec.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/sound/soc/sunxi/sun4i-codec.c b/sound/soc/sunxi/sun4i-codec.c
index 55687f9..5b6f100 100644
--- a/sound/soc/sunxi/sun4i-codec.c
+++ b/sound/soc/sunxi/sun4i-codec.c
@@ -64,6 +64,7 @@
#define
---
sound/soc/sunxi/sun4i-codec.c | 24
1 file changed, 24 insertions(+)
diff --git a/sound/soc/sunxi/sun4i-codec.c b/sound/soc/sunxi/sun4i-codec.c
index bcd665d..085a603 100644
--- a/sound/soc/sunxi/sun4i-codec.c
+++ b/sound/soc/sunxi/sun4i-codec.c
@@ -110,6 +110,7 @@
---
sound/soc/sunxi/sun4i-codec.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/sound/soc/sunxi/sun4i-codec.c b/sound/soc/sunxi/sun4i-codec.c
index f703293..49b9cd1 100644
--- a/sound/soc/sunxi/sun4i-codec.c
+++ b/sound/soc/sunxi/sun4i-codec.c
@@ -64,6 +64,7 @@
#define
---
sound/soc/sunxi/sun4i-codec.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/sound/soc/sunxi/sun4i-codec.c b/sound/soc/sunxi/sun4i-codec.c
index f703293..49b9cd1 100644
--- a/sound/soc/sunxi/sun4i-codec.c
+++ b/sound/soc/sunxi/sun4i-codec.c
@@ -64,6 +64,7 @@
#define
---
sound/soc/sunxi/sun4i-codec.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/sound/soc/sunxi/sun4i-codec.c b/sound/soc/sunxi/sun4i-codec.c
index 3718137..55687f9 100644
--- a/sound/soc/sunxi/sun4i-codec.c
+++ b/sound/soc/sunxi/sun4i-codec.c
@@ -68,6 +68,10 @@
#define
---
sound/soc/sunxi/sun4i-codec.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/sound/soc/sunxi/sun4i-codec.c b/sound/soc/sunxi/sun4i-codec.c
index 5b6f100..234ded2 100644
--- a/sound/soc/sunxi/sun4i-codec.c
+++ b/sound/soc/sunxi/sun4i-codec.c
@@ -702,6 +702,9 @@ static const struct
---
sound/soc/sunxi/sun4i-codec.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/sound/soc/sunxi/sun4i-codec.c b/sound/soc/sunxi/sun4i-codec.c
index 1500699..f703293 100644
--- a/sound/soc/sunxi/sun4i-codec.c
+++ b/sound/soc/sunxi/sun4i-codec.c
@@ -711,6 +711,8 @@ static const
This patchset adds some mixer controls to sun4i-codec.
It also adds a mux for the capture source and the PGA for the MIC2 preamp.
Where possible, it uses SOC_DAPM_DOUBLE in order to cut down on the number
of distinct controls in alsamixer.
v12 changes compared to v11 are:
- Split u patchset in
---
sound/soc/sunxi/sun4i-codec.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/sound/soc/sunxi/sun4i-codec.c b/sound/soc/sunxi/sun4i-codec.c
index 1500699..f703293 100644
--- a/sound/soc/sunxi/sun4i-codec.c
+++ b/sound/soc/sunxi/sun4i-codec.c
@@ -711,6 +711,8 @@ static const
This patchset adds some mixer controls to sun4i-codec.
It also adds a mux for the capture source and the PGA for the MIC2 preamp.
Where possible, it uses SOC_DAPM_DOUBLE in order to cut down on the number
of distinct controls in alsamixer.
v12 changes compared to v11 are:
- Split u patchset in
---
sound/soc/sunxi/sun4i-codec.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/sound/soc/sunxi/sun4i-codec.c b/sound/soc/sunxi/sun4i-codec.c
index 3718137..55687f9 100644
--- a/sound/soc/sunxi/sun4i-codec.c
+++ b/sound/soc/sunxi/sun4i-codec.c
@@ -68,6 +68,10 @@
#define
---
sound/soc/sunxi/sun4i-codec.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/sound/soc/sunxi/sun4i-codec.c b/sound/soc/sunxi/sun4i-codec.c
index 5b6f100..234ded2 100644
--- a/sound/soc/sunxi/sun4i-codec.c
+++ b/sound/soc/sunxi/sun4i-codec.c
@@ -702,6 +702,9 @@ static const struct
On Fri, Jun 9, 2017 at 10:15 PM, John Stultz wrote:
> On Fri, Jun 9, 2017 at 1:06 PM, Arnd Bergmann wrote:
>> On Fri, Jun 9, 2017 at 5:46 PM, Daniel Lezcano
>> wrote:
>>> On Tue, Jun 06, 2017 at 04:17:40PM +0200, Ulf Hansson
On Fri, Jun 9, 2017 at 10:15 PM, John Stultz wrote:
> On Fri, Jun 9, 2017 at 1:06 PM, Arnd Bergmann wrote:
>> On Fri, Jun 9, 2017 at 5:46 PM, Daniel Lezcano
>> wrote:
>>> On Tue, Jun 06, 2017 at 04:17:40PM +0200, Ulf Hansson wrote:
On 5 June 2017 at 20:13, Daniel Lezcano wrote:
>
Allow device-mapper to route flush operations to the
per-target implementation. In order for the device stacking to work we
need a dax_dev and a pgoff relative to that device. This gives each
layer of the stack the information it needs to look up the operation
pointer for the next level.
This
Allow device-mapper to route flush operations to the
per-target implementation. In order for the device stacking to work we
need a dax_dev and a pgoff relative to that device. This gives each
layer of the stack the information it needs to look up the operation
pointer for the next level.
This
With all calls to this routine re-directed through the pmem driver, we can kill
the pmem api indirection. arch_wb_cache_pmem() is now optionally supplied by
the arch specific asm/pmem.h. Same as before, pmem flushing is only defined
for x86_64, but it is straightforward to add other archs in the
With all calls to this routine re-directed through the pmem driver, we can kill
the pmem api indirection. arch_wb_cache_pmem() is now optionally supplied by
the arch specific asm/pmem.h. Same as before, pmem flushing is only defined
for x86_64, but it is straightforward to add other archs in the
Kill this globally defined wrapper and move to libnvdimm so that we can
ultimately remove include/linux/pmem.h.
Cc:
Cc: Jan Kara
Cc: Jeff Moyer
Cc: Ingo Molnar
Cc: Christoph Hellwig
Cc: "H. Peter Anvin"
Kill this globally defined wrapper and move to libnvdimm so that we can
ultimately remove include/linux/pmem.h.
Cc:
Cc: Jan Kara
Cc: Jeff Moyer
Cc: Ingo Molnar
Cc: Christoph Hellwig
Cc: "H. Peter Anvin"
Cc: Thomas Gleixner
Cc: Matthew Wilcox
Cc: Ross Zwisler
Signed-off-by: Dan Williams
Allow volatile nfit ranges to participate in all the same infrastructure
provided for persistent memory regions. A resulting resulting namespace
device will still be called "pmem", but the parent region type will be
"nd_volatile". This is in preparation for disabling the dax ->flush()
operation in
Allow volatile nfit ranges to participate in all the same infrastructure
provided for persistent memory regions. A resulting resulting namespace
device will still be called "pmem", but the parent region type will be
"nd_volatile". This is in preparation for disabling the dax ->flush()
operation in
Some platforms arrange for cpu caches to be flushed on power-fail. On
those platforms there is no requirement that the kernel track and flush
potentially dirty cache lines. Given that we still insert entries into
the radix for locking purposes this patch only disables the cache flush
loop, not the
Some platforms arrange for cpu caches to be flushed on power-fail. On
those platforms there is no requirement that the kernel track and flush
potentially dirty cache lines. Given that we still insert entries into
the radix for locking purposes this patch only disables the cache flush
loop, not the
The clear_pmem() helper simply combines a memset() plus a cache flush.
Now that the flush routine is optionally provided by the dax device
driver we can avoid unnecessary cache management on dax devices fronting
volatile memory.
With clear_pmem() gone we can follow on with a patch to make pmem
The clear_pmem() helper simply combines a memset() plus a cache flush.
Now that the flush routine is optionally provided by the dax device
driver we can avoid unnecessary cache management on dax devices fronting
volatile memory.
With clear_pmem() gone we can follow on with a patch to make pmem
The pmem driver attaches to both persistent and volatile memory ranges
advertised by the ACPI NFIT. When the region is volatile it is redundant
to spend cycles flushing caches at fsync(). Check if the hosting region
is volatile and do not set QUEUE_FLAG_WC if it is.
Cc: Jan Kara
The pmem driver attaches to both persistent and volatile memory ranges
advertised by the ACPI NFIT. When the region is volatile it is redundant
to spend cycles flushing caches at fsync(). Check if the hosting region
is volatile and do not set QUEUE_FLAG_WC if it is.
Cc: Jan Kara
Cc: Jeff Moyer
The pmem driver assumes if platform firmware describes the memory
devices associated with a persistent memory range and
CONFIG_ARCH_HAS_PMEM_API=y that it has all the mechanism necessary to
flush data to a power-fail safe zone. We warn if the firmware does not
describe memory devices, but we also
The pmem driver assumes if platform firmware describes the memory
devices associated with a persistent memory range and
CONFIG_ARCH_HAS_PMEM_API=y that it has all the mechanism necessary to
flush data to a power-fail safe zone. We warn if the firmware does not
describe memory devices, but we also
Now that all callers of the pmem api have been converted to dax helpers that
call back to the pmem driver, we can remove include/linux/pmem.h.
Cc:
Cc: Jan Kara
Cc: Jeff Moyer
Cc: Ingo Molnar
Cc: Christoph Hellwig
Filesystem-DAX flushes caches whenever it writes to the address returned
through dax_direct_access() and when writing back dirty radix entries.
That flushing is only required in the pmem case, so add a dax operation
to allow pmem to take this extra action, but skip it for other dax
capable devices
Filesystem-DAX flushes caches whenever it writes to the address returned
through dax_direct_access() and when writing back dirty radix entries.
That flushing is only required in the pmem case, so add a dax operation
to allow pmem to take this extra action, but skip it for other dax
capable devices
Now that all callers of the pmem api have been converted to dax helpers that
call back to the pmem driver, we can remove include/linux/pmem.h.
Cc:
Cc: Jan Kara
Cc: Jeff Moyer
Cc: Ingo Molnar
Cc: Christoph Hellwig
Cc: Toshi Kani
Cc: Oliver O'Halloran
Cc: Ross Zwisler
Signed-off-by: Dan
Changes since v2 [1]:
1/ Address the concerns from "[NAK] copy_from_iter_ops()" [2]. The
copy_from_iter_ops approach is replaced with a new set _flushcache
memcpy and user-copy helpers (Al)
2/ Use _flushcache as the suffix for the new cache managing copy helpers
rather than _writethrough
The pmem driver has a need to transfer data with a persistent memory
destination and be able to rely on the fact that the destination writes are not
cached. It is sufficient for the writes to be flushed to a cpu-store-buffer
(non-temporal / "movnt" in x86 terms), as we expect userspace to call
Changes since v2 [1]:
1/ Address the concerns from "[NAK] copy_from_iter_ops()" [2]. The
copy_from_iter_ops approach is replaced with a new set _flushcache
memcpy and user-copy helpers (Al)
2/ Use _flushcache as the suffix for the new cache managing copy helpers
rather than _writethrough
The pmem driver has a need to transfer data with a persistent memory
destination and be able to rely on the fact that the destination writes are not
cached. It is sufficient for the writes to be flushed to a cpu-store-buffer
(non-temporal / "movnt" in x86 terms), as we expect userspace to call
Filesystem-DAX flushes caches whenever it writes to the address returned
through dax_direct_access() and when writing back dirty radix entries.
That flushing is only required in the pmem case, so the dax_flush()
helper skips cache management work when the underlying driver does not
specify a flush
Now that all possible providers of the dax_operations copy_from_iter
method are implemented, switch filesytem-dax to call the driver rather
than copy_to_iter_pmem.
Signed-off-by: Dan Williams
---
arch/x86/include/asm/pmem.h | 50
Allow device-mapper to route copy_from_iter operations to the
per-target implementation. In order for the device stacking to work we
need a dax_dev and a pgoff relative to that device. This gives each
layer of the stack the information it needs to look up the operation
pointer for the next level.
Filesystem-DAX flushes caches whenever it writes to the address returned
through dax_direct_access() and when writing back dirty radix entries.
That flushing is only required in the pmem case, so the dax_flush()
helper skips cache management work when the underlying driver does not
specify a flush
Now that all possible providers of the dax_operations copy_from_iter
method are implemented, switch filesytem-dax to call the driver rather
than copy_to_iter_pmem.
Signed-off-by: Dan Williams
---
arch/x86/include/asm/pmem.h | 50 ---
fs/dax.c
Allow device-mapper to route copy_from_iter operations to the
per-target implementation. In order for the device stacking to work we
need a dax_dev and a pgoff relative to that device. This gives each
layer of the stack the information it needs to look up the operation
pointer for the next level.
Hi,
we've received a bug report about 4.4.70 kernel showing the hang up at
boot. And, this turned out to be a regression in nouveau driver:
https://bugzilla.suse.com/show_bug.cgi?id=1043467
I provided a test kernel reverting the last five commits about
nouveau below, and it was confirmed to
Hi,
we've received a bug report about 4.4.70 kernel showing the hang up at
boot. And, this turned out to be a regression in nouveau driver:
https://bugzilla.suse.com/show_bug.cgi?id=1043467
I provided a test kernel reverting the last five commits about
nouveau below, and it was confirmed to
On Thu, Jun 8, 2017 at 12:18 AM, Junil Lee wrote:
> The allocated size for each ebitmap_node is 192byte by kzalloc().
> Then, ebitmap_node size is fixed, so it's possible to use only 144byte
> for each object by kmem_cache_zalloc().
> It can reduce some dynamic allocation
On Thu, Jun 8, 2017 at 12:18 AM, Junil Lee wrote:
> The allocated size for each ebitmap_node is 192byte by kzalloc().
> Then, ebitmap_node size is fixed, so it's possible to use only 144byte
> for each object by kmem_cache_zalloc().
> It can reduce some dynamic allocation size.
>
> Signed-off-by:
On Fri, Jun 9, 2017 at 1:06 PM, Arnd Bergmann wrote:
> On Fri, Jun 9, 2017 at 5:46 PM, Daniel Lezcano
> wrote:
>> On Tue, Jun 06, 2017 at 04:17:40PM +0200, Ulf Hansson wrote:
>>> On 5 June 2017 at 20:13, Daniel Lezcano wrote:
On Fri, Jun 9, 2017 at 1:06 PM, Arnd Bergmann wrote:
> On Fri, Jun 9, 2017 at 5:46 PM, Daniel Lezcano
> wrote:
>> On Tue, Jun 06, 2017 at 04:17:40PM +0200, Ulf Hansson wrote:
>>> On 5 June 2017 at 20:13, Daniel Lezcano wrote:
>>> > With the addition of the hi655x common clock, the config option
Hello Thomas,
This patch breaks one of our CRIU tests:
https://github.com/xemul/criu/blob/master/test/zdtm/static/posix_timers.c#L145
python /root/git/main/criu/test/zdtm.py run -t zdtm/static/posix_timers --iter 0
== Run zdtm/static/posix_timers in h ===
Hello Thomas,
This patch breaks one of our CRIU tests:
https://github.com/xemul/criu/blob/master/test/zdtm/static/posix_timers.c#L145
python /root/git/main/criu/test/zdtm.py run -t zdtm/static/posix_timers --iter 0
== Run zdtm/static/posix_timers in h ===
On Fri, 9 Jun 2017 09:42:26 +0200
Linus Walleij wrote:
> On Thu, Jun 1, 2017 at 10:08 PM, Ralph Sennhauser
> wrote:
>
> > As it turns out more than just Armada 370 and XP support using GPIO
> > lines as PWM lines. For example the Armada 38x
On Fri, 9 Jun 2017 09:42:26 +0200
Linus Walleij wrote:
> On Thu, Jun 1, 2017 at 10:08 PM, Ralph Sennhauser
> wrote:
>
> > As it turns out more than just Armada 370 and XP support using GPIO
> > lines as PWM lines. For example the Armada 38x family has the same
> > hardware support. As such
On Fri, Jun 9, 2017 at 5:46 PM, Daniel Lezcano
wrote:
> On Tue, Jun 06, 2017 at 04:17:40PM +0200, Ulf Hansson wrote:
>> On 5 June 2017 at 20:13, Daniel Lezcano wrote:
>> > With the addition of the hi655x common clock, the config option is
On Fri, Jun 9, 2017 at 5:46 PM, Daniel Lezcano
wrote:
> On Tue, Jun 06, 2017 at 04:17:40PM +0200, Ulf Hansson wrote:
>> On 5 June 2017 at 20:13, Daniel Lezcano wrote:
>> > With the addition of the hi655x common clock, the config option is missing
>> > for the ARM64's hi6220 platform. That leads
On Tue, Jun 06, 2017 at 12:10:23PM -0700, Palmer Dabbelt wrote:
> These routines in arch/mips/lib/ are functionally identical to those
> recently added to lib/ so remove them and select the generic ones.
>
> Signed-off-by: Matt Redfearn
> Signed-off-by: Palmer Dabbelt
On Tue, Jun 06, 2017 at 12:10:23PM -0700, Palmer Dabbelt wrote:
> These routines in arch/mips/lib/ are functionally identical to those
> recently added to lib/ so remove them and select the generic ones.
>
> Signed-off-by: Matt Redfearn
> Signed-off-by: Palmer Dabbelt
Thanks, nice cleanup!
From: Arnd Bergmann
Date: Fri, 9 Jun 2017 12:37:35 +0200
> When CONFIG_QED_SRIOV is disabled, we get a build error:
>
> drivers/net/ethernet/qlogic/qed/qed_int.c: In function 'qed_int_sb_init':
> drivers/net/ethernet/qlogic/qed/qed_int.c:1499:4: error: implicit declaration
> of
From: Arnd Bergmann
Date: Fri, 9 Jun 2017 12:37:35 +0200
> When CONFIG_QED_SRIOV is disabled, we get a build error:
>
> drivers/net/ethernet/qlogic/qed/qed_int.c: In function 'qed_int_sb_init':
> drivers/net/ethernet/qlogic/qed/qed_int.c:1499:4: error: implicit declaration
> of function
While working on enabling queued rwlock on SPARC, found
this following code in include/asm-generic/qrwlock.h
which uses CONFIG_CPU_BIG_ENDIAN to clear a byte.
static inline u8 *__qrwlock_write_byte(struct qrwlock *lock)
{
return (u8 *)lock + 3 * IS_BUILTIN(CONFIG_CPU_BIG_ENDIAN);
}
Found this problem while enabling queued rwlock on SPARC.
The parameter CONFIG_CPU_BIG_ENDIAN is used to clear the
specific byte in qrwlock structure. Without this parameter,
we clear the wrong byte.
Here is the code in include/asm-generic/qrwlock.h
static inline u8 *__qrwlock_write_byte(struct
While working on enabling queued rwlock on SPARC, found
this following code in include/asm-generic/qrwlock.h
which uses CONFIG_CPU_BIG_ENDIAN to clear a byte.
static inline u8 *__qrwlock_write_byte(struct qrwlock *lock)
{
return (u8 *)lock + 3 * IS_BUILTIN(CONFIG_CPU_BIG_ENDIAN);
}
Found this problem while enabling queued rwlock on SPARC.
The parameter CONFIG_CPU_BIG_ENDIAN is used to clear the
specific byte in qrwlock structure. Without this parameter,
we clear the wrong byte.
Here is the code in include/asm-generic/qrwlock.h
static inline u8 *__qrwlock_write_byte(struct
We have seen some generic code use config parameter CONFIG_CPU_BIG_ENDIAN
to decide the endianness.
Here are the few examples.
include/asm-generic/qrwlock.h
drivers/of/base.c
drivers/of/fdt.c
drivers/tty/serial/earlycon.c
drivers/tty/serial/serial_core.c
Display warning if CPU_BIG_ENDIAN is not
We have seen some generic code use config parameter CONFIG_CPU_BIG_ENDIAN
to decide the endianness.
Here are the few examples.
include/asm-generic/qrwlock.h
drivers/of/base.c
drivers/of/fdt.c
drivers/tty/serial/earlycon.c
drivers/tty/serial/serial_core.c
Display warning if CPU_BIG_ENDIAN is not
>>
>> PV guests don't go through Linux x86 early boot code. They start at
>> xen_start_kernel() (well, xen-head.S:startup_xen(), really) and merge
>> with baremetal path at x86_64_start_reservations() (for 64-bit).
>>
>
> Ok, I don't think anything needs to be done then. The sme_me_mask is set
>
>>
>> PV guests don't go through Linux x86 early boot code. They start at
>> xen_start_kernel() (well, xen-head.S:startup_xen(), really) and merge
>> with baremetal path at x86_64_start_reservations() (for 64-bit).
>>
>
> Ok, I don't think anything needs to be done then. The sme_me_mask is set
>
From: Yazen Ghannam
The bootlog option is only disabled by default on AMD Fam10h and older
systems.
Update bootlog description to say this.
Change the family value to hex to avoid confusion.
Signed-off-by: Yazen Ghannam
---
From: Yazen Ghannam
The bootlog option is only disabled by default on AMD Fam10h and older
systems.
Update bootlog description to say this.
Change the family value to hex to avoid confusion.
Signed-off-by: Yazen Ghannam
---
Documentation/x86/x86_64/boot-options.txt | 3 ++-
From: Hayes Wang
Date: Fri, 9 Jun 2017 17:11:37 +0800
> Adjust some code to make it reasonable or satisfy the suggestion from
> the engineers.
Series applied, thank you.
From: Hayes Wang
Date: Fri, 9 Jun 2017 17:11:37 +0800
> Adjust some code to make it reasonable or satisfy the suggestion from
> the engineers.
Series applied, thank you.
On Fri, Jun 9, 2017 at 10:29 PM, Joe Perches wrote:
> Remove #define PREFIX and add #define pr_fmt to use more common logging.
>
> Miscellanea:
>
> o Add missing newline to format
> o Convert a single printk without KERN_ to pr_info
>
FWIW,
Reviewed-by: Andy Shevchenko
On Fri, Jun 9, 2017 at 10:29 PM, Joe Perches wrote:
> Remove #define PREFIX and add #define pr_fmt to use more common logging.
>
> Miscellanea:
>
> o Add missing newline to format
> o Convert a single printk without KERN_ to pr_info
>
FWIW,
Reviewed-by: Andy Shevchenko
> Signed-off-by: Joe
On Fri, Jun 09, 2017 at 04:44:42PM +0100, Will Deacon wrote:
> > +++ b/Documentation/atomic_t.txt2017-06-09 11:05:31.501599153 +0200
> > @@ -0,0 +1,147 @@
> > +
> > +On atomic types (atomic_t atomic64_t and atomic_long_t).
> > +
> > +The atomic type provides an interface to the architecture's
On Fri, Jun 09, 2017 at 04:44:42PM +0100, Will Deacon wrote:
> > +++ b/Documentation/atomic_t.txt2017-06-09 11:05:31.501599153 +0200
> > @@ -0,0 +1,147 @@
> > +
> > +On atomic types (atomic_t atomic64_t and atomic_long_t).
> > +
> > +The atomic type provides an interface to the architecture's
Remove #define PREFIX and add #define pr_fmt to use more common logging.
Miscellanea:
o Add missing newline to format
o Convert a single printk without KERN_ to pr_info
Signed-off-by: Joe Perches
---
drivers/idle/intel_idle.c | 32
1 file
Remove #define PREFIX and add #define pr_fmt to use more common logging.
Miscellanea:
o Add missing newline to format
o Convert a single printk without KERN_ to pr_info
Signed-off-by: Joe Perches
---
drivers/idle/intel_idle.c | 32
1 file changed, 16
If 'devm_kmalloc_array' returns NULL, we should return -ENOMEM as already
done a few lines above instead of deferencing a NULL pointer a few lines
below.
Signed-off-by: Christophe JAILLET
---
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 2 ++
1 file changed, 2
If 'devm_kmalloc_array' returns NULL, we should return -ENOMEM as already
done a few lines above instead of deferencing a NULL pointer a few lines
below.
Signed-off-by: Christophe JAILLET
---
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 2 ++
1 file changed, 2 insertions(+)
diff --git
On Fri, Jun 9, 2017 at 10:33 AM, Ard Biesheuvel
wrote:
> (+ Kees)
>
> On 6 June 2017 at 09:34, David Howells wrote:
>> Ard Biesheuvel wrote:
>>
>>> and print a subsequent line for every lockdown feature that is enabled,
On Fri, Jun 9, 2017 at 10:33 AM, Ard Biesheuvel
wrote:
> (+ Kees)
>
> On 6 June 2017 at 09:34, David Howells wrote:
>> Ard Biesheuvel wrote:
>>
>>> and print a subsequent line for every lockdown feature that is enabled,
>>> e.g.,
>>>
>>> lockdown: disabling MSRs
>>> lockdown: disabling
On 06/08/2017 05:34 PM, Stefan Agner wrote:
> The Colibri iMX7 modules come with 512MB on-module SLC NAND flash
> populated. Make use of it by enabling the GPMI controller.
>
> Signed-off-by: Stefan Agner
> Tested-by: Fabio Estevam
Acked-by: Han Xu
On 06/08/2017 05:34 PM, Stefan Agner wrote:
> The Colibri iMX7 modules come with 512MB on-module SLC NAND flash
> populated. Make use of it by enabling the GPMI controller.
>
> Signed-off-by: Stefan Agner
> Tested-by: Fabio Estevam
Acked-by: Han Xu
> ---
>
On 06/08/2017 05:34 PM, Stefan Agner wrote:
> Add i.MX 7 APBH DMA and GPMI NAND modules.
>
> Signed-off-by: Stefan Agner
> Tested-by: Fabio Estevam
Acked-by: Han Xu
> ---
> arch/arm/boot/dts/imx7s.dtsi | 31
On 06/08/2017 05:34 PM, Stefan Agner wrote:
> Add i.MX 7 APBH DMA and GPMI NAND modules.
>
> Signed-off-by: Stefan Agner
> Tested-by: Fabio Estevam
Acked-by: Han Xu
> ---
> arch/arm/boot/dts/imx7s.dtsi | 31 +++
> 1 file changed, 31 insertions(+)
>
> diff --git
On 06/08/2017 05:34 PM, Stefan Agner wrote:
> The rawnand clock gate gates two clocks, NAND_USDHC_BUS_CLK_ROOT
> and NAND_CLK_ROOT. However, the gate has been in the chain of the
> latter only. This does not allow to use the NAND_USDHC_BUS_CLK_ROOT
> only, e.g. as required by APBH-Bridge-DMA.
>
On 06/08/2017 05:34 PM, Stefan Agner wrote:
> The rawnand clock gate gates two clocks, NAND_USDHC_BUS_CLK_ROOT
> and NAND_CLK_ROOT. However, the gate has been in the chain of the
> latter only. This does not allow to use the NAND_USDHC_BUS_CLK_ROOT
> only, e.g. as required by APBH-Bridge-DMA.
>
Reviewed-by: Jin Qian
Can we merge this to stable?
Thanks!
jin
On Mon, May 22, 2017 at 11:48 AM, Alan Cox wrote:
> On Mon, 22 May 2017 13:51:52 +0200
> Michal Hocko wrote:
>
>> On Sun 21-05-17 09:48:36, Michal Hocko wrote:
>>
Reviewed-by: Jin Qian
Can we merge this to stable?
Thanks!
jin
On Mon, May 22, 2017 at 11:48 AM, Alan Cox wrote:
> On Mon, 22 May 2017 13:51:52 +0200
> Michal Hocko wrote:
>
>> On Sun 21-05-17 09:48:36, Michal Hocko wrote:
>> > On Sun 21-05-17 00:45:46, Wei Yongjun wrote:
>> > > From: Wei
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