On Sat, Oct 21, 2017 at 03:39:47PM +0200, Nicolas Belouin wrote:
> Fix an issue making trusted xattr world readable and other
> cap_sys_admin only
>
NACK. It is *documented* that trusted xattrs are only supposed to be
readable by root.
- Ted
On Sat, Oct 21, 2017 at 03:39:47PM +0200, Nicolas Belouin wrote:
> Fix an issue making trusted xattr world readable and other
> cap_sys_admin only
>
NACK. It is *documented* that trusted xattrs are only supposed to be
readable by root.
- Ted
On Sat, Oct 21, 2017 at 03:24:46PM +0200, Nicolas Belouin wrote:
> These checks are meant to prevent leaks or attacks via directory
> traversal, the use of CAP_SYS_ADMIN here is a misuse,
> CAP_DAC_READ_SEARCH being way more appropriate as a process
> with CAP_DAC_READ_SEARCH is entrusted with
On Sat, Oct 21, 2017 at 03:24:46PM +0200, Nicolas Belouin wrote:
> These checks are meant to prevent leaks or attacks via directory
> traversal, the use of CAP_SYS_ADMIN here is a misuse,
> CAP_DAC_READ_SEARCH being way more appropriate as a process
> with CAP_DAC_READ_SEARCH is entrusted with
Wei Wang wrote:
> The balloon_lock was used to synchronize the access demand to elements
> of struct virtio_balloon and its queue operations (please see commit
> e22504296d). This prevents the concurrent run of the leak_balloon and
> fill_balloon functions, thereby resulting in a deadlock issue on
Wei Wang wrote:
> The balloon_lock was used to synchronize the access demand to elements
> of struct virtio_balloon and its queue operations (please see commit
> e22504296d). This prevents the concurrent run of the leak_balloon and
> fill_balloon functions, thereby resulting in a deadlock issue on
On Sat, 2017-10-21 at 10:25 +0200, Matthias Brugger wrote:
> When adding the MT6380 compatible, the sentinel for of_device_id was
> deleted, which leades to the following compiler error:
> FATAL: drivers/soc/mediatek/mtk-pmic-wrap: struct of_device_id is not
> terminated with a NULL entry!
>
>
On Sat, 2017-10-21 at 10:25 +0200, Matthias Brugger wrote:
> When adding the MT6380 compatible, the sentinel for of_device_id was
> deleted, which leades to the following compiler error:
> FATAL: drivers/soc/mediatek/mtk-pmic-wrap: struct of_device_id is not
> terminated with a NULL entry!
>
>
Michael S. Tsirkin wrote:
> On Fri, Oct 20, 2017 at 07:54:25PM +0800, Wei Wang wrote:
> > The current implementation only deflates 256 pages even when a user
> > specifies more than that via the oom_pages module param. This patch
> > enables the deflating of up to oom_pages pages if there are
Michael S. Tsirkin wrote:
> On Fri, Oct 20, 2017 at 07:54:25PM +0800, Wei Wang wrote:
> > The current implementation only deflates 256 pages even when a user
> > specifies more than that via the oom_pages module param. This patch
> > enables the deflating of up to oom_pages pages if there are
On Fri, 2017-10-20 at 10:37 +, Reshetova, Elena wrote:
> > On Fri, 2017-10-20 at 10:23 +0300, Elena Reshetova wrote:
> > > atomic_t variables are currently used to implement reference
> > > counters with the following properties:
> > > - counter is initialized to 1 using atomic_set()
> > > -
On Fri, 2017-10-20 at 10:37 +, Reshetova, Elena wrote:
> > On Fri, 2017-10-20 at 10:23 +0300, Elena Reshetova wrote:
> > > atomic_t variables are currently used to implement reference
> > > counters with the following properties:
> > > - counter is initialized to 1 using atomic_set()
> > > -
Hi Thomas,
FYI, the error/warning still remains.
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 0787643a5f6aad1f0cdeb305f7fe492b71943ea4
commit: d3488649dcd23b7a6e63895274ec69f80e92d4ed um: Fix CONFIG_GCOV for
modules.
date: 5 weeks ago
config:
Hi Thomas,
FYI, the error/warning still remains.
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 0787643a5f6aad1f0cdeb305f7fe492b71943ea4
commit: d3488649dcd23b7a6e63895274ec69f80e92d4ed um: Fix CONFIG_GCOV for
modules.
date: 5 weeks ago
config:
Hi, Greg
On Tue, 2017-10-17 at 13:42 +0300, Mathias Nyman wrote:
> On 17.10.2017 13:20, Greg Kroah-Hartman wrote:
> > On Fri, Oct 13, 2017 at 01:32:14PM +0300, Mathias Nyman wrote:
> >> On 13.10.2017 11:26, Chunfeng Yun wrote:
> >>> Due to all MediaTek SoCs with xHCI host controller use this
> >>>
Hi, Greg
On Tue, 2017-10-17 at 13:42 +0300, Mathias Nyman wrote:
> On 17.10.2017 13:20, Greg Kroah-Hartman wrote:
> > On Fri, Oct 13, 2017 at 01:32:14PM +0300, Mathias Nyman wrote:
> >> On 13.10.2017 11:26, Chunfeng Yun wrote:
> >>> Due to all MediaTek SoCs with xHCI host controller use this
> >>>
On Fri, Oct 20, 2017 at 07:54:25PM +0800, Wei Wang wrote:
> The current implementation only deflates 256 pages even when a user
> specifies more than that via the oom_pages module param. This patch
> enables the deflating of up to oom_pages pages if there are enough
> inflated pages.
>
>
On Fri, Oct 20, 2017 at 07:54:25PM +0800, Wei Wang wrote:
> The current implementation only deflates 256 pages even when a user
> specifies more than that via the oom_pages module param. This patch
> enables the deflating of up to oom_pages pages if there are enough
> inflated pages.
>
>
On Fri, Oct 20, 2017 at 07:54:23PM +0800, Wei Wang wrote:
> This patch series intends to summarize the recent contributions made by
> Michael S. Tsirkin, Tetsuo Handa, Michal Hocko etc. via reporting and
> discussing the related deadlock issues on the mailinglist. Please check
> each patch for
On Fri, Oct 20, 2017 at 07:54:23PM +0800, Wei Wang wrote:
> This patch series intends to summarize the recent contributions made by
> Michael S. Tsirkin, Tetsuo Handa, Michal Hocko etc. via reporting and
> discussing the related deadlock issues on the mailinglist. Please check
> each patch for
From: Stefan Kristiansson
Previously, the area between 0x0-0x100 have been used as a "scratch"
memory area to temporarily store regs during exception entry. In a
multi-core environment, this will not work.
This change is to use shadow registers for nested
From: Stefan Kristiansson
Previously, the area between 0x0-0x100 have been used as a "scratch"
memory area to temporarily store regs during exception entry. In a
multi-core environment, this will not work.
This change is to use shadow registers for nested context.
Currently only the "critical"
In case timers are not in sync when cpus start (i.e. hot plug / offset
resets) we need to synchronize the secondary cpus internal timer with
the main cpu. This is needed as in OpenRISC SMP there is only one
clocksource registered which reads from the same ttcr register on each
cpu.
This
In case timers are not in sync when cpus start (i.e. hot plug / offset
resets) we need to synchronize the secondary cpus internal timer with
the main cpu. This is needed as in OpenRISC SMP there is only one
clocksource registered which reads from the same ttcr register on each
cpu.
This
For lockdep support a reliable stack trace mechanism is needed. This
patch adds support in OpenRISC for the stacktrace framework, implemented
by a simple unwinder api. The unwinder api supports both framepointer
and basic stack tracing.
The unwinder is now used to replace the stack_dump()
Lockdep is needed for proving the spinlocks and rwlocks work fine on our
platform. It also requires calling the trace_hardirqs_off() and
trace_hardirqs_on() pair of routines when entering and exiting an
interrupt.
For OpenRISC the interrupt stack frame does not support frame pointers,
so to call
From: Stefan Kristiansson
Simple enough to be compatible with simulation environments,
such as verilated systems, QEMU and other targets supporting OpenRISC
SMP. This also supports our base FPGA SoC's if the cpu frequency is
upped to 50Mhz.
Signed-off-by:
For lockdep support a reliable stack trace mechanism is needed. This
patch adds support in OpenRISC for the stacktrace framework, implemented
by a simple unwinder api. The unwinder api supports both framepointer
and basic stack tracing.
The unwinder is now used to replace the stack_dump()
Lockdep is needed for proving the spinlocks and rwlocks work fine on our
platform. It also requires calling the trace_hardirqs_off() and
trace_hardirqs_on() pair of routines when entering and exiting an
interrupt.
For OpenRISC the interrupt stack frame does not support frame pointers,
so to call
From: Stefan Kristiansson
Simple enough to be compatible with simulation environments,
such as verilated systems, QEMU and other targets supporting OpenRISC
SMP. This also supports our base FPGA SoC's if the cpu frequency is
upped to 50Mhz.
Signed-off-by: Stefan Kristiansson
From: Jan Henrik Weinstock
On OpenRISC the icache does not snoop data stores. This can cause
aliasing as reported by Jan. This patch fixes the issue to ensure icache
is properly synchronized when code is written to memory. It supports both
SMP and UP flushing.
During SMP testing we were getting the below warning after booting the
secondary cpu:
[0.06] BUG: scheduling while atomic: swapper/1/0/0x
This change follows similar patterns from other architectures to start
the schduler with preempt disabled.
Signed-off-by: Stafford Horne
Currently we do a spin on secondary cpus when waiting to boot. This
theoretically causes issues with power consumption and does cause issues
with qemu cycle burning (it starves cpu 0 from actually being able to
boot.)
This change puts each secondary cpu to sleep if they have a power
management
From: Jan Henrik Weinstock
On OpenRISC the icache does not snoop data stores. This can cause
aliasing as reported by Jan. This patch fixes the issue to ensure icache
is properly synchronized when code is written to memory. It supports both
SMP and UP flushing.
This supports dcache flush as
During SMP testing we were getting the below warning after booting the
secondary cpu:
[0.06] BUG: scheduling while atomic: swapper/1/0/0x
This change follows similar patterns from other architectures to start
the schduler with preempt disabled.
Signed-off-by: Stafford Horne
---
Currently we do a spin on secondary cpus when waiting to boot. This
theoretically causes issues with power consumption and does cause issues
with qemu cycle burning (it starves cpu 0 from actually being able to
boot.)
This change puts each secondary cpu to sleep if they have a power
management
Enable OpenRISC to use qspinlocks and qrwlocks for upcoming SMP support.
Signed-off-by: Stafford Horne
---
arch/openrisc/Kconfig | 2 ++
arch/openrisc/include/asm/Kbuild | 4
arch/openrisc/include/asm/spinlock.h | 12 +++-
OpenRISC only supports hardware instructions that perform 4 byte atomic
operations. For enabling qrwlocks for upcoming SMP support 1 and 2 byte
implementations are needed. To do this we leverage the 4 byte atomic
operations and shift/mask the 1 and 2 byte areas as needed.
This heavily borrows
From: Stefan Kristiansson
IPI driver for the Open Multi-Processor Interrupt Controller (ompic) as
described in the Multi-core support section of the OpenRISC 1.2
proposed architecture specification:
OpenRISC only supports hardware instructions that perform 4 byte atomic
operations. For enabling qrwlocks for upcoming SMP support 1 and 2 byte
implementations are needed. To do this we leverage the 4 byte atomic
operations and shift/mask the 1 and 2 byte areas as needed.
This heavily borrows
From: Stefan Kristiansson
IPI driver for the Open Multi-Processor Interrupt Controller (ompic) as
described in the Multi-core support section of the OpenRISC 1.2
proposed architecture specification:
https://github.com/stffrdhrn/doc/raw/arch-1.2-proposal/openrisc-arch-1.2-rev0.pdf
Each
Enable OpenRISC to use qspinlocks and qrwlocks for upcoming SMP support.
Signed-off-by: Stafford Horne
---
arch/openrisc/Kconfig | 2 ++
arch/openrisc/include/asm/Kbuild | 4
arch/openrisc/include/asm/spinlock.h | 12 +++-
From: Stefan Kristiansson
This patch introduces the SMP support for the OpenRISC architecture.
The SMP architecture requires cores which have multi-core features which
have been introduced a few years back including:
- New SPRS SPR_COREID SPR_NUMCORES
-
From: Stefan Kristiansson
This patch introduces the SMP support for the OpenRISC architecture.
The SMP architecture requires cores which have multi-core features which
have been introduced a few years back including:
- New SPRS SPR_COREID SPR_NUMCORES
- Shadow SPRs
- Atomic Instructions
-
Add OpenRISC.io to vendor prefixes. This is reserved for softcores
developed by the OpenRISC community. The OpenRISC community has
separated from OpenCores.org requiring a new prefix.
Reviewed-by: Andreas Färber
Acked-by: Rob Herring
Signed-off-by: Stafford
Add OpenRISC.io to vendor prefixes. This is reserved for softcores
developed by the OpenRISC community. The OpenRISC community has
separated from OpenCores.org requiring a new prefix.
Reviewed-by: Andreas Färber
Acked-by: Rob Herring
Signed-off-by: Stafford Horne
---
Changes since v2
-
Hello Again,
(sorry for a bit of delay getting this version out, gdb and qemu patches
have been keeping me busy)
This series adds SMP support for OpenRISC. The OpenRISC multi-core
platform and SMP linux support is based on the work that Stefan
Kristiansson did around 2012 implemented in
Hello Again,
(sorry for a bit of delay getting this version out, gdb and qemu patches
have been keeping me busy)
This series adds SMP support for OpenRISC. The OpenRISC multi-core
platform and SMP linux support is based on the work that Stefan
Kristiansson did around 2012 implemented in
The OpenRISC team is the maintainer of the irqchip or1k-pic driver under
drivers/irqchip.
Signed-off-by: Stafford Horne
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 2281af4b41b6..8ce029872089 100644
--- a/MAINTAINERS
+++
The OpenRISC team is the maintainer of the irqchip or1k-pic driver under
drivers/irqchip.
Signed-off-by: Stafford Horne
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 2281af4b41b6..8ce029872089 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@
On Sat, Oct 21, 2017 at 04:06:52PM +0200, Thomas Gleixner wrote:
> The recent rework of the cpu hotplug internals changed the usage of the per
> cpu state->node field, but missed to clean it up after usage.
>
> So subsequent hotplug operations use the stale pointer from a previous
> operation and
On Sat, Oct 21, 2017 at 04:06:52PM +0200, Thomas Gleixner wrote:
> The recent rework of the cpu hotplug internals changed the usage of the per
> cpu state->node field, but missed to clean it up after usage.
>
> So subsequent hotplug operations use the stale pointer from a previous
> operation and
The OpenRISC docs have traditionally been in arch/ but that does not
seem like the correct place to be. Move them so they will be more
visible to others. Also update MAINTAINERS to make sure we get
notifications of changes.
Signed-off-by: Stafford Horne
---
Add devicetree binding documentation for the OpenRISC platform
opencores,or1ksim. This is the main OpenRISC reference platform
supporting multiple FPGA SoC's.
This format is based on some of the mips binding docs as we have
similar requirements.
Also, update maintainers so openrisc related
The OpenRISC docs have traditionally been in arch/ but that does not
seem like the correct place to be. Move them so they will be more
visible to others. Also update MAINTAINERS to make sure we get
notifications of changes.
Signed-off-by: Stafford Horne
---
arch/openrisc/README.openrisc =>
Add devicetree binding documentation for the OpenRISC platform
opencores,or1ksim. This is the main OpenRISC reference platform
supporting multiple FPGA SoC's.
This format is based on some of the mips binding docs as we have
similar requirements.
Also, update maintainers so openrisc related
Update the OpenRISC readme to provide some more up-to-date information
on how to get started with OpenRISC. This includes:
- remove references to southpole who no longer are consulting for
OpenRISC (confirmed with Jonas)
- suggested QEMU instead of the old or1ksim as QEMU is well supported
Hello,
This series moves OpenRISC documentation out of the arch/ folder and into the
Documentation folder. I have also done some updates the README to bring to
better match the current state of OpenRISC.
Also, this adds documentation to the openrisc,or1ksim device tree binding which
was
Update the OpenRISC readme to provide some more up-to-date information
on how to get started with OpenRISC. This includes:
- remove references to southpole who no longer are consulting for
OpenRISC (confirmed with Jonas)
- suggested QEMU instead of the old or1ksim as QEMU is well supported
Hello,
This series moves OpenRISC documentation out of the arch/ folder and into the
Documentation folder. I have also done some updates the README to bring to
better match the current state of OpenRISC.
Also, this adds documentation to the openrisc,or1ksim device tree binding which
was
A little more than usual this time around. Been travelling, so that is
part of it.
Anyways, here are the highlights:
1) Deal with memcontrol races wrt. listener dismantle, from Eric
Dumazet.
2) Handle page allocation failures properly in nfp driver, from
Jaku Kicinski.
3) Fix memory
A little more than usual this time around. Been travelling, so that is
part of it.
Anyways, here are the highlights:
1) Deal with memcontrol races wrt. listener dismantle, from Eric
Dumazet.
2) Handle page allocation failures properly in nfp driver, from
Jaku Kicinski.
3) Fix memory
> On Thu, Oct 19, 2017 at 06:28:12PM +0300, Pavel Nikulin wrote:
> Modification of GPL V2 terms are explicitly disallowed.
Greg KH replied at 03:29 (US/Eastern) on Friday:
>> Again, we are not modifying the license, so all should be fine
I agree with Greg; the Linux Kernel Enforcement Statement
> On Thu, Oct 19, 2017 at 06:28:12PM +0300, Pavel Nikulin wrote:
> Modification of GPL V2 terms are explicitly disallowed.
Greg KH replied at 03:29 (US/Eastern) on Friday:
>> Again, we are not modifying the license, so all should be fine
I agree with Greg; the Linux Kernel Enforcement Statement
From: Bernd Edlinger
Date: Sat, 21 Oct 2017 06:51:30 +
> This is the possible reason for different hard to reproduce
> problems on my ARMv7-SMP test system.
>
> The symptoms are in recent kernels imprecise external aborts,
> and in older kernels various kinds of
From: Bernd Edlinger
Date: Sat, 21 Oct 2017 06:51:30 +
> This is the possible reason for different hard to reproduce
> problems on my ARMv7-SMP test system.
>
> The symptoms are in recent kernels imprecise external aborts,
> and in older kernels various kinds of network stalls and
>
During reviews of the OpenRISC SMP patch series it was suggested to add
stdout-path to the SMP dts file. Add stdout-path to our other dts files
to be a good example.
Cc: Geert Uytterhoeven
Signed-off-by: Stafford Horne
---
Changes since v1
- Complete
During reviews of the OpenRISC SMP patch series it was suggested to add
stdout-path to the SMP dts file. Add stdout-path to our other dts files
to be a good example.
Cc: Geert Uytterhoeven
Signed-off-by: Stafford Horne
---
Changes since v1
- Complete rewrite with input from Geert
From: Florian Fainelli
Date: Sat, 21 Oct 2017 19:01:45 -0700
> Reviewed-by : Florian Fainelli
>
> I still can't make sure this is not a problem for multiple PHYs
> hanging off the same bus, but like anything else, we'll deal with
> problems later if
From: Florian Fainelli
Date: Sat, 21 Oct 2017 19:01:45 -0700
> Reviewed-by : Florian Fainelli
>
> I still can't make sure this is not a problem for multiple PHYs
> hanging off the same bus, but like anything else, we'll deal with
> problems later if they arise.
Thanks Florian.
Applied,
From: "Gustavo A. R. Silva"
Date: Sat, 21 Oct 2017 20:21:00 -0500
>
> Quoting David Miller :
>
>> From: "Gustavo A. R. Silva"
>> Date: Thu, 19 Oct 2017 17:02:44 -0500
>>
>>> @@ -360,7 +360,8 @@ static void
From: "Gustavo A. R. Silva"
Date: Sat, 21 Oct 2017 20:21:00 -0500
>
> Quoting David Miller :
>
>> From: "Gustavo A. R. Silva"
>> Date: Thu, 19 Oct 2017 17:02:44 -0500
>>
>>> @@ -360,7 +360,8 @@ static void smc_close_passive_work(struct
>>> work_struct *work)
>>> case SMC_PEERCLOSEWAIT1:
From: "Gustavo A. R. Silva"
Date: Fri, 20 Oct 2017 12:37:52 -0500
> In preparation to enabling -Wimplicit-fallthrough, mark switch cases
> where we are expecting to fall through.
>
> Signed-off-by: Gustavo A. R. Silva
Applied.
From: "Gustavo A. R. Silva"
Date: Fri, 20 Oct 2017 12:37:52 -0500
> In preparation to enabling -Wimplicit-fallthrough, mark switch cases
> where we are expecting to fall through.
>
> Signed-off-by: Gustavo A. R. Silva
Applied.
From: "Gustavo A. R. Silva"
Date: Fri, 20 Oct 2017 12:05:30 -0500
> In preparation to enabling -Wimplicit-fallthrough, mark switch cases
> where we are expecting to fall through.
>
> Signed-off-by: Gustavo A. R. Silva
Applied.
From: "Gustavo A. R. Silva"
Date: Fri, 20 Oct 2017 12:05:30 -0500
> In preparation to enabling -Wimplicit-fallthrough, mark switch cases
> where we are expecting to fall through.
>
> Signed-off-by: Gustavo A. R. Silva
Applied.
From: "Gustavo A. R. Silva"
Date: Fri, 20 Oct 2017 12:01:26 -0500
> In preparation to enabling -Wimplicit-fallthrough, mark switch cases
> where we are expecting to fall through.
>
> Signed-off-by: Gustavo A. R. Silva
This doesn't apply to
From: "Gustavo A. R. Silva"
Date: Fri, 20 Oct 2017 12:01:26 -0500
> In preparation to enabling -Wimplicit-fallthrough, mark switch cases
> where we are expecting to fall through.
>
> Signed-off-by: Gustavo A. R. Silva
This doesn't apply to net-next.
On October 21, 2017 6:37:38 PM PDT, David Miller wrote:
>
>Second ping, this patch needs a review ASAP.
>
>Geert's hard-resetting PHY changes depend upon this change.
Done, same concerns as before and we could all improve on trying to get this
tested on a pure SW model (e.g
On October 21, 2017 6:37:38 PM PDT, David Miller wrote:
>
>Second ping, this patch needs a review ASAP.
>
>Geert's hard-resetting PHY changes depend upon this change.
Done, same concerns as before and we could all improve on trying to get this
tested on a pure SW model (e.g QEMU) but there is
From: Jose Abreu
Date: Fri, 20 Oct 2017 14:37:33 +0100
> Three fixes for HW timestamping feature, all of them for RX side.
Series applied to 'net', thanks.
From: Jose Abreu
Date: Fri, 20 Oct 2017 14:37:33 +0100
> Three fixes for HW timestamping feature, all of them for RX side.
Series applied to 'net', thanks.
From: David Howells
Date: Fri, 20 Oct 2017 17:01:22 +0100
> Don't release call mutex at the end of rxrpc_kernel_begin_call() if the
> call pointer actually holds an error value.
>
> Fixes: 540b1c48c37a ("rxrpc: Fix deadlock between call creation and
> sendmsg/recvmsg")
>
From: David Howells
Date: Fri, 20 Oct 2017 17:01:22 +0100
> Don't release call mutex at the end of rxrpc_kernel_begin_call() if the
> call pointer actually holds an error value.
>
> Fixes: 540b1c48c37a ("rxrpc: Fix deadlock between call creation and
> sendmsg/recvmsg")
> Reported-by: Marc
On October 18, 2017 4:54:03 AM PDT, Geert Uytterhoeven
wrote:
>If an Ethernet PHY is initialized before the interrupt controller it is
>connected to, a message like the following is printed:
>
>irq: no irq domain found for /interrupt-controller@e61c !
>
>However,
On October 18, 2017 4:54:03 AM PDT, Geert Uytterhoeven
wrote:
>If an Ethernet PHY is initialized before the interrupt controller it is
>connected to, a message like the following is printed:
>
>irq: no irq domain found for /interrupt-controller@e61c !
>
>However, the actual error is
I have uploaded the VM core dump [1]. And I don’t know if these logs are
helpful in the case of
failing to get the C reproducer currently.
[1] https://github.com/dotweiba/skb_clone_atomic_inc_bug/blob/master/vmcore.gz
2017/10/21 20:24:32 reproducing crash 'unable to handle kernel paging
I have uploaded the VM core dump [1]. And I don’t know if these logs are
helpful in the case of
failing to get the C reproducer currently.
[1] https://github.com/dotweiba/skb_clone_atomic_inc_bug/blob/master/vmcore.gz
2017/10/21 20:24:32 reproducing crash 'unable to handle kernel paging
On Fri, Oct 20, 2017 at 07:37:21PM -0700, Guenter Roeck wrote:
> On 10/20/2017 03:54 PM, Jerry Hoemann wrote:
> > Correct test on SMBIOS table 219 Misc Features bits for UEFI supported.
> >
> Please explain in more detail. There is no table 219 in the SMBIOS
> specification.
Sorry, my patch
On Fri, Oct 20, 2017 at 07:37:21PM -0700, Guenter Roeck wrote:
> On 10/20/2017 03:54 PM, Jerry Hoemann wrote:
> > Correct test on SMBIOS table 219 Misc Features bits for UEFI supported.
> >
> Please explain in more detail. There is no table 219 in the SMBIOS
> specification.
Sorry, my patch
From: Egil Hjelmeland
Date: Fri, 20 Oct 2017 12:19:08 +0200
> This series add support for accessing and managing the lan9303 ALR
> (Address Logic Resolution).
>
> The first patch add low level functions for accessing the ALR, along
> with port_fast_age and
On Fri, Oct 20, 2017 at 07:25:20PM -0700, Guenter Roeck wrote:
> On 10/20/2017 03:54 PM, Jerry Hoemann wrote:
> > Add support for WDIOC_GETPRETIMEOUT ioctl so that user applications
> > can determine when the NMI should arrive.
> >
> > Signed-off-by: Jerry Hoemann
> > ---
From: Egil Hjelmeland
Date: Fri, 20 Oct 2017 12:19:08 +0200
> This series add support for accessing and managing the lan9303 ALR
> (Address Logic Resolution).
>
> The first patch add low level functions for accessing the ALR, along
> with port_fast_age and port_fdb_dump methods.
>
> The
On Fri, Oct 20, 2017 at 07:25:20PM -0700, Guenter Roeck wrote:
> On 10/20/2017 03:54 PM, Jerry Hoemann wrote:
> > Add support for WDIOC_GETPRETIMEOUT ioctl so that user applications
> > can determine when the NMI should arrive.
> >
> > Signed-off-by: Jerry Hoemann
> > ---
> >
Second ping, this patch needs a review ASAP.
Geert's hard-resetting PHY changes depend upon this change.
Thank you.
Second ping, this patch needs a review ASAP.
Geert's hard-resetting PHY changes depend upon this change.
Thank you.
In preparation to enabling -Wimplicit-fallthrough, mark switch cases
where we are expecting to fall through.
Notice that in this particular case I placed the "fall through" comment
on its own line, which is what GCC is expecting to find.
Signed-off-by: Gustavo A. R. Silva
In preparation to enabling -Wimplicit-fallthrough, mark switch cases
where we are expecting to fall through.
Notice that in this particular case I placed the "fall through" comment
on its own line, which is what GCC is expecting to find.
Signed-off-by: Gustavo A. R. Silva
---
Changes in v2:
From: Elena Reshetova
Date: Fri, 20 Oct 2017 10:23:34 +0300
> Note: these are the last patches related to networking that perform
> conversion of refcounters from atomic_t to refcount_t.
> In contrast to the core network refcounter conversions that
> were merged
From: Elena Reshetova
Date: Fri, 20 Oct 2017 10:23:34 +0300
> Note: these are the last patches related to networking that perform
> conversion of refcounters from atomic_t to refcount_t.
> In contrast to the core network refcounter conversions that
> were merged earlier, these are much more
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