Zhenzhong,
The machine is running test this weekend, I'll try your simple fix next
week.
All,
We're not aware of a specific customer need for acpi_pm/PMTMR,
but if we must keep acpi_pm/PMTMR in the kernel, let's fix it so it
actually works, even on machine like ours.
On our hardware currently
Roger from SUSE reported the touchpad on Lenovo yoga2 crush sometimes.
He found that rmmod/modprobe elan_i2c will recover the issue.
He add the workaround on SUSE and solve the problem.
Recently, the workaround fails in kernel 4.20 becasue IRQ mismatch.
genirq: Flags mismatch irq 0. 2002
Hi Boris,
On Sat, Feb 2, 2019 at 12:53 AM Boris Brezillon wrote:
>
> Hi Masahiro,
>
> On Fri, 1 Feb 2019 19:27:46 +0900
> Masahiro Yamada wrote:
>
> > Hi.
> >
> >
> > When I was looking into the NAND controller/chips separation,
> > this question popped up in my mind.
> >
> >
> > Commit
On 02/01/2019 07:06 PM, Colin King wrote:
> From: Colin Ian King
>
> Variable i is declared and never used. Fix this by removing it.
A fix for this is already pending in a pull request.
Regards,
Hans
>
> Signed-off-by: Colin Ian King
> ---
>
On Sat, 2 Feb 2019 04:07:46 +
wrote:
> From: Tudor Ambarus
>
> The sam9x60 qspi controller uses 2 clocks, one for the peripheral register
> access, the other for the qspi core and phy. Both are mandatory. It uses
> different transfer type bits in IFR register. It has dedicated registers
>
tty_set_termios() should be called with slave side of pty driver. So, If
tty driver is pty master, it needs to be switched to ->link.
Reported-by: syzbot+a950165cbb86bdd02...@syzkaller.appspotmail.com
Signed-off-by: Myungho Jung
---
drivers/bluetooth/hci_ldisc.c | 27 ++-
On Sat, 2 Feb 2019 04:07:44 +
wrote:
> From: Tudor Ambarus
>
> The sam9x60 qspi controller uses 2 clocks, one for the peripheral register
> access, the other for the qspi core and phy. Both are mandatory.
>
> Signed-off-by: Tudor Ambarus
Reviewed-by: Boris Brezillon
> ---
> v3: "pclk"
On Sat, 2 Feb 2019 04:07:41 +
wrote:
> From: Tudor Ambarus
>
> Naming clocks is a good practice. Keep supporting unnamed
> peripheral clock, to be backward compatible with old DTs.
> While here, rename clk to pclk, to indicate that it is a
> peripheral clock.
>
> Suggested-by: Boris
On Sat, 2 Feb 2019 04:07:39 +
wrote:
> From: Tudor Ambarus
>
> Naming clocks is a good practice. Make "pclk" madatory even if
> we support unnamed clock in the driver, to be backward compatible
> with old DTs.
>
> Suggested-by: Boris Brezillon
> Signed-off-by: Tudor Ambarus
> ---
> v3:
On Sat, 2 Feb 2019 04:07:33 +
wrote:
> From: Tudor Ambarus
>
> Remove NOP when setting read transfer type. Remove useless
> setting of write transfer type when
> op->data.dir == SPI_MEM_DATA_IN && !op->data.nbytes.
>
> QSPI_IFR_TFRTYP_TRSFR_WRITE is specific just to sama5d2 qspi,
> rename
On Sat, 2 Feb 2019 04:07:22 +
wrote:
> From: Tudor Ambarus
>
> Let general names to core drivers.
>
> Signed-off-by: Tudor Ambarus
Reviewed-by: Boris Brezillon
> ---
> v3: no change
> v2: update after the removing of iomem access wrappers
>
> drivers/spi/atmel-quadspi.c | 16
On Sat, 2 Feb 2019 04:07:19 +
wrote:
> From: Tudor Ambarus
>
> The wrappers hid that the accesses are relaxed. Drop them.
>
> Suggested-by: Boris Brezillon
> Signed-off-by: Tudor Ambarus
> ---
> v3: no change
> v2: new patch
>
> drivers/spi/atmel-quadspi.c | 47
>
On Fri, Feb 01, 2019 at 11:46:00AM +, Jean-Philippe Brucker wrote:
> On 01/02/2019 03:51, Peter Xu wrote:
> > On Thu, Jan 31, 2019 at 12:25:40PM +, Jean-Philippe Brucker wrote:
> >> On 31/01/2019 07:59, Peter Xu wrote:
> >>> On Wed, Jan 30, 2019 at 12:27:40PM +, Jean-Philippe Brucker
On Sat, 2 Feb 2019 04:07:13 +
wrote:
> From: Tudor Ambarus
>
> Cache Serial Memory Mode (SMM) value to avoid write access when
> setting the controller in serial memory mode. SMM is set in
> exec_op() and not at probe time, to let room for future regular
> SPI support.
>
> Signed-off-by:
On Wed, Dec 26, 2018 at 09:15:00PM +0800, Fengguang Wu wrote:
> VM is associated with an address space and not a specific thread.
>
> >From Documentation/virtual/kvm/api.txt:
>Only run VM ioctls from the same process (address space) that was used
>to create the VM.
Hi, Fengguang,
AFAIU
Hi,
On 01/02/2019 4.34, Christopher Lameter wrote:
On Fri, 1 Feb 2019, Tobin C. Harding wrote:
Currently when displaying /proc/slabinfo if any cache names are too long
then the output columns are not aligned. We could do something fancy to
get the maximum length of any cache name in the
I have working on the sm712fb driver for a while and have some familiarity
with this hardware, I'll be helping working on and testing problems of this
driver, so add myself to the MAINTAINERS file.
Signed-off-by: Yifeng Li
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git
This commit adds I/O macros and functions related to 2D opeartions.
A hunk of hardware register definitions are taken verbatim from
OpenBSD.
In addition, a utility function pad_to_dword() is added to help
padding data for the 2D engine. It accepts 3, 2, or 1 byte(s) of
data, and pads it to a
Previously, in staging/sm7xxfb (now fbdev/sm712fb), 2D acceleration
was implemented, but after its submission, a critical bug that causes
total system hang was discovered, as a stopgap measure, 2D ops was
completele removed in commit 3af805735a25 ("staging: sm7xx: remove the
buggy 2D acceleration
This commits update the Kconfig description of sm712fb,
and inform the user about the existence of documentation.
Signed-off-by: Yifeng Li
---
drivers/video/fbdev/Kconfig | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/video/fbdev/Kconfig b/drivers/video/fbdev/Kconfig
index
This commit converts "unsigned int" and "int" in I/O wrappers
to "u8". It improves readability since it's consistent with
the prototypes of readb() and writeb(). More importantly, it
reduces readers' confusion, since the upcoming 2D acceleration
code will use a different wordsize.
Signed-off-by:
The modesetting in sm712fb is an ugly hack. First, all the registers
are programmed by hardcoded register arrays, which makes it difficult
to support different variations of color depths, refresh rates, CRT/LCD
panel, etc of the same resolution. Second, it means the standard
fb_find_mode() cannot
My implementation of 2D acceleration used the original buggy code
in the staging tree (which had been removed due to a critical bug
soon after its submission), also, OpenBSD's smfb.c driver written
by Miodrag Vallat was another important source of reference, a
hunk of hardware register definitions
Previously, in staging/sm7xxfb (now fbdev/sm712fb), 2D acceleration
was implemented, but after its submission, a critical bug that causes
total system hang was discovered, as a stopgap measure, 2D ops was
completele removed in commit 3af805735a25 ("staging: sm7xx: remove the
buggy 2D acceleration
This commits add information about 32-bit color, 2D acceleration,
as well as adding additional, general information about the hardware
and many existing problems of the sm712fb driver.
Signed-off-by: Yifeng Li
---
Documentation/fb/sm712fb.txt | 123 +++
1 file
On Tue, 2019-01-15 at 19:22 -0700, Jerry Hoemann wrote:
> On Mon, Jan 14, 2019 at 07:36:13AM +0500, Ivan Mironov wrote:
> > Hi,
> >
> > I found out that hpwdt alters NMI behaviour unexpectedly if compiled
> > with enabled CONFIG_HPWDT_NMI_DECODING:
> >
> > * System starts to panic on any NMI
Hi Robin:
Thanks for your review.
On Sat, Feb 2, 2019 at 1:00 AM Robin Murphy wrote:
>
> On 31/01/2019 10:17, lantianyu1...@gmail.com wrote:
> > From: Lan Tianyu
> >
> > On the bare metal, enabling X2APIC mode requires interrupt remapping
> > function which helps to deliver irq to
On Sat, 2 Feb 2019 06:58:27 +0100
Andreas Kemnade wrote:
> Enabling off mode was only reachable deeply hidden
> in the debugfs. As powersaving is an important feature,
> move the option out of its shady place.
> The debugfs file can still be used to override the default.
oops, this should be
Hi Sasha:
Thanks for your review.
On Fri, Feb 1, 2019 at 10:51 PM Sasha Levin wrote:
>
> Hi Tianyu,
>
> Few comments below.
>
> On Thu, Jan 31, 2019 at 06:17:32PM +0800, lantianyu1...@gmail.com wrote:
> >From: Lan Tianyu
> >
> >On the bare metal, enabling X2APIC mode requires
Enabling off mode was only reachable deeply hidden
in the debugfs. As powersaving is an important feature,
move the option out of its shady place.
The debugfs file can still be used to override the default.
Signed-off-by: Andreas Kemnade
---
arch/arm/mach-omap2/Kconfig| 8
On Fri, Feb 1, 2019 at 6:17 PM Dexuan Cui wrote:
> > From: Dan Williams
[..]
> > Honestly, the quickest path to something functional for Linux is to
> > simply delete the _LSR support and use raw mode defined namespaces.
> > Why have labels if they are read-only and the region is sufficient for
On Fri, Feb 1, 2019 at 7:32 PM Dexuan Cui wrote:
>
> > From: Dan Williams
> > Sent: Friday, February 1, 2019 5:29 PM
> > ...
> > Honestly, the quickest path to something functional for Linux is to
> > simply delete the _LSR support and use raw mode defined namespaces.
> > Why have labels if they
==Introduction==
A split lock is any atomic operation whose operand crosses two cache
lines. Since the operand spans two cache lines and the operation must
be atomic, the system locks the bus while the CPU accesses the two cache
lines.
During bus locking, request from other CPUs or bus agents
Currently only one kernel option "clearcpuid=" can be picked up by
kernel during boot time.
In some cases, user may want to clear a few cpu caps. This may be
useful to replace endless (new) kernel options like nosmep, nosmap,
etc.
We add support of multiple clearcpuid options to allow user to
The kernel option clearcpuid currently only takes feature bit which
can be changed from kernel to kernel.
Extend clearcpuid to use cap flag string, which is defined in
x86_cap_flags[] and won't be changed from kernel to kernel.
And user can easily get the cap flag string from /proc/cpuinfo.
On some platforms, a feature (e.g. #AC for split lock) may not be
enumerated by CPUID or non architectural way in IA32_CORE_CAPABILITY.
To enable the feature on the platforms, a new kernel option setcpuid
is added.
The feature is defined in cpufeatures.h. The kernel option setcpuid
takes either
There may be different considerations on how to handle #AC for split lock,
e.g. how to handle system hang caused by split lock issue in firmware,
how to emulate faulting instruction, etc. We use a simple method to
handle user and kernel split lock and may extend the method in the future.
When #AC
Since kernel option clearcpuid now supports multiple options and CPU
capability flags, the document needs to be changed.
Signed-off-by: Fenghua Yu
---
Documentation/admin-guide/kernel-parameters.txt | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git
cpu_caps_cleared and cpu_caps_set may not be aligned to unsigned long.
Atomic operations (i.e. set_bit and clear_bit) on the bitmaps may access
two cache lines (a.k.a. split lock) and lock bus to block all memory
accesses from other processors to ensure atomicity.
To avoid the overall performance
A bit in reg_ch_conf_pending in wl271 and tmp_ch_bitmap is set atomically
by set_bit(). set_bit() sets the bit in a single unsigned long location. If
the variables are not aligned to unsigned long, set_bit() accesses two
cache lines and thus causes slower performance. On x86, this scenario is
set_cpu_cap() calls locked BTS and clear_cpu_cap() calls locked BTR to
operate on bitmap defined in x86_capability.
Locked BTS/BTR accesses a single unsigned long location. In 64-bit mode,
the location is at:
base address of x86_capability + (bit offset in x86_capability % 64) * 8
Since base
A bit in pwol_mask is set in b44_magic_pattern automatically by set_bit.
set_bit sets the bit in a single unsigned long location. Since pwol_mask
may not be aligned to unsigned long, the location may cross two cache
lines and accessing the location degradates performance. On x86, accessing
two
The feature is Linux specific. If the feature is enumerated or
enabled by "setcpuid=ac_split_lock", the bit is set.
Signed-off-by: Fenghua Yu
---
arch/x86/include/asm/cpufeatures.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/include/asm/cpufeatures.h
I, Mikhail Fridman have selected you specifically as one of my beneficiaries
for my Charitable Donation of $5 Million Dollars,
Check the link below for confirmation:
https://www.rt.com/business/343781-mikhail-fridman-will-charity/
I await your earliest response for further directives.
Best
On Tue, 2019-01-15 at 19:30 -0700, Jerry Hoemann wrote:
> On Mon, Jan 14, 2019 at 07:36:17AM +0500, Ivan Mironov wrote:
> > This adds an option to not panic on NMI even if it was caused by iLO.
> >
> > Signed-off-by: Ivan Mironov
> > ---
> > drivers/watchdog/hpwdt.c | 19 ---
> >
On Tue, 2019-01-15 at 19:27 -0700, Jerry Hoemann wrote:
> On Mon, Jan 14, 2019 at 07:36:14AM +0500, Ivan Mironov wrote:
> > Existing code disables watchdog on NMI right before completely hanging
> > the system.
> >
> > There are two problems here:
> >
> > * First, watchdog is expected to reset
Hi,
I'm running an Ubuntu "mainline" kernel[0] as a Xen 4.11.1 DomU (PV) and
ever since upgrading to Linux 5.0-rcX I get these WARNING messages shown
below. Going back in my logs[1] I can see that I got a similar messages
for v4.20 too, but with v5.0 they appear more often and upgrading from
This patch adds HDMI sound (I2S0) node and remove dma properties
from UART2 node for rock64.
The DMAC of rk3328 can use 8 channels at same time. Currently, total
7 channels are used as follows:
- I2S1 2ch
- UART2 2ch
- SPDIF 1ch
- SPI0 2ch
HDMI audio using I2S0 that requires 2ch but
Le 2/1/19 à 7:45 PM, Jakub Kicinski a écrit :
> On Fri, 1 Feb 2019 14:06:55 -0800, Florian Fainelli wrote:
>> Following patches will change the way we communicate getting or setting
>> a port's attribute and use a blocking notifier to perform those tasks.
>>
>> Prepare nfp to support receiving
After 4effd28c1245 ("bridge: join all-snoopers multicast address"), I
started seeing the following sleep in atomic warnings:
[ 26.763893] BUG: sleeping function called from invalid context at
mm/slab.h:421
[ 26.771425] in_atomic(): 1, irqs_disabled(): 0, pid: 1658, name: sh
[ 26.777855]
From: Tudor Ambarus
Cosmetic change, no functional change.
Signed-off-by: Tudor Ambarus
Reviewed-by: Boris Brezillon
---
v3: no change
v2: collect R-b
drivers/spi/atmel-quadspi.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/spi/atmel-quadspi.c
From: Tudor Ambarus
The wrappers hid that the accesses are relaxed. Drop them.
Suggested-by: Boris Brezillon
Signed-off-by: Tudor Ambarus
---
v3: no change
v2: new patch
drivers/spi/atmel-quadspi.c | 47 +++--
1 file changed, 20 insertions(+), 27
From: Tudor Ambarus
Remove NOP when setting read transfer type. Remove useless
setting of write transfer type when
op->data.dir == SPI_MEM_DATA_IN && !op->data.nbytes.
QSPI_IFR_TFRTYP_TRSFR_WRITE is specific just to sama5d2 qspi,
rename it to QSPI_IFR_SAMA5D2_WRITE_TRSFR.
Signed-off-by: Tudor
From: Tudor Ambarus
The sam9x60 qspi controller uses 2 clocks, one for the peripheral register
access, the other for the qspi core and phy. Both are mandatory.
Signed-off-by: Tudor Ambarus
---
v3: "pclk" was made mandatory in previous patch. Reword clock
descriptions.
v2:
- make "pclk"
From: Tudor Ambarus
Adopt the SPDX license identifiers to ease license compliance
management.
Signed-off-by: Tudor Ambarus
Reviewed-by: Boris Brezillon
---
v3: no change
v2: collect R-b
drivers/spi/atmel-quadspi.c | 13 +
1 file changed, 1 insertion(+), 12 deletions(-)
diff
From: Tudor Ambarus
Introduced in:
commit b60557876849 ("ARM: dts: at91: sama5d2: switch to new clock binding")
Signed-off-by: Tudor Ambarus
Reviewed-by: Boris Brezillon
---
v3: no change
v2: collect R-b
Documentation/devicetree/bindings/spi/atmel-quadspi.txt | 2 +-
1 file changed, 1
From: Tudor Ambarus
Let general names to core drivers.
Signed-off-by: Tudor Ambarus
---
v3: no change
v2: update after the removing of iomem access wrappers
drivers/spi/atmel-quadspi.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git
From: Tudor Ambarus
Naming clocks is a good practice. Make "pclk" madatory even if
we support unnamed clock in the driver, to be backward compatible
with old DTs.
Suggested-by: Boris Brezillon
Signed-off-by: Tudor Ambarus
---
v3: new patch
From: Tudor Ambarus
The sam9x60 qspi controller uses 2 clocks, one for the peripheral register
access, the other for the qspi core and phy. Both are mandatory. It uses
different transfer type bits in IFR register. It has dedicated registers
to specify a read or a write instruction: Read
From: Tudor Ambarus
Return -ENOTSUPP when atmel_qspi_find_mode() fails. Propagate
the error in atmel_qspi_exec_op().
Signed-off-by: Tudor Ambarus
Reviewed-by: Boris Brezillon
---
v3: no change
v2: collect R-b
drivers/spi/atmel-quadspi.c | 4 ++--
1 file changed, 2 insertions(+), 2
From: Tudor Ambarus
The cast is done implicitly.
Signed-off-by: Tudor Ambarus
Reviewed-by: Boris Brezillon
---
v3: no change
v2: collect R-b
drivers/spi/atmel-quadspi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/spi/atmel-quadspi.c
From: Tudor Ambarus
Naming clocks is a good practice. Keep supporting unnamed
peripheral clock, to be backward compatible with old DTs.
While here, rename clk to pclk, to indicate that it is a
peripheral clock.
Suggested-by: Boris Brezillon
Signed-off-by: Tudor Ambarus
---
v3: new patch
From: Tudor Ambarus
Cache Serial Memory Mode (SMM) value to avoid write access when
setting the controller in serial memory mode. SMM is set in
exec_op() and not at probe time, to let room for future regular
SPI support.
Signed-off-by: Tudor Ambarus
---
v3: update smm value when different.
On Fri, Feb 01, 2019 at 05:16:01PM -0500, Michael S. Tsirkin wrote:
> There's no reason to expose struct vring_packed in UAPI - if we do we
> won't be able to change or drop it, and it's not part of any interface.
>
> Let's move it to virtio_ring.c
>
> Cc: Tiwei Bie
> Signed-off-by: Michael S.
From: Tudor Ambarus
Patches from 1 to 11 are minor fixes or cosmetics.
Patches 12 and 13 introduce the sam9x60 qspi controller.
sam9x60 qspi controller tested with sst26vf064b jedec,spi-nor flash.
Backward compatibility test done on sama5d2 qspi controller and
mx25l25635e jedec,spi-nor flash.
Remove audit_context from struct task_struct and struct audit_buffer
when CONFIG_AUDIT is enabled but CONFIG_AUDITSYSCALL is not.
Also, audit_log_name() (and supporting inode and fcaps functions) should
have been put back in auditsc.c when soft and hard link logging was
normalized since it is
On Fri, 1 Feb 2019 14:06:55 -0800, Florian Fainelli wrote:
> Following patches will change the way we communicate getting or setting
> a port's attribute and use a blocking notifier to perform those tasks.
>
> Prepare nfp to support receiving notifier events targeting
> SWITCHDEV_PORT_ATTR_GET
On Sat, Feb 2, 2019 at 12:14 PM Balbir Singh wrote:
>
> On Tue, Jan 22, 2019 at 10:57:21AM -0500, Joe Lawrence wrote:
> > From: Nicolai Stange
> >
> > The ppc64 specific implementation of the reliable stacktracer,
> > save_stack_trace_tsk_reliable(), bails out and reports an "unreliable
> >
> From: Dan Williams
> Sent: Friday, February 1, 2019 5:29 PM
> ...
> Honestly, the quickest path to something functional for Linux is to
> simply delete the _LSR support and use raw mode defined namespaces.
> Why have labels if they are read-only and the region is sufficient for
> defining
> On Feb 2, 2019, at 12:28 AM, Willem de Bruijn
> wrote:
>
>> On Fri, Feb 1, 2019 at 7:48 AM Deepa Dinamani wrote:
>>
>> From: Arnd Bergmann
>>
>> This is a cleanup to prepare for the addition of 64-bit time_t
>> in O_SNDTIMEO/O_RCVTIMEO. The existing compat handler seems
>>
On Fri, 2019-02-01 at 11:42 +1100, Tobin C. Harding wrote:
> Increase the width of the first column (cache name) in the output of
> /proc/slabinfo from 17 to 30 characters.
Do you care if this breaks any parsing of /proc/slabinfo?
I don't but someone might.
On 2/1/19 1:24 PM, Ravi Bangoria wrote:
> I ran fuzzer for couple of hours but I didn't see any crash with
> your previous patch.
>
> I'll try this newer one as well.
I ran fuzzer for ~8 hrs and no lockup so far.
Thanks.
On 2019/2/2 上午6:16, Michael S. Tsirkin wrote:
There's no reason to expose struct vring_packed in UAPI - if we do we
won't be able to change or drop it, and it's not part of any interface.
Let's move it to virtio_ring.c
Cc: Tiwei Bie
Signed-off-by: Michael S. Tsirkin
---
On 02/01/2019 05:15 PM, Marc Zyngier wrote:
Hi Xulin,
On 01/02/2019 06:11, Sun Ted wrote:
Hi Marc,
Marc Zyngier mailto:marc.zyng...@arm.com>> 于2018
年9月22日周六 上午4:03写道：
The GICv3 architecture has the remarkable feature that once LPI tables
have been assigned to redistributors and
On Fri, Feb 01, 2019 at 01:08:31PM -0500, Prarit Bhargava wrote:
> After 43838a23a05f ("random: fix crng_ready() test") early boot calls to
> get_random_bytes() will warn on x86 because the crng is not initialized.
> For example,
>
> random: get_random_bytes called from start_kernel+0x8e/0x587
On Fri, Feb 1, 2019 at 12:54 PM Chang S. Bae wrote:
>
> The helper functions will switch on faster accesses to FSBASE and GSBASE
> when the FSGSBASE feature is enabled.
>
> Accessing user GSBASE needs a couple of SWAPGS operations. It is avoidable
> if the user GSBASE is saved at kernel entry,
On Fri, Feb 1, 2019 at 12:54 PM Chang S. Bae wrote:
>
> From: Andi Kleen
>
> Add C intrinsics and assembler macros for the new FSBASE and GSBASE
> instructions.
>
> Very straight forward. Used in followon patches.
>
> [ luto: Rename the variables from FS and GS to FSBASE and GSBASE and
> make
On 2019/1/31 22:26, Thomas Gleixner wrote:
On Thu, 31 Jan 2019, Zhenzhong Duan wrote:
On 2019/1/30 16:06, Thomas Gleixner wrote:
On Tue, 22 Jan 2019, Zhenzhong Duan wrote:
On a large system with many CPUs, using PMTMR as the clock source can
have a significant impact on the overall system
Make MDIO child optional and only instantiate the
MDIO bus if the child is actually present.
There are currently no (in-tree) users of this
binding; all (out-of-tree) users use overlays that
get shipped together with the FPGA images that contain
the IP.
This will significantly increase
Hi Joerg:
Thanks for your review.
On Sat, Feb 2, 2019 at 12:34 AM Joerg Roedel wrote:
>
> Hi,
>
> On Thu, Jan 31, 2019 at 06:17:32PM +0800, lantianyu1...@gmail.com wrote:
> > +config HYPERV_IOMMU
> > + bool "Hyper-V stub IOMMU support"
>
> This is not a real IOMMU driver, it
On Fri, Feb 1, 2019 at 12:54 PM Chang S. Bae wrote:
>
> It helps to use some new instructions directly in inline assembly.
akpm, can you ack this patch? AFAIK you are the only, or at least
most vocal, user of ancient userspace to build new kernels. Are you
okay with this?
>
> Suggested-by:
On Fri, Feb 1, 2019 at 12:54 PM Chang S. Bae wrote:
>
> For testing (or root-only) purposes, the new flag will serve to tag the
> kernel taint accurately.
>
> When adding a new feature support, patches need to be incrementally
> applied and tested with temporal parameters. Currently, there is no
Hi hpa-
A while back, you were working on some patches to make modify_ldt()
play better with this series. What happened to them?
--Andy
On 2019/2/1 23:39, Herbert Xu wrote:
> On Fri, Feb 01, 2019 at 03:15:54PM +0800, Zhou Wang wrote:
>>
>>> Polling in softirq context is unacceptable. Can't your hardware
>>> send interrupts to signal completion? What is the average speed
>>> of processing a single 1500-byte packet on your
> From: Dan Williams
> Sent: Friday, February 1, 2019 5:29 PM
> > ...
> > The "size" and "mode" still don't look right, but the improvement is that
> > now I can see a good descriptive "name", which I suppose is retrieved
> > from Hyper-V.
>
> Mode is right, there is no way for Hyper-V to create
Thanks for helping to track down this bug. Since the problem occurs only
with a few Linux kernel versions and affects Emacs only when doing CPU
profiling, it doesn't seem worth spending time to try to patch Emacs to
work around the bug. So I installed the attached patch into emacs-26's
On 2019/2/1 17:28, Marc Zyngier wrote:
> On 01/02/2019 06:41, Zheng Xiang wrote:
>>
>> On 2019/1/31 23:12, Marc Zyngier wrote:
>>> Hi Zeng,
>>>
>>> On 31/01/2019 14:47, Zheng Xiang wrote:
Hi Marc,
On 2019/1/29 13:42, Zheng Xiang wrote:
> On 2019/1/28 21:51, Marc Zyngier wrote:
From: Lan Tianyu
This patch is to introduce tlb flush with range list interface and use
struct kvm_mmu_page as list entry. Use flush list function in the
kvm_mmu_commit_zap_page().
Signed-off-by: Lan Tianyu
---
arch/x86/kvm/mmu.c | 25 -
1 file changed, 24
From: Lan Tianyu
Populate ranges on the flush list into struct hv_guest_mapping_flush_list
when flush list is available in the struct kvm_tlb_range.
Signed-off-by: Lan Tianyu
---
Change since v1:
Make flush list as a "hlist" instead of a "list" in order to
keep struct
From: Lan Tianyu
This patch is to flush tlb via flush list function. Put
page into flush list when return value of set_spte()
includes flag SET_SPTE_NEED_REMOTE_TLB_FLUSH. kvm_flush_remote_
tlbs_with_list() checks whether the flush list is empty
or not. It also checks whether range tlb flush is
From: Lan Tianyu
This patch is to use tlb range flush to flush memslot's in the
kvm_vm_ioctl_get/clear_dirty_log() instead of flushing tlbs
of entire ept page table when range flush is available.
Signed-off-by: Lan Tianyu
---
arch/x86/kvm/mmu.c | 8 +---
arch/x86/kvm/mmu.h | 7 +++
From: Lan Tianyu
This patch is to flush tlb directly in the kvm_mmu_slot_gfn_write_protect()
when range flush is available.
Signed-off-by: Lan Tianyu
---
arch/x86/kvm/mmu.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index
From: Lan Tianyu
This patch is to add kvm_get_memslot() to get struct kvm_memory_slot
via slot it and remove redundant codes. The function will also be used
in the following changes.
Signed-off-by: Lan Tianyu
---
include/linux/kvm_host.h | 1 +
virt/kvm/kvm_main.c | 45
From: Lan Tianyu
This patch is to add flush parameter for kvm_aga_hva() and move tlb
flush from kvm_mmu_notifier_clear_flush_young() to kvm_age_hva().
kvm_age_hva() can check whether tlb flush is necessary when
return value young is more than 0. Flush tlb if both conditions
are met.
From: Lan Tianyu
This patch is to add last_level in the struct kvm_mmu_page. When build
flush tlb range list, last_level will be used to identify whehter the
page should be added into list.
Signed-off-by: Lan Tianyu
---
arch/x86/include/asm/kvm_host.h | 1 +
arch/x86/kvm/mmu.c |
From: Lan Tianyu
Add parameter offset to specify start position to add flush ranges in
guest address list of struct hv_guest_mapping_flush_list.
Signed-off-by: Lan Tianyu
---
arch/x86/hyperv/nested.c| 4 ++--
arch/x86/include/asm/mshyperv.h | 2 +-
arch/x86/kvm/vmx/vmx.c | 2
From: Lan Tianyu
This patchset is to introduce hv ept tlb range list flush function
support in the KVM MMU component. Flushing ept tlbs of several address
range can be done via single hypercall and new list flush function is
used in the kvm_mmu_commit_zap_page() and FNAME(sync_page). This
On Fri, 2019-02-01 at 14:37 +0100, Sam Ravnborg wrote:
> Hi Thierry.
>
> > I'm slightly on the fence about this patch.
>
> Please ignore patch 3-19, there is no consensus on the logging changes.
> We do not want to apply these and then have to redo parts/all of
> it later.
>
> But the first two
John Stultz wrote:
> On Fri, Feb 1, 2019 at 4:46 PM Thinh Nguyen wrote:
>> John Stultz wrote:
>>> On Fri, Feb 1, 2019 at 4:18 PM John Stultz wrote:
>>> Bisecting the changes down, it seems like its due to commit
>>> fec9095bdef4e ("usb: dwc3: gadget: remove wait_end_transfer").
>>>
>>> It
On Fri, Feb 1, 2019 at 5:06 PM Dexuan Cui wrote:
>
> > From: Linux-nvdimm On Behalf Of
> > Dexuan Cui
> > Sent: Friday, February 1, 2019 4:34 PM
> > > > > ...
> > > > > Those reads find a namespace index block
> > > > > and a label. Unfortunately the label has the LOCAL flag set and Linux
> > >
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