On 4/5/19 11:15 PM, Thomas Gleixner wrote:
> On Mon, 1 Apr 2019, Daniel Bristot de Oliveira wrote:
>
>> Currently, the irq_vectors is showing the entry and exit events for
>> the interrupts of the architecture, but not for external interrupts.
>
> Those are covered by the irq tracepoints. Is
AM5 and DRA7 SoC families have different set of modules
in them so the SoC sepecific dtsi files need to be separated.
e.g. Some of the major differences between AM576 and DRA76
DRA76x AM576x
USB3x
USB4x
ATL x
VCP x
MLB
Hi Lee,
The reason I'm sending this patch series is to clarify the build
dependencies of the following patches:
[PATCH 1/2] mfd: cros_ec: instantiate properly CrOS FP MCU device
[PATCH 2/2] mfd: cros_ec: instantiate properly CrOS Touchpad MCU device
and I also included this patch in the series:
Support Touchpad MCU as a special of CrOS EC devices. The current
Touchpad MCU is used on Eve Chromebook and used the same protocol as
other CrOS EC devices.
When a MCU has touchpad support (aka EC_FEATURE_TOUCHPAD), it is
instantiated as a special CrOS EC device with device name 'cros_tp'. So
From: Rushikesh S Kadam
Integrated Sensor Hub (ISH) is also a MCU running EC
having feature bit EC_FEATURE_ISH. Instantiate it as
a special CrOS EC device with device name 'cros_ish'.
Signed-off-by: Rushikesh S Kadam
Reviewed-by: Gwendal Grignou
Reviewed-by: Andy Shevchenko
Signed-off-by:
Update the feature enum for the Chromebook Embedded Controller to the
latest version. Some of these enums are still not used in the kernel but
we might be also interested on have these enums up to date. Userspace
can use them to query the features to the EC via the cros-ec character
device.
While
Support Fingerprint MCU as a special of CrOS EC devices. The current FP
MCU uses the same EC SPI protocol v3 as other CrOS EC devices on a SPI
bus.
When a MCU has fingerprint support (aka EC_FEATURE_FINGERPRINT), it is
instantiated as a special CrOS EC device with device name 'cros_fp'. So
Hi!
> > > > > This document also states "The naming scheme above leaves scope
> > > > > for further attributes should they be needed". It does not permit,
> > > > > however, to redefine one of the fields to mean "location", much less
> > > > > the declaration that a devicename of "platform" shall
Hi Paul,
On Sun, Apr 07, 2019 at 09:07:57PM +0200, Paul Cercueil wrote:
> Hi Sebastian,
>
> Le dim. 7 avril 2019 à 18:52, Sebastian Reichel a écrit :
> > Hi,
> >
> > On Sun, Mar 24, 2019 at 03:31:37PM +, Jonathan Cameron wrote:
> > > On Sat, 23 Mar 2019 18:28:09 +0100
> > > Artur Rojek
Subject: x86/kconfig: Add ...
On Mon, Apr 08, 2019 at 04:12:08PM +0800, Zhao Yakui wrote:
> Now the CONFIG_HYPERV and CONFIG_XEN can be used to control the definition
> /usage of hv_irq_callback_count. If another linux guest also needs to use
> the hv_irq_callback_count, current conditional
This patch adds the HDMI, CVBS and CEC attributes and nodes to support
full display on the U200 Reference Design.
AO-CEC-B is used by default and AO-CEC-A is disabled.
Signed-off-by: Neil Armstrong
---
.../boot/dts/amlogic/meson-g12a-u200.dts | 54 +++
1 file changed, 54
Add VPU and HDMI display support.
Signed-off-by: Neil Armstrong
---
arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 131
1 file changed, 131 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
index
This patchset adds nodes for Video Display support.
Dependencies :
- patch 1: VPU, HDMI & Power Controller bindings to be applied
- patch 2: Depends on AO-CEC-B bindings to be applied
- patch 3, 4, 5: Patch 1
Changes since v1:
- Added support for AO-CEC-B, enabling AO-CEC-B and disabling
This patch adds the HDMI, CVBS and CEC attributes and nodes to support
full display on the X96 Max STB.
AO-CEC-B is used by default and AO-CEC-A is disabled.
Signed-off-by: Neil Armstrong
---
.../boot/dts/amlogic/meson-g12a-x96-max.dts | 54 +++
1 file changed, 54
Amlogic G12A embeds 2 CEC controllers :
- AO-CEC-A the same controller as in GXBB, GXL & GXM SoCs
- AO-CEC-B is a new controller
Note, the two controller can work simultanously since 2 Pads can
handle CEC, thus this SoC can handle 2 distinct CEC busses.
This patch adds the nodes for the AO-CEC-A
This patch adds the HDMI, CVBS and CEC attributes and nodes to support
full display on the SEI510 STB.
AO-CEC-B is used by default and AO-CEC-A is disabled.
Signed-off-by: Neil Armstrong
---
.../boot/dts/amlogic/meson-g12a-sei510.dts| 53 +++
1 file changed, 53
On Fri, Apr 05, 2019 at 08:32:07PM +0300, Yury Norov wrote:
> Currently we parse user data byte after byte which leads to
> overcomplification of parsing algorithm. The only user of
> bitmap_parselist_user() is not performance-critical, and so we
> can duplicate user data to kernel buffer and
On 05/04/2019 16:28, Roger Quadros wrote:
> AM5 and DRA7 SoC families have different set of modules
> in them so the SoC sepecific dtsi files need to be separated.
>
> e.g. Some of the major differences between AM576 and DRA76
>
> DRA76x AM576x
>
> USB3 x
> USB4
Beelink GS1 is an Allwinner H6 based TV box,
which support:
- Allwinner H6 Quad-core 64-bit ARM Cortex-A53
- GPU Mali-T720
- 2GB LPDDR3 RAM
- AXP805 PMIC
- 1Gbps GMAC via RTL8211E
- FN-Link 6222B-SRB Wifi/BT
- 1x USB 2.0 Host and 1x USB 3.0 Host
- HDMI port
- S/PDIF Tx
- IR receiver
- 5V/2A DC
On Fri, Apr 05, 2019 at 09:49:17AM +0200, Stefano Garzarella wrote:
> On Thu, Apr 04, 2019 at 02:04:10PM -0400, Michael S. Tsirkin wrote:
> > On Thu, Apr 04, 2019 at 06:47:15PM +0200, Stefano Garzarella wrote:
> > > On Thu, Apr 04, 2019 at 11:52:46AM -0400, Michael S. Tsirkin wrote:
> > > > I
Shenzhen AZW Technology Co. Ltd. is a manufacturer specialized in Android
smart TV boxes, Intel mini PCs and home cloud TV boxes with NAS.
Add the vendor prefix for AZW.
Signed-off-by: Clément Péron
Reviewed-by: Robin Murphy
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1
Beelink GS1 device-tree has been introduced.
Add it to the sunxi yaml documentation.
Signed-off-by: Clément Péron
---
Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml
OrangePi One Plus and OrangePi Lite2 use the same PIO regulators.
Add this in the common device tree.
Signed-off-by: Clément Péron
---
.../boot/dts/allwinner/sun50i-h6-orangepi.dtsi | 17 +
1 file changed, 17 insertions(+)
diff --git
Add PIO regulators for Pine64 board.
Signed-off-by: Clément Péron
---
.../boot/dts/allwinner/sun50i-h6-pine-h64.dts | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
There is only one pinmuxing available for each MMC controller.
Move the pinctrl to the SOC
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi | 2 --
arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts | 4
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
Thanks to Jagan and Icenowy, most of this device-tree is taken from their works
on
the OrangePi One Plus and Pine H64.
PLEASE NOTE that I don't own an OrangePi nor a Pine H64 and PIO regualtors for
these
board has not been tested !
Please add a tested-by on these commits 5 and 6 before merging
On Mon, Apr 08, 2019 at 06:17:18AM +, Mickael GUENE wrote:
> Hi Sakari,
>
> On 4/6/19 13:01, Sakari Ailus wrote:
> > On Tue, Mar 26, 2019 at 02:36:41PM +, Mickael GUENE wrote:
> >> Sakari,
> >>
> +static int bpp_from_code(__u32 code)
> +{
> +switch (code) {
> +
From: Josh Poimboeuf
> Sent: 05 April 2019 18:23
> On Fri, Apr 05, 2019 at 05:17:15PM +, David Laight wrote:
> > > Hm, I don't see that in cmd_objtool, or any commits from you in
> > > scripts/Makefile.build.
> >
> > Not sure I remember actually committing them.
> > Maybe 'git diff' isn't
On Sun, Apr 7, 2019 at 11:10 PM Alexandre Belloni
wrote:
> Use SPDX-License-Identifier instead of the custom license line.
>
> Signed-off-by: Alexandre Belloni
Reviewed-by: Linus Walleij
Yours,
Linus Walleij
On Sun, Apr 7, 2019 at 11:10 PM Alexandre Belloni
wrote:
> Call the 64bit versions of rtc_tm time conversion now that the range is
> enforced by the core.
>
> Signed-off-by: Alexandre Belloni
Acked-by: Linus Walleij
Yours,
Linus Walleij
On Sun, Apr 7, 2019 at 11:10 PM Alexandre Belloni
wrote:
> Use .set_time instead of the deprecated .set_mmss.
>
> Signed-off-by: Alexandre Belloni
Acked-by: Linus Walleij
Yours,
Linus Walleij
On Sun, Apr 7, 2019 at 11:10 PM Alexandre Belloni
wrote:
> The COH 901 331 is a 32bit seconds counter.
>
> Signed-off-by: Alexandre Belloni
Acked-by: Linus Walleij
Yours,
Linus Walleij
On Mon, 1 Apr 2019 10:17:19 -0700
Douglas Anderson wrote:
> From: Sean Paul
>
> This patch adds the ability to override the typical display timing for a
> given panel. This is useful for devices which have timing constraints
> that do not apply across the entire display driver (eg: to avoid
>
Hi all,
here's v5 which keeps the HWCR functionality in kvm/x86.c so that
emulation of AMD guests on Intel hw still can work.
--
From: Borislav Petkov
The AMD hardware configuration register has some useful bits which can
be used by guests. Implement McStatusWrEn which can be used by guests
On Mon, Apr 08, 2019 at 10:53:37AM +0200, Lukas Wunner wrote:
> Hm, what other cases are there, i.e. what is the meaning of a tb_regs_hop's
> "next_hop" field if "out_port" doesn't have a remote? (And why does it
> need to be tracked on the out_port? In case a remote is added later?)
We also
On 08.04.19 08:59, Paul Zimmerman wrote:
> On Sun, Apr 7, 2019 at 10:53 PM Martin Kepplinger
> wrote:
>>
>> On 21.03.19 14:41, Jarkko Sakkinen wrote:
>>> On Tue, Mar 19, 2019 at 04:03:37PM -0700, Paul Zimmerman wrote:
So I bisected this down to:
# first bad commit:
Hey Marc,
Thanks for the review!
On 2019-04-08 14:24, Marc Gonzalez wrote:
On 08/04/2019 10:30, Sibi Sankar wrote:
On 2019-04-05 20:38, Marc Gonzalez wrote:
On 27/03/2019 13:38, Sibi Sankar wrote:
Add the shared cx/mx and sensor sub-system's cx and mx
power-domains found on MSM8998.
From: Colin Ian King
Currently the error return path does not close the file fp and leaks
a file descriptor. Fix this by closing the file.
Fixes: 5ea7647b333f ("tools/power turbostat: Warn on bad ACPI LPIT data")
Signed-off-by: Colin Ian King
---
tools/power/x86/turbostat/turbostat.c | 1 +
1
On 08/04/2019 10:30, Sibi Sankar wrote:
> On 2019-04-05 20:38, Marc Gonzalez wrote:
>> On 27/03/2019 13:38, Sibi Sankar wrote:
>>
>>> Add the shared cx/mx and sensor sub-system's cx and mx
>>> power-domains found on MSM8998.
>>>
>>> Signed-off-by: Sibi Sankar
>>> ---
>>> drivers/soc/qcom/rpmpd.c
On Mon, Apr 08, 2019 at 10:35:17AM +0300, Mika Westerberg wrote:
> On Sun, Apr 07, 2019 at 06:54:25PM +0200, Lukas Wunner wrote:
> > According to the code comment in struct tb_regs_hop (in tb_regs.h),
> > the out_hopid ("next_hop" in struct tb_regs_hop) denotes the
> > "hop to take after sending
DS3232 RTC has 236 bytes of persistent memory.
Add RTC SRAM read and write access using
the NVMEM Framework.
Signed-off-by: Nandor Han
---
Description
---
Provides DS3232 RTC SRAM access using NVMEM framework.
Testing
---
The test was done on a custom board which contains a
DS3232
On 4/6/19 12:44 AM, Alexandre Belloni wrote:
Hi,
On 05/04/2019 11:14:35+, Han Nandor wrote:
`
# hexdump -n 10 -C /sys/bus/nvmem/devices/ds3232_sram0/nvmem
74 65 73 74 69 6e 67 0a 00 00|testing...|
000a
`
Thanks for that nice description!
Glad
On 04/04/19 4:44 PM, Adam Ford wrote:
> On Thu, Apr 4, 2019 at 5:01 AM Bartosz Golaszewski wrote:
>>
>> śr., 3 kwi 2019 o 17:49 Adam Ford napisał(a):
>>>
>>> On Wed, Apr 3, 2019 at 7:50 AM Bartosz Golaszewski wrote:
śr., 27 mar 2019 o 12:14 Sekhar Nori napisał(a):
>
> Hi
Hello,
while writing tests for clock adjustment auditing [1] [2], I stumbled
upon a strange behavior of adjtimex(2) when setting the TAI offset...
Commit 153b5d054ac2 ("ntp: support for TAI") added a possibility to
change the TAI offset from userspace via adjtimex(2). The code checks
if the
On 4/8/19 10:22 AM, Peter Zijlstra wrote:
> On Mon, Apr 08, 2019 at 09:12:28AM +0200, Thomas-Mich Richter wrote:
>>> Does the below cure things? It's not exactly pretty, but it could just
>>> do the trick.
>>>
>>> ---
>>> diff --git a/kernel/events/core.c b/kernel/events/core.c
>>> index
Hi Claudiu,
On 14/03/2019 17:26, claudiu.bez...@microchip.com wrote:
> From: Claudiu Beznea
>
> Add driver for Microchip PIT64B timer. Timer could be used in continuous
> mode or oneshot mode. The hardware has 2x32 bit registers for period
> emulating a 64 bit timer. The LSB_PR and MSB_PR
Hi Mike,
On 2019/4/8 14:57, Mike Rapoport wrote:
> Hi,
>
> On Fri, Apr 05, 2019 at 11:47:27AM +0800, Chen Zhou wrote:
>> Hi Mike,
>>
>> On 2019/4/5 10:17, Chen Zhou wrote:
>>> Hi Mike,
>>>
>>> On 2019/4/4 22:44, Mike Rapoport wrote:
Hi,
On Wed, Apr 03, 2019 at 09:51:27PM +0800,
On 4/8/19 10:14 AM, Daniel Bristot de Oliveira wrote:
> Currently, the irq_vectors is showing the entry and exit events for
> the interrupts of the architecture, but not for external interrupts.
Oops... Sorry... Please, ignore this version...
-- Daniel
We used LockDoc to derive locking rules for each member
of struct transaction_t.
Based on those results, we extended the existing documentation
by more members of struct transaction_t, and updated the existing
documentation.
Signed-off-by: Alexander Lochmann
Signed-off-by: Horst Schirmeier
---
Thanks, Ted, for your feedback!
I'll submit a modified version.
- Alex
On 07.04.19 18:52, Theodore Ts'o wrote:
> On Mon, Mar 18, 2019 at 07:42:37PM +0100, Alexander Lochmann wrote:
>> /*t
>> - * Where in the log does this transaction's commit start? [no locking]
>> + * Where in the
On 2019-04-05 20:38, Marc Gonzalez wrote:
On 27/03/2019 13:38, Sibi Sankar wrote:
Add the shared cx/mx and sensor sub-system's cx and mx
power-domains found on MSM8998.
Signed-off-by: Sibi Sankar
---
drivers/soc/qcom/rpmpd.c | 36
1 file changed, 36
On Sat, Mar 2, 2019 at 2:53 AM Andreas Kemnade wrote:
>
> The Banana Pi M2 Zero board has an AP6212 BT+Wifi combo chip
> with broadcom internals attached to UART1 and some gpios.
^ Broadcom
> This addition is in line with similar boards
This sentence is unfinished.
>
> Signed-off-by:
From: Michal Hocko
arch_add_memory, __add_pages take a want_memblock which controls whether
the newly added memory should get the sysfs memblock user API (e.g.
ZONE_DEVICE users do not want/need this interface). Some callers even
want to control where do we allocate the memmap from by
From: Michal Hocko
check_pages_isolated_cb currently accounts the whole pfn range as being
offlined if test_pages_isolated suceeds on the range. This is based on
the assumption that all pages in the range are freed which is currently
the case in most cases but it won't be with later changes, as
v1 -> v2: Added David's feedback and his Reviewed-by
Hi,
these patches were posted as part of patchset [1], but it was agreed that
patch#3 must be further discussed.
Whole discussion can be seen in the cover letter.
But the first two patches make sense by themselves, as the first one is a nice
Assalamu Alaikum Wa Rahmatullahi Wa Barakatuh,
Dear Friend,
I came across your e-mail contact prior a private search while in need of your
assistance. I am Aisha Al-Qaddafi, the only biological Daughter of Former
President of Libya Col. Muammar Al-Qaddafi. Am a single Mother and a Widow
On Mon, Apr 08, 2019 at 09:12:28AM +0200, Thomas-Mich Richter wrote:
> > Does the below cure things? It's not exactly pretty, but it could just
> > do the trick.
> >
> > ---
> > diff --git a/kernel/events/core.c b/kernel/events/core.c
> > index dfc4bab0b02b..d496e6911442 100644
> > ---
On 07.04.19 23:09, Khz2020 wrote:
> Please see attached. It was working fine prior to installing Canon linux
> drivers. CUPS disconnect maybe?
Wrong list. This maillist is about the linux KERNEL, whilst your problem
is about CUPS. So, please ask the CUPS folks.
--mtx
--
Enrico Weigelt, metux
On Sun, Apr 07, 2019 at 04:27:36PM +0200, Clément Péron wrote:
> Hi,
>
> On Fri, 5 Apr 2019 at 18:24, Clément Péron wrote:
> >
> > Hi,
> >
> > On Fri, 5 Apr 2019 at 17:08, Maxime Ripard
> > wrote:
> > >
> > > On Fri, Apr 05, 2019 at 10:59:35PM +0800, Chen-Yu Tsai wrote:
> > > > On Fri, Apr 5,
Hi,
On 07-04-19 22:58, Robert R. Howell wrote:
On 4/3/19 2:54 AM, Hans de Goede wrote:
Hi,
On 03-04-19 07:43, Kai-Heng Feng wrote:
i2c-designware-platdrv fails to work after the system restored from
hibernation:
[ 272.775692] i2c_designware 80860F41:00: Unknown Synopsys component type:
On Mon, 8 Apr 2019 13:02:12 +1000
Stephen Rothwell wrote:
> Hi all,
>
> Today's linux-next merge of the staging tree got a conflict in:
>
> drivers/iio/industrialio-buffer.c
>
> between commit:
>
> 20ea39ef9f2f ("iio: Fix scan mask selection")
>
> from the staging.current tree and
Hi,
On Thu, 2019-04-04 at 23:35 +0700, Linus Walleij wrote:
> On Wed, Apr 3, 2019 at 9:09 AM Chunfeng Yun wrote:
>
> > Due to the requirement of usb-connector.txt binding, the old way
> > using extcon to support USB Dual-Role switch is now deprecated
> > when use Type-B connector.
> > This patch
Currently, the irq_vector class of tracepoints does not include the NMI
entry. The NMI was in the first set of tracepoints for IRQs, but it was
dropped off because of the logic of switching IDT when enabling trace[1].
However, as the switching IDT logic was removed [2], it is possible to add
the
Currently, the irq_vectors is showing the entry and exit events for
the interrupts of the architecture, but not for external interrupts.
Adds the tracepoints for external interrupts.
Example of output:
-0 [000] d.h. 102.890935: external_interrupt_entry: vector=35
-0 [000] d.h.
On Sun, Apr 07, 2019 at 10:23:21PM +0200, Andreas Kemnade wrote:
> ping
>
> On Fri, 1 Mar 2019 19:52:12 +0100
> Andreas Kemnade wrote:
>
> > The Banana Pi M2 Zero board has an AP6212 BT+Wifi combo chip
> > with broadcom internals attached to UART1 and some gpios.
> > This addition is in line
ACRN is an open-source hypervisor maintained by Linuxfoundation.
This is to add the Linux guest support on acrn-hypervisor.
Add x86_hyper_acrn into supported hypervisors array, which enables
Linux ACRN guest running on ACRN hypervisor. It is restricted to X86_64.
Co-developed-by: Jason Chen CJ
Linux kernel uses the HYPERVISOR_CALLBACK_VECTOR for hypervisor upcall
vector. And it is already used for Xen and HyperV.
After Acrn hypervisor is detected, it will also use this defined vector
to notify kernel.
Co-developed-by: Jason Chen CJ
Signed-off-by: Jason Chen CJ
Signed-off-by: Zhao
When acrn_hypervisor is detected, the hypercall is needed so that the
acrn guest can query/config some settings. For example: it can be used
to query the resources in hypervisor and manage the CPU/memory/device/
interrupt for Guest system.
So the hypercall is added so that the kernel can
In virtualized setup, when system reboots due to warm
reset interrupt storm is seen.
Call Trace:
dump_stack+0x70/0xa5
__report_bad_irq+0x2e/0xc0
note_interrupt+0x248/0x290
? add_interrupt_randomness+0x30/0x220
handle_irq_event_percpu+0x54/0x80
handle_irq_event+0x39/0x60
ACRN is a flexible, lightweight reference hypervisor, built with real-time
and safety-criticality in mind, optimized to streamline embedded development
through an open source platform. It is built for embedded IOT with small
footprint and real-time features. More details can be found
in
Now the CONFIG_HYPERV and CONFIG_XEN can be used to control the definition
/usage of hv_irq_callback_count. If another linux guest also needs to use
the hv_irq_callback_count, current conditional definition looks unreadable.
Signed-off-by: Zhao Yakui
---
arch/x86/Kconfig | 3 +++
On 2019-03-27 18:08, Sibi Sankar wrote:
Add the rpmpd node on the msm8998 and define the available levels.
Signed-off-by: Sibi Sankar
---
arch/arm64/boot/dts/qcom/msm8998.dtsi | 51 +++
1 file changed, 51 insertions(+)
diff --git
On 2019-03-27 18:08, Sibi Sankar wrote:
From: Bjorn Andersson
Add the rpmpd node on the qcs404 and define the available levels.
Signed-off-by: Bjorn Andersson
[sibis: fixup available levels]
Signed-off-by: Sibi Sankar
---
arch/arm64/boot/dts/qcom/qcs404.dtsi | 55
This is only used on arm and arm64 platforms. Add COMPILE_TEST option.
Tested with 5.1-rc3+ on Fedora/RISCV. CONFIG_ARM_TIMER_SP804 no more shows
up in riscv config.
Signed-off-by: David Abdurachmanov
---
drivers/clocksource/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
Hi Mika,
Will correct the title line in the next version.
Thanks.
--
Best wishes,
Binbin
> -Original Message-
> From: Mika Westerberg [mailto:mika.westerb...@linux.intel.com]
> Sent: Monday, April 8, 2019 3:43 PM
> To: Wu, Binbin
> Cc: r...@rjwysocki.net; linux...@vger.kernel.org;
>
Hi!
On 07.04.2019 11:04, Masahiro Yamada wrote:
> (+CC Jonas Gorski)
>
>
> On Tue, Mar 26, 2019 at 6:58 PM Wiebe, Wladislav (Nokia - DE/Ulm)
> wrote:
>>
>> Commit ea837f1c0503 ("kbuild: make modpost processing configurable")
>> was intended to give KBUILD_MODPOST_WARN flexibility to be
On 05/04/2019 19:06, Bjorn Helgaas wrote:
On Fri, Apr 05, 2019 at 09:10:27AM +0100, John Garry wrote:
On 04/04/2019 19:58, Bjorn Helgaas wrote:
On Thu, Apr 04, 2019 at 10:43:36AM -0700, Guenter Roeck wrote:
On Thu, Apr 04, 2019 at 05:52:35PM +0100, John Garry wrote:
Note that the f71805f
On 29/03/2019 17:06, Jerome Brunet wrote:
> This patchset updates the axg audio controller to support the audio
> controller of the g12a SoC family.
>
> Jerome Brunet (3):
> dt-bindings: clk: axg-audio: add g12a support
> clk: meson: axg_audio: replace prefix axg by aud
> clk: meson:
From: Bartosz Golaszewski
Enable cpufreq-dt support for da850-evm. The cvdd is supplied by the
tps6507 pmic with configurable output voltage, so all operating points
can be enabled.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/boot/dts/da850-evm.dts | 13 +
1 file changed, 13
From: David Lechner
This adds a cpu node and operating points to the common da850.dtsi file.
Additionally, a regulator is added to the LEGO EV3 board along with
some board-specific CPU configuration.
Regulators need to be hooked up on other boards to get them working.
Signed-off-by: David
From: Bartosz Golaszewski
This series adds cpufreq-dt operating points for da850 boards supported
with device tree (da850-lcdk, da850-lego-ev3, da850-evm).
Last patch enables CPUFREQ_DT in davinci_all_defconfig.
v1 -> v2:
- use the VDCDC3_1.2V regulator as cpu-supply on da850-evm
v2 -> v3:
-
From: David Lechner
This sets CONFIG_CPUFREQ_DT=m in davinci_all_defconfig. This is used for
frequency scaling on device tree boards.
Signed-off-by: David Lechner
Signed-off-by: Bartosz Golaszewski
---
arch/arm/configs/davinci_all_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git
When you run "make clean" for arm, it never visits mach-* or plat-*
directories because machine-y and plat-y are just empty.
When cleaning, all machine, plat directories are accumulated to
machine-, plat-, respectively. So, let's pass them to core- to
clean up those directories.
Signed-off-by:
is only generated and included
by arch/arm/mach-at91/, so it does not need to reside in the
globally visible include/generated/.
I moved and renamed it to arch/arm/mach-at91/pm_data-offsets.h
since the prefix 'at91_' is just redundant in mach-at91/.
Signed-off-by: Masahiro Yamada
---
Can this
is only generated and included
by arch/arm/mach-omap2/, so it does not need to reside in the
globally visible include/generated/.
I moved and renamed it to arch/arm/mach-omap2/pm-asm-offsets.h
since the prefix 'omap2-' is just redundant in mach-omap2/.
Signed-off-by: Masahiro Yamada
---
Can
On 04/06/19 at 06:43am, Borislav Petkov wrote:
> On Sat, Apr 06, 2019 at 09:51:19AM +0800, Baoquan He wrote:
> > It's KASLR happened in kernel_randomize_memory() of arch/x86/mm/kaslr.c .
>
> What is "KASLR happened in"? This doesn't make any sense. When you look
> at that function, there's a
* Alexey Dobriyan:
>> >> Patch overloads sched_getaffinity(len=0) to simply return "nr_cpu_ids".
>> >> This will make gettting CPU mask require at most 2 system calls
>> >> and will eliminate unnecessary code.
>> >>
>> >> len=0 is chosen so that
>> >> * passing zeroes is the simplest thing
>> >>
On Mon, Apr 08 2019, kernel test robot wrote:
> Greeting,
>
> FYI, we noticed a -86.0% regression of aim7.jobs-per-min due to commit:
That is expected. The following commit
2bc13b83e6298486371761de503faeffd15b7534
should restore the performance.
NeilBrown
>
>
> commit:
Update i.MX6DL automotive part's opp table according to i.MX6DL
automotive datasheet Rev.9, 11/2018, it adds 996MHz set-point
support as below:
LDO enabled(min value):
996MHz: VDDARM: 1.275V, VDDSOC: 1.175V;
792MHz: VDDARM: 1.150V, VDDSOC: 1.150V;
396MHz: VDDARM: 1.125V, VDDSOC: 1.150V;
Adding
On Sun, Apr 07, 2019 at 11:13:47PM +, Ghannam, Yazen wrote:
> Yazen Ghannam (5):
> x86/MCE: Make struct mce_banks[] static
> x86/MCE: Handle MCA controls in a per_cpu way
> x86/MCE/AMD: Don't cache block addresses on SMCA systems
> x86/MCE: Make number of MCA banks per_cpu
> x86/MCE:
On Sat, Apr 06, 2019 at 01:45:10AM +0200, meg...@megous.com wrote:
> From: Ondrej Jirman
>
> ---
> arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 9 +
> 1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
>
On Mon, Apr 08, 2019 at 01:41:58PM +0800, Binbin Wu wrote:
> In virtualized setup, when system reboots due to warm
> reset interrupt storm is seen.
>
> Call Trace:
>
> dump_stack+0x70/0xa5
> __report_bad_irq+0x2e/0xc0
> note_interrupt+0x248/0x290
> ? add_interrupt_randomness+0x30/0x220
>
On Mon, Apr 08, 2019 at 12:21:03PM +0800, Chris Chiu wrote:
> +static void
> +intel_gpio_update_pad_mode(void __iomem *hostown, u32 mask, u32 value)
> +{
> + u32 curr = readl(hostown);
> + u32 updated = (curr & ~mask) | (value & mask);
I think here we should first complain if the expected
On Fri, 2019-04-05 at 13:43 -0700, Stephen Boyd wrote:
> Quoting Michael Turquette (2019-04-05 08:43:40)
> > Hi Jerome,
> >
> > On Fri, Mar 29, 2019 at 3:58 PM Jerome Brunet wrote:
> > > On Fri, 2019-03-29 at 15:14 -0700, Stephen Boyd wrote:
> > > > > > We actively discourage using init
On Sun, Apr 07, 2019 at 06:54:25PM +0200, Lukas Wunner wrote:
> On Thu, Mar 28, 2019 at 03:36:16PM +0300, Mika Westerberg wrote:
> > +struct tb_path *tb_path_alloc(struct tb *tb, struct tb_port *src, int
> > src_hopid,
> > + struct tb_port *dst, int dst_hopid, int link_nr,
On Sun, 7 Apr 2019 16:07:41 +0200
Alexandre Belloni wrote:
> Hello Antonio, Harald,
>
Hi everyone,
adding Robert to CC as he is listed as the current maintainer of
ARM/EZX SMARTPHONES in the MAINTAINERS file.
> I've had a look at the PCAP RTC driver because I'm removing a few
> deprecated
The patch
spi: pxa2xxx: change "no DMA channels..." msg from debug to warning
has been applied to the spi tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next
The patch
spi: bcm2835aux: Fix build error without CONFIG_DEBUG_FS
has been applied to the spi tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours)
From: Hans Holmberg
Ever since '07173c3ec276 ("block: enable multipage bvecs")' we
need to handle bios with multipage bvecs in pblk.
Currently, a multipage bvec results in a crash[1].
Fix this by using bvec iterators in stead of direct bvec indexing.
Also add a dcache flush, for the same
The patch
spi: tegra114: add dual mode support
has been applied to the spi tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus
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