On Tue, Apr 09, 2019 at 08:07:49AM +0200, Thomas-Mich Richter wrote:
> On 4/8/19 11:50 AM, Peter Zijlstra wrote:
> > On Mon, Apr 08, 2019 at 10:22:29AM +0200, Peter Zijlstra wrote:
> >> On Mon, Apr 08, 2019 at 09:12:28AM +0200, Thomas-Mich Richter wrote:
> >
> >>> very good news, your fix ran
On Sat, Apr 6, 2019 at 8:18 PM Qian Cai wrote:
>
> The commit 665ac7e92757 ("acpi/hmat: Register processor domain to its
> memory") introduced some memory leaks below due to it fails to release
> the heap memory in an error path, and then the stack __initdata memory
> which reference them get
(+ LKML)
Apologies forgot to CC the list.
On 04/07/19 18:52, Qais Yousef wrote:
> Hi Steve, Peter
>
> I know the topic has sprung up in the past but I couldn't find anything that
> points into any conclusion.
>
> As far as I understand new TRACE_EVENTS() in the scheduler (and probably other
>
On 01/04/2019 13:51, Neil Armstrong wrote:
> On 25/03/2019 11:03, Neil Armstrong wrote:
>> Add following peripherals :
>> - SAR-ADC
>> - USB
>> - Mali GPU
>>
>> Dependencies :
>> - ADC
>>
>> Depends on CLKID_AO_SAR_ADC_SEL, stable clk headers tags will be
>> available after v5.1-rc4
>>
>> Bindings
On Mon, Apr 08, 2019 at 12:45:05PM -0700, Tejun Heo wrote:
> Hello,
>
> On Wed, Mar 13, 2019 at 05:55:48PM +0100, Sebastian Andrzej Siewior wrote:
> > From: Thomas Gleixner
> >
> > The worker accounting for CPU bound workers is plugged into the core
> > scheduler code and the wakeup code. This
On Tue, Apr 09, 2019 at 12:13:58AM +0800, Frank Lee wrote:
> On Fri, Apr 5, 2019 at 10:55 PM Maxime Ripard
> wrote:
> >
> > Hi,
> >
> > On Fri, Apr 05, 2019 at 06:24:55AM -0400, Yangtao Li wrote:
> > > Allwinner Process Voltage Scaling Tables defines the voltage and
> > > frequency value based
On 09/04/2019 00.52, Andrew Morton wrote:
> (resend, cc Andrey)
>
> On Sun, 7 Apr 2019 12:53:25 + Vadim Pasternak
> wrote:
>
>> The warning is caused by call to rorXX(), if the second parameters of
>> this function "shift" is zero. In such case UBSAN reports the warning
>> for the next
Hi all,
Changes since 20190408:
The mac80211-next tree gained a conflict against the mac80211 tree.
The drm tree still had its build failure for which I disabled a driver.
The drm-misc tree gained conflicts against the drm tree and also a build
failure for which I marked a driver as BROKEN.
Dmitry V. Levin 於 2019年4月9日 週二 上午1:41寫道：
>
> All syscall_get_*() and syscall_set_*() functions must be defined
> as static inline as on all other architectures, otherwise asm/syscall.h
> cannot be included in more than one compilation unit.
>
> This bug has to be fixed in order to extend the
Hi Rob,
On 28/03/19 6:01 PM, Rob Herring wrote:
> On Tue, Mar 12, 2019 at 02:35:17PM +0530, Vignesh Raghavendra wrote:
>> Add dt bindings for TI syscon gate clock.
>>
>> Signed-off-by: Vignesh Raghavendra
>> ---
>> .../bindings/clock/ti,syscon-gate-clock.txt | 35 +++
>> 1
On Fri, Apr 5, 2019 at 4:12 PM Colin King wrote:
>
> From: Colin Ian King
>
> The pointer 'target' is not initialized and is only assigned when the
> ACPI_HMAT_MEMORY_PD_VALID bit in p->flags is set. There is a later null
> check on target that leads to an uninitialized pointer read and
>
On 08.04.2019 23:01, Hugh Dickins wrote:
The igrab() in shmem_unuse() looks good, but we forgot that it gives no
protection against concurrent unmounting: a point made by Konstantin
Khlebnikov eight years ago, and then fixed in 2.6.39 by 778dd893ae78
("tmpfs: fix race between umount and
On Mon, Apr 08, 2019 at 02:09:01PM +0200, Ondřej Jirman wrote:
> Hello Maxime,
>
> On Mon, Apr 08, 2019 at 10:00:56AM +0200, Maxime Ripard wrote:
> > On Wed, Mar 27, 2019 at 03:33:38AM +0100, meg...@megous.com wrote:
> > > From: Ziping Chen
> > >
> > > Allwinner A83T SoC has a low res adc like
On 08/04/2019 19:07, Guenter Roeck wrote:
> On Mon, Apr 08, 2019 at 04:49:02PM +0100, Marc Zyngier wrote:
>> Only arch_timer_read_counter will guarantee that workarounds are
>> applied. So let's use this one instead of arch_counter_get_cntvct.
>>
>> Signed-off-by: Marc Zyngier
>
> Reviewed-by:
> -Original Message-
> From: Andrew Morton
> Sent: Tuesday, April 09, 2019 1:52 AM
> To: Vadim Pasternak
> Cc: jacek.anaszew...@gmail.com; pa...@ucw.cz; linux-kernel@vger.kernel.org;
> linux-l...@vger.kernel.org; Ido Schimmel ; Andrey
> Ryabinin
> Subject: Re: [PATCH v1 bitops]
On Thu 2019-04-04 15:18:55, Josh Poimboeuf wrote:
> On Thu, Apr 04, 2019 at 08:44:11PM +0200, Miroslav Benes wrote:
> > GCC 9 introduces a new option, -flive-patching. It disables certain
> > optimizations which could make a compilation unsafe for later live
> > patching of the running kernel.
> >
On 2019-04-08 12:45:05 [-0700], Tejun Heo wrote:
> Hello,
Hi,
…
> This looks good from wq side. Peter, are you okay with routing this
> through the wq tree? If you wanna take it through the sched tree,
> please feel free to add
Thank you.
> Acked-by: Tejun Heo
>
> Thanks.
Sebastian
On 08.04.19 12:12, David Hildenbrand wrote:
> Only memory added via add_memory() and friends will need memory
> block devices - only memory to be used via the buddy and to be onlined/
> offlined by user space in memory block granularity.
>
> Move creation of memory block devices out of
DPPA2(Data Path Acceleration Architecture 2) qDMA
The qDMA supports channel virtualization by allowing DMA jobs to be enqueued
into different frame queues. Core can initiate a DMA transaction by preparing
a frame descriptor(FD) for each DMA job and enqueuing this job to a frame queue.
through a
The MC exports the DPDMAI object as an interface to operate the DPAA2 QDMA
Engine. The DPDMAI enables sending frame-based requests to QDMA and receiving
back confirmation response on transaction completion, utilizing the DPAA2 QBMan
infrastructure. DPDMAI object provides up to two priorities for
On 二, 2019-04-09 at 05:28 +, Anson Huang wrote:
> Ping...
> Can anyone provide some suggestion about how to proceed next?
>
Hi, Eduardo,
I guess you will comment on this patch, right?
Or else I will take the patch following Rob' suggestion.
thanks,
rui
> Best Regards!
> Anson Huang
>
> >
On 4/8/19 3:29 PM, xiang xiao wrote:
> On Mon, Apr 8, 2019 at 8:05 PM Arnaud Pouliquen
> wrote:
>>
>>
>>
>> On 4/6/19 9:56 AM, xiang xiao wrote:
>>> On Sat, Apr 6, 2019 at 12:08 AM Arnaud Pouliquen
>>> wrote:
On 4/5/19 4:03 PM, xiang xiao wrote:
> On Fri, Apr 5, 2019
On Mon, 8 Apr 2019, Sebastian Andrzej Siewior wrote:
> On 2019-04-08 19:05:56 [+0200], Thomas Gleixner wrote:
> > > diff --git a/arch/x86/kernel/fpu/signal.c b/arch/x86/kernel/fpu/signal.c
> > > index a5b086ec426a5..f20e1d1fffa29 100644
> > > --- a/arch/x86/kernel/fpu/signal.c
> > > +++
This patch adds documentation of device tree bindings for the
STMicroelectronics Multi-Function eXpander (STMFX) GPIO expander.
Signed-off-by: Amelie Delaunay
Reviewed-by: Linus Walleij
Reviewed-by: Rob Herring
---
.../devicetree/bindings/pinctrl/pinctrl-stmfx.txt | 116 +
This patch adds support for STMicroelectronics Multi-Function eXpander
(STMFX) on stm32746g-eval. It is connected on i2c1.
Signed-off-by: Amelie Delaunay
Acked-by: Linus Walleij
---
arch/arm/boot/dts/stm32746g-eval.dts | 17 +
1 file changed, 17 insertions(+)
diff --git
The joystick (B3) on stm32746g-eval uses gpios on STMFX gpio expander.
These gpios need a pin configuration (push-pull and bias-pull-up),
described under stmfx_pinctrl node.
Signed-off-by: Amelie Delaunay
Acked-by: Linus Walleij
---
arch/arm/boot/dts/stm32746g-eval.dts | 43
Orange (LD2) and blue (LD4) leds on stm32746g-eval are connected on
STMFX gpio expander, offset 17 and 19.
Signed-off-by: Amelie Delaunay
Acked-by: Linus Walleij
---
arch/arm/boot/dts/stm32746g-eval.dts | 6 ++
1 file changed, 6 insertions(+)
diff --git
This patch adds documentation of device tree bindings for the
STMicroelectronics Multi-Function eXpander (STMFX) MFD core.
Signed-off-by: Amelie Delaunay
Reviewed-by: Linus Walleij
Reviewed-by: Rob Herring
Acked-for-MFD-by: Lee Jones
---
Documentation/devicetree/bindings/mfd/stmfx.txt | 28
STMicroelectronics Multi-Function eXpander (STMFX) is a slave controller
using I2C for communication with the main MCU. Main features are:
- 16 fast GPIOs individually configurable in input/output
- 8 alternate GPIOs individually configurable in input/output when other
STMFX functions are not used
This patch adds pinctrl/GPIO driver for STMicroelectronics
Multi-Function eXpander (STMFX) GPIO expander.
STMFX is an I2C slave controller, offering up to 24 GPIOs.
The driver relies on generic pin config interface to configure the GPIOs.
Signed-off-by: Amelie Delaunay
---
The joystick (B1) on stm32mp157c-ev1 uses gpios on STMFX gpio expander.
These gpios need a pin configuration (push-pull and bias-pull-down),
described under stmfx_pinctrl node.
Signed-off-by: Amelie Delaunay
---
arch/arm/boot/dts/stm32mp157c-ev1.dts | 44 +++
1
This patch adds support for STMicroelectronics Multi-Function eXpander
(STMFX) on stm32mp157c-ev1. It is connected on i2c2.
Signed-off-by: Amelie Delaunay
---
arch/arm/boot/dts/stm32mp157c-ev1.dts | 16
1 file changed, 16 insertions(+)
diff --git
This series adds support for STMicroelectronics Multi-Function eXpander
(STMFX), used on some STM32 discovery and evaluation boards.
STMFX is an STM32L152 slave controller whose firmware embeds the following
features:
- I/O expander (16 GPIOs + 8 extra if the other features are not enabled),
-
Hello,
syzbot found the following crash on:
HEAD commit:ac5b84a1 Add linux-next specific files for 20190408
git tree: linux-next
console output: https://syzkaller.appspot.com/x/log.txt?x=10ae80b720
kernel config: https://syzkaller.appspot.com/x/.config?x=42a33a21877c9c95
On Tue, Apr 9, 2019 at 2:17 PM Keerthy wrote:
>
>
>
> On 09/04/19 10:37 AM, Masahiro Yamada wrote:
> > On Tue, Apr 9, 2019 at 2:00 PM Keerthy wrote:
> >>
> >>
> >>
> >> On 08/04/19 9:48 PM, Tony Lindgren wrote:
> >>> Hi,
> >>>
> >>> * Masahiro Yamada [190408 07:56]:
> is only generated
> From: Joakim Zhang
> Sent: Tuesday, April 9, 2019 5:07 AM
> Hi Stefan,
>
> Thanks for your validation! Could you add your test tag if you can
> successfully validated?
Sure, no problem. Please note that I needed to replace "flexcan_read" and
"flexcan_write" with "priv->read" and
On 09.04.19 04:44, Michael S. Tsirkin wrote:
> On Fri, Apr 05, 2019 at 05:09:45PM -0700, Alexander Duyck wrote:
>> In addition we will need some way to identify which pages have been
>> hinted on and which have not. The way I believe easiest to do this
>> would be to overload the PageType value so
On Tue, 9 Apr 2019 11:22:52 +0800
Mason Yang wrote:
> Add a driver for Macronix NAND read retry and randomizer.
These are 2 orthogonal changes, and should thus bit split in 2 patches.
>
> Signed-off-by: Mason Yang
> ---
> drivers/mtd/nand/raw/nand_macronix.c | 169
>
On Mon, Apr 08, 2019 at 11:01:10AM -0700, Nathan Chancellor wrote:
> On Thu, Mar 21, 2019 at 11:09:09PM +0800, Yue Haibing wrote:
> > From: YueHaibing
> > -void artpec6_pmx_disable(struct pinctrl_dev *pctldev, unsigned int
> > function,
> > -unsigned int group)
> > +static
Hello,
I am confuse about memory configuration and I have below questions
1. if 32-bit os maximum virtual address is 4GB, When i have 4 gb of ram for
32-bit os, What about the virtual memory size ? is it required virtual
memory(disk space) or we can directly use physical memory ?
2. In 32-bit
Am 08.04.19 um 21:38 schrieb Guenter Roeck:
> There is no call to platform_get_drvdata() in the driver,
> so platform_set_drvdata() is unnecessary and can be dropped.
>
> The conversion was done automatically with coccinelle using the
> following semantic patches. The semantic patches and the
Hi Alan,
Thanks for the response.
Please find my response inline.
> -Original Message-
> From: Alan Tull [mailto:at...@kernel.org]
> Sent: Tuesday, April 9, 2019 1:57 AM
> To: Moritz Fischer
> Cc: Michal Simek ; Nava kishore Manne
> ; Rob Herring ; Mark Rutland
> ; Rajan Vaja ; Jolly
On Tue, Mar 26, 2019 at 06:52:33AM +, Anson Huang wrote:
> i.MX7ULP has TPM(Low Power Timer/Pulse Width Modulation Module)
> inside, it can support multiple PWM channels, all the channels
> share same counter and period setting, but each channel can
> configure its duty and polarity
Hi Axboe,
Patch link:
http://patchwork.ozlabs.org/patch/1055028/
http://patchwork.ozlabs.org/patch/1054189/
Best Regards,
Peng
>-Original Message-
>From: Jens Axboe
>Sent: 2019年4月8日 23:21
>To: Peng Ma ; robh...@kernel.org;
>mark.rutl...@arm.com; shawn...@kernel.org; Leo Li
>Cc:
On Tue, Apr 9, 2019 at 12:16 AM Nathan Chancellor
wrote:
>
> On Mon, Apr 08, 2019 at 11:26:17PM +0200, Arnd Bergmann wrote:
> > clang produces a harmless warning for each use for the qeth_adp_supported
> > macro:
> >
> > drivers/s390/net/qeth_l2_main.c:559:31: warning: implicit conversion from
>
On Tue, Apr 9, 2019 at 12:03 AM Nathan Chancellor
wrote:
>
> On Mon, Apr 08, 2019 at 11:26:16PM +0200, Arnd Bergmann wrote:
> > The purgatory Makefile does not inherit the original cflags,
> > so clang falls back to the default target architecture when
> > building it, typically this would be x86
On 08. 04. 19 22:27, Alan Tull wrote:
> On Mon, Apr 8, 2019 at 11:51 AM Moritz Fischer wrote:
>>
>> Hi Michal,
>>
>> On Mon, Apr 08, 2019 at 04:36:15PM +0200, Michal Simek wrote:
>>> On 08. 04. 19 16:17, Alan Tull wrote:
On Mon, Apr 8, 2019 at 7:39 AM Nava kishore Manne wrote:
>
>
On 08. 04. 19 19:14, Moritz Fischer wrote:
> Hi Nava,
>
> On Tue, Apr 02, 2019 at 06:01:21PM +0530, Nava kishore Manne wrote:
>> This Patch Adds fpga API's to support the Bitstream loading
>> by using firmware interface.
>>
>> Signed-off-by: Nava kishore Manne
>> ---
>> Changes for v4:
>>
Hi all,
After merging the scsi-mkp tree, today's linux-next build (powerpc
allyesconfig) failed like this:
drivers/scsi/qla2xxx/tcm_qla2xxx.c: In function 'tcm_qla2xxx_init_lport':
drivers/scsi/qla2xxx/tcm_qla2xxx.c:1614:3: error: implicit declaration of
function 'vzalloc'; did you mean
Fix following error using calls_view:
Query failed: ambiguous column name: parent_id Unable to execute statement
Signed-off-by: Adrian Hunter
Fixes: 8ce9a7251d11 ("perf scripts python: export-to-sqlite.py: Export calls
parent_id")
---
tools/perf/scripts/python/export-to-sqlite.py | 2 +-
1
Hi
On Mon, Apr 8, 2019 at 6:07 PM Kees Cook wrote:
>
> Before commit c5459b829b71 ("LSM: Plumb visibility into optional "enabled"
> state"), /sys/module/apparmor/parameters/enabled would show "Y" or "N"
> since it was using the "bool" handler. After being changed to "int",
> this switched to "1"
This patch implements both 4MB huge page support for 32bit kernel
and 2MB/1GB huge pages support for 64bit kernel.
Signed-off-by: Alexandre Ghiti
---
arch/riscv/Kconfig | 8 ++
arch/riscv/include/asm/hugetlb.h | 18 +
arch/riscv/include/asm/page.h| 10
ARCH_WANT_HUGE_PMD_SHARE config was declared in both architectures:
move this declaration in arch/Kconfig and make those architectures
select it.
Signed-off-by: Alexandre Ghiti
---
arch/Kconfig | 3 +++
arch/arm64/Kconfig | 2 +-
arch/x86/Kconfig | 4 +---
3 files changed, 5
This series introduces hugetlbfs support for both riscv 32/64. Riscv32
is architecturally limited to huge pages of size 4MB whereas riscv64 has
2MB/1G huge pages support. Transparent huge page support is not
implemented here, I will submit another series
On Mon 08-04-19 21:30:41, Andrew Morton wrote:
> On Mon, 8 Apr 2019 10:26:33 +0200 Oscar Salvador wrote:
>
> > arch_add_memory, __add_pages take a want_memblock which controls whether
> > the newly added memory should get the sysfs memblock user API (e.g.
> > ZONE_DEVICE users do not want/need
On Wed, Mar 20, 2019 at 10:06:14AM +0800, Peter Xu wrote:
> This series implements initial write protection support for
> userfaultfd. Currently both shmem and hugetlbfs are not supported
> yet, but only anonymous memory. This is the 3nd version of it.
>
> The latest code can also be found at:
On 4/8/19 11:50 AM, Peter Zijlstra wrote:
> On Mon, Apr 08, 2019 at 10:22:29AM +0200, Peter Zijlstra wrote:
>> On Mon, Apr 08, 2019 at 09:12:28AM +0200, Thomas-Mich Richter wrote:
>
>>> very good news, your fix ran over the weekend without any hit!!!
>>>
>>> Thanks very much for your help. Do you
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