From: Nan Li
In MMC dma transfer, the region requested by dma_map_sg() may be released
by dma_unmap_sg() before the transfer is completed.
Put the unmap operation in front of mmc_request_done() to avoid this.
Signed-off-by: Nan Li
Signed-off-by: Jianxin Pan
---
For kernel logging macro, pr_warning is completely removed and
replaced by pr_warn, using pr_warn in tools lib bpf for symmetry
to kernel logging macro, then we could drop pr_warning in the
whole linux code.
Cc: Alexei Starovoitov
Cc: Daniel Borkmann
Cc: Martin KaFai Lau
Cc: Song Liu
Cc:
To avoid doc rot, put function documentations with code, not header.
Use kernel-doc style comments for exported functions.
Signed-off-by: Gwendal Grignou
---
New in v2.
drivers/platform/chrome/cros_ec.c | 33 +++
drivers/platform/chrome/cros_ec_proto.c | 70 +
This reverts commit 62c3801619e16b68a37ea899b76572145dfe41c9.
This patch is not needed anymore since we clear EC_MKBP_HAS_MORE_EVENTS
flag before calling the notifiers in patch
"9d9518f5b52a (platform: chrome: cros_ec: handle MKBP more events flag)"
Signed-off-by: Gwendal Grignou
---
New to v2.
From: Enrico Granata
Add a layer of sanity checking to cros_ec_register against attempting to
register IRQ values that are not strictly greater than 0.
Signed-off-by: Enrico Granata
Signed-off-by: Gwendal Grignou
---
Changes in v2:
Remove dual Enrico's signature.
Expose EC minimal interrupt period through buffer/hwfifo_timeout:
- Maximal timeout is limited to 65s.
- When timeout for all sensors is set to 0, EC will not send events,
even if the sensor sampling rate is greater than 0.
- curr_sample_rate is no more, the pm functions have been removed.
To be compliant with other sensors, set and get sensor sampling
frequency in Hz, not mHz.
Fixes: ae7b02ad2f32 ("iio: common: cros_ec_sensors: Expose
cros_ec_sensors frequency range via iio sysfs")
Signed-off-by: Gwendal Grignou
---
No changes in v2.
.../cros_ec_sensors/cros_ec_sensors_core.c
- Remove duplicate code in mfd, since mfd just register
cros_ec_sensorhub if at least one sensor is present
- Change iio cros_ec driver to get the pointer to the cros_ec_dev
through cros_ec_sensorhub.
Signed-off-by: Gwendal Grignou
---
Changes in v2:
- Remove unerelated changes.
- Remove ec
Events are timestamped in EC time space, their timestamps need to be
converted in host time space.
The assumption is the time delta between when the interrupt is sent
by the EC and when it is receive by the host is a [small] constant.
This is not always true, even with hard-wired interrupt. To
Report the maximum amount of sample the EC can hold.
This is not tunable, but can be useful for application to find out the
maximum amount of time it can sleep when hwfifo_timeout is set to a
large number.
Signed-off-by: Gwendal Grignou
---
Changes in v2:
- Remove double lines, add line before
This reverts commit d096aa3eb6045a6a475a0239f3471c59eedf3d61.
This patch is not needed anymore since we clear EC_MKBP_HAS_MORE_EVENTS
flag before calling the notifiers in patch
"9d9518f5b52a (platform: chrome: cros_ec: handle MKBP more events flag)"
Signed-off-by: Gwendal Grignou
---
New to v2.
Similar to HID sensor stack, the new driver sits between cros_ec_dev
and the iio device drivers:
EC based iio device topology would be:
iio:device1 ->
...0/:00:1f.0/PNP0C09:00/GOOG0004:00/cros-ec-dev.6.auto/
cros-ec-sensorhub.7.auto/
To prevent comment rot, move function description to
cros_ec_sensors_core.c.
Signed-off-by: Gwendal Grignou
---
New in v2.
.../cros_ec_sensors/cros_ec_sensors_core.c| 69
.../linux/iio/common/cros_ec_sensors_core.h | 80 ---
2 files changed, 69
Since cros_ec_sensorhub is shutting down the FIFO when the device
suspends, no need to slow down the EC sampling period rate.
It was necesseary to do that before command CMD_FIFO_INT_ENABLE was
introduced, but now all supported chromebooks have it.
Signed-off-by: Gwendal Grignou
---
New in v2.
EC FIFO can send sensor events in batch. Spread them based on
previous (TSa) and currnet timestamp (TSb)
EC FIFO iio events
+---+
| TSa |
+---+ +---+
| event 1 | | event 1 | TSb -
From: Enrico Granata
The ChromeOS EC has support for signaling to the host that
a single IRQ can serve multiple MKBP (Matrix KeyBoard Protocol)
events.
Doing this serves an optimization purpose, as it minimizes the
number of round-trips into the interrupt handling machinery, and
it proves
cros_ec_sensorhub registers a listener and query motion sense FIFO,
spread to iio sensors registers.
To test, we can use libiio:
iiod&
iio_readdev -u ip:localhost -T 1 -s 25 -b 16 cros-ec-gyro | od -x
Signed-off-by: Gwendal Grignou
---
Changes sunce v2:
- Do not register a .remove routinge
When EC supports FIFO, each IIO device registers a callback, to put
samples in the buffer when they arrives from the FIFO.
We can still use a trigger to collect samples, but there may be some
duplications in the buffer: EC has a single FIFO, so once one sensor is
using it, all sensors event will
Add a new function to return the number of MEMS sensors available in a
ChromeOS Embedded Controller.
It uses MOTIONSENSE_CMD_DUMP if available or a specific memory map ACPI
registers to find out.
Also, make check_features public as it can be useful for other drivers
to know what the Embedded
To improve sensor timestamp precision, given EC and AP are in
different time domains, the AP needs to try to record the exact
moment an event was signalled to the AP by the EC as soon as
possible after it happens.
First thing in the hard irq is the best place for this.
Signed-off-by: Gwendal
This patchset adds a sensorhub driver for spreading sensor
events coming from the Embedded controller sensor FIFO:
+---+ +--+ +
| cros_ec_accel | | cros_ec_gyro | | ...
+---+ +--+ +
id:0 \id:1 |
* Stephen Rothwell wrote:
> Hi all,
>
> After merging the tip tree, today's linux-next build (native perf)
> failed like this:
>
> make: execvp: ./check-headers.sh: Permission denied
>
> Caused by commit
>
> 05f2f277053d ("Merge branch 'x86/core'")
>
> which somehow removed execute
Hello Alexandre,
On Thu, 2019-10-17 at 12:48 +0200, Alexandre Belloni wrote:
> On 17/10/2019 10:36:44+, Vaittinen, Matti wrote:
> > Hello Alexandre,
> >
> > Thanks for quick check! I'll be off for the rest of the week but I
> > will
> > re-work this patch at next week :) I agree with you
In the variant rc5t619 the mfd has a rtc. This patchset adds
support for it. To do so it adds the missing register defines in
rn5t618.h and general irq handling for that.
Probably the irq definitions are the same except missing rtc + charger
but due to missing information about that I do not add
Add an RTC driver for the RTC device on Ricoh MFD rc5t619,
which is implemented as a variant of rn5t618
Signed-off-by: Andreas Kemnade
---
drivers/rtc/Kconfig | 10 +
drivers/rtc/Makefile | 1 +
drivers/rtc/rtc-rc5t619.c | 476 ++
3
The rc5t619 has a rtc which are missing in the
rn5t618. Add it as subdevice to prepare for their implementation
Signed-off-by: Andreas Kemnade
---
drivers/mfd/rn5t618-core.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/mfd/rn5t618-core.c
rn5t618 currently lacks irq handling. To prepare implementation
in a rn5t618-irq.c, move main file to rn5t618-core.c
Signed-off-by: Andreas Kemnade
---
drivers/mfd/Makefile | 2 ++
drivers/mfd/{rn5t618.c => rn5t618-core.c} | 0
2 files changed, 2 insertions(+)
rename
Defines for some rtc related registers were missing, also
they were not included in the volatile register list
Signed-off-by: Andreas Kemnade
---
drivers/mfd/rn5t618-core.c | 2 ++
include/linux/mfd/rn5t618.h | 11 +++
2 files changed, 13 insertions(+)
diff --git
This adds support for irq handling in the rc5t619 which is required
for properly implementing subdevices like rtc.
For now only definitions for the variant rc5t619 are included.
Signed-off-by: Andreas Kemnade
---
drivers/mfd/Kconfig | 1 +
drivers/mfd/Makefile| 2 +-
changes v3:
- ag71xx: ag71xx_mac_config: ignore MLO_AN_INBAND mode. It is not
supported by HW and SW.
- ag71xx: ag71xx_mac_validate: return all supported bits on
PHY_INTERFACE_MODE_NA
changes v2:
- move Atheros AR9331 TAG format to separate patch
- use netdev_warn_once in the tag driver to
Add support for tag format used in Atheros AR9331 build-in switch.
Signed-off-by: Oleksij Rempel
---
include/net/dsa.h| 2 +
net/dsa/Kconfig | 6 +++
net/dsa/Makefile | 1 +
net/dsa/tag_ar9331.c | 97
4 files changed, 106
The port to phylink was done as close as possible to initial
functionality.
Theoretically this HW can support flow control, practically seems to be not
enough to just enable it. So, more work should be done.
Signed-off-by: Oleksij Rempel
---
drivers/net/ethernet/atheros/Kconfig | 2 +-
Add switch node supported by dsa ar9331 driver.
Signed-off-by: Oleksij Rempel
---
arch/mips/boot/dts/qca/ar9331.dtsi | 127 ++-
arch/mips/boot/dts/qca/ar9331_dpt_module.dts | 13 ++
2 files changed, 139 insertions(+), 1 deletion(-)
diff --git
Provide basic support for Atheros AR9331 build-in switch. So far it
works as port multiplexer without any hardware offloading support.
Signed-off-by: Oleksij Rempel
---
drivers/net/dsa/Kconfig | 2 +
drivers/net/dsa/Makefile | 1 +
drivers/net/dsa/qca/Kconfig | 11 +
Atheros AR9331 has built-in 5 port switch. The switch can be configured
to use all 5 or 4 ports. One of built-in PHYs can be used by first built-in
ethernet controller or to be used directly by the switch over second ethernet
controller.
Signed-off-by: Oleksij Rempel
---
On 20-10-19, 20:56, Bjorn Andersson wrote:
> Enable the driver for the watchdog found in the application processor
> subsystem on most modern Qualcomm platforms.
Reviewed-by: Vinod Koul
With this and the node patch, I was able to test wdt on db845c:
Tested-by: Vinod Koul
>
> Signed-off-by:
Do some cleanup of the netback init and deinit code:
- add an omnipotent queue deinit function usable from
xenvif_disconnect_data() and the error path of xenvif_connect_data()
- only install the irq handlers after initializing all relevant items
(especially the kthreads related to the queue)
On 21.10.19 07:27, Juergen Gross wrote:
Do some cleanup of the netback init and deinit code:
- add an omnipotent queue deinit function usable from
xenvif_disconnect_data() and the error path of xenvif_connect_data()
- only install the irq handlers after initializing all relevant items
Do some cleanup of the netback init and deinit code:
- add an omnipotent queue deinit function usable from
xenvif_disconnect_data() and the error path of xenvif_connect_data()
- only install the irq handlers after initializing all relevant items
(especially the kthreads related to the queue)
Hello,
syzbot found the following crash on:
HEAD commit:eda57a0e Merge branch 'akpm' (patches from Andrew)
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=17310520e0
kernel config: https://syzkaller.appspot.com/x/.config?x=966954bb171a60e7
dashboard
Hello,
syzbot found the following crash on:
HEAD commit:64c5e530 Merge tag 'arc-4.19-rc8' of git://git.kernel.org/..
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=17add28540
kernel config: https://syzkaller.appspot.com/x/.config?x=88e9a8a39dc0be2d
Hello,
syzbot found the following crash on:
HEAD commit:b145b0eb Merge tag 'for-linus' of git://git.kernel.org/pub..
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=13887f1f60
kernel config: https://syzkaller.appspot.com/x/.config?x=1ec3be9936e004f6
The USB id pins and wlan regulator are not platform devices, so move
them out of /soc
Signed-off-by: Bjorn Andersson
---
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 58 ++--
1 file changed, 29 insertions(+), 29 deletions(-)
diff --git
Pad all addresses in msm8996.dtsi to 8 digits, in order to make it
easier to ensure ordering when adding new nodes.
Signed-off-by: Bjorn Andersson
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 144 +-
1 file changed, 72 insertions(+), 72 deletions(-)
diff --git
Introduce a base dts for the Inforce 6640 Single Board Computer. This
initial commit boots to console on the uart and provides UFS and SD card
storage support.
Signed-off-by: Bjorn Andersson
---
arch/arm64/boot/dts/qcom/Makefile| 1 +
arch/arm64/boot/dts/qcom/apq8096-ifc6640.dts |
Instead of mimicing the structure of the platform, reference nodes by
their label in apq8096-db820c.dtsi. Add labels in msm8996.dtsi where
necessary.
Signed-off-by: Bjorn Andersson
---
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 691 +--
arch/arm64/boot/dts/qcom/msm8996.dtsi
Sort all nodes in db820c.dtsi based on address, then name.
Signed-off-by: Bjorn Andersson
---
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 336 +--
1 file changed, 168 insertions(+), 168 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
Update the regulator names in db820c.dtsi to use the names from the
schematics, instead of the made up genric names.
Signed-off-by: Bjorn Andersson
---
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 239 +--
1 file changed, 169 insertions(+), 70 deletions(-)
diff --git
As the definition of available PMICs and the names of their outputs are
board specifc move this to db820c.dtsi
Signed-off-by: Bjorn Andersson
---
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 308 ++-
arch/arm64/boot/dts/qcom/msm8996.dtsi| 53 +---
2 files changed, 156
Rather than scattering pinctrl definitions in various files, merge the
nodes into db820c.dtsi to make it easier to navigate.
Signed-off-by: Bjorn Andersson
---
.../boot/dts/qcom/apq8096-db820c-pins.dtsi| 109 --
.../dts/qcom/apq8096-db820c-pmic-pins.dtsi| 92 -
Sort all the nodes by unit address, then name.
Signed-off-by: Bjorn Andersson
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 3716 -
1 file changed, 1856 insertions(+), 1860 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi
Prior refactoring have left a few root nodes scattered throughout
db820c.dtsi, group these at the top of the file.
Signed-off-by: Bjorn Andersson
---
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 94 ++--
1 file changed, 45 insertions(+), 49 deletions(-)
diff --git
Refactor msm8996 and db820c in order to make it follow the structure of newer
platforms, move db820c specific things to db820c.dtsi and then introduce the
Informace 6640 Single Board Computer.
Bjorn Andersson (11):
arm64: dts: qcom: db820c: Move non-soc entries out of /soc
arm64: dts: qcom:
Supplies for the various components in the SoC depends on board layout,
so move the supply definitions to db820c.dtsi instead of carrying them
in the platform dtsi.
Signed-off-by: Bjorn Andersson
---
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 44
vmemmap_populate_basepages() is used across platforms to allocate backing
memory for vmemmap mapping. This is used as a standard default choice or
as a fallback when intended huge pages allocation fails. This just creates
entire vmemmap mapping with base pages (PAGE_SIZE).
On arm64 platforms,
Device memory ranges when getting hot added into ZONE_DEVICE, might require
their vmemmap mapping's backing memory to be allocated from their own range
instead of consuming system memory. This prevents large system memory usage
for potentially large device memory ranges. Device driver communicates
This series enables vmemmap backing memory allocation from device memory
ranges on arm64. But before that, it enables vmemmap_populate_basepages()
to accommodate struct vmem_altmap based requests.
This applies alongside arm64 memory hot remove (v10) on next-20191018.
Chip on the board is S905D3 not S905X3.
Fixes: 1d7c541b8a5b ("soc: amlogic: meson-gx-socinfo: Add S905X3 ID for VIM3L")
Signed-off-by: Christian Hewitt
---
drivers/soc/amlogic/meson-gx-socinfo.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On 11-10-19, 16:44, Srinivas Kandagatla wrote:
> +static irqreturn_t qcom_swrm_irq_handler(int irq, void *dev_id)
> +{
> + struct qcom_swrm_ctrl *ctrl = dev_id;
> + u32 sts, value;
> + unsigned long flags;
> +
> + ctrl->reg_read(ctrl, SWRM_INTERRUPT_STATUS, );
> +
> + if (sts
On 10/19/19 2:42 AM, Steven Rostedt wrote:
>
> Peter told me it was fine, but I'm also adding Song who is the author
> of the code.
>
> Also needs the tags (which I'll add)
>
> Cc: sta...@vger.kernel.org
> Fixes: e12f03d7031a9 ("perf/core: Implement the 'perf_kprobe' PMU")
>
> -- Steve
>
>
>
On Fri, Oct 18, 2019 at 10:31 PM Jakub Kicinski
wrote:
>
> On Fri, 18 Oct 2019 12:04:35 +0530, Vasundhara Volam wrote:
> > On Fri, Oct 18, 2019 at 12:52 AM Jakub Kicinski wrote:
> > > On Thu, 17 Oct 2019 17:31:22 +0530, Sheetal Tigadoli wrote:
> > > > diff --git
On 11-10-19, 16:44, Srinivas Kandagatla wrote:
> This patch adds bindings for Qualcomm soundwire controller.
>
> Qualcomm SoundWire Master controller is present in most Qualcomm SoCs
> either integrated as part of WCD audio codecs via slimbus or
> as part of SOC I/O.
>
> Signed-off-by: Srinivas
On 16-09-19, 14:23, Pierre-Louis Bossart wrote:
> These patches were originally submitted as '[RFC PATCH 00/11]
> soundwire: intel: simplify DAI/PDI handling'. There were no comments
> received.
>
> This series only provides the PDI changes, which makes it simpler to
> review. The DAI changes
On 16-09-19, 14:09, Pierre-Louis Bossart wrote:
> Prepare for future PM support and fix error handling by disabling
> interrupts as needed.
>
> Signed-off-by: Pierre-Louis Bossart
> ---
> drivers/soundwire/cadence_master.c | 18 --
> drivers/soundwire/cadence_master.h | 2 +-
>
On 2019/10/19 16:34, Christoph Hellwig wrote:
> On Sat, Oct 19, 2019 at 02:45:43PM +0800, Yunsheng Lin wrote:
>> +if (nr_node_ids > 1 && dev_to_node(bus->bridge) == NUMA_NO_NODE)
>> +dev_err(bus->bridge, FW_BUG "No node assigned on NUMA capable
>> HW by BIOS. Please contact your
On 16-09-19, 14:09, Pierre-Louis Bossart wrote:
> Provide debugfs capability to kick link and devices into hard-reset
> (as defined by MIPI). This capability is really useful when some
> devices are no longer responsive and/or to check the software handling
> of resynchronization.
>
>
Enable the driver for the watchdog found in the application processor
subsystem on most modern Qualcomm platforms.
Signed-off-by: Bjorn Andersson
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
The NXP's QorIQ Processors based on ARM Core have RCPM module
(Run Control and Power Management), which performs system level
tasks associated with power management such as wakeup source control.
This driver depends on PM wakeup source framework which help to
collect wake information.
Some user might want to go through all registered wakeup sources
and doing things accordingly. For example, SoC PM driver might need to
do HW programming to prevent powering down specific IP which wakeup
source depending on. So add this API to help walk through all registered
wakeup source objects
By default, QorIQ SoC's RCPM register block is Big Endian. But
there are some exceptions, such as LS1088A and LS2088A, are
Little Endian. So add this optional property to help identify
them.
Actually LS2021A and other Layerscapes won't totally follow Chassis
2.1, so separate them from powerpc
On Sun, Aug 25, 2019 at 9:14 AM Frank Lee wrote:
>
> HI Vasily,
Hi Yangtao,
Sorry for the late reply,
> On Wed, Aug 14, 2019 at 11:01 AM Vasily Khoruzhick wrote:
> >
> > On Tue, Aug 13, 2019 at 1:06 PM Ondřej Jirman wrote:
> > >
> > > On Mon, Aug 12, 2019 at 04:54:15PM -0700, Vasily
The struct fw_type_1 is used by MAC only, so rename it to a meaningful one.
Besides, adjust two messages. Replace "load xxx fail" with "check xxx fail"
Signed-off-by: Hayes Wang
---
drivers/net/usb/r8152.c | 82 -
1 file changed, 41 insertions(+), 41
Support loading the firmware of the PHY with the type of RTL_FW_PHY_NC.
Hayes Wang (4):
r8152: rename fw_type_1 with fw_mac
r8152: add checking fw_offset field of struct fw_mac
r8152: move r8153_patch_request forward
r8152: support firmware of PHY NC for RTL8153A
drivers/net/usb/r8152.c
Move r8153_patch_request() forward for later patch.
Signed-off-by: Hayes Wang
---
drivers/net/usb/r8152.c | 54 -
1 file changed, 27 insertions(+), 27 deletions(-)
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
index
Support the firmware of PHY NC which is used to fix the issue found
for PHY. Currently, only RTL_VER_04, RTL_VER_05, and RTL_VER_06 need
it.
The order of loading PHY firmware would be
RTL_FW_PHY_START
RTL_FW_PHY_NC
RTL_FW_PHY_STOP
The RTL_FW_PHY_START/RTL_FW_PHY_STOP are
Make sure @fw_offset field of struct fw_mac is more than the size
of struct fw_mac.
Signed-off-by: Hayes Wang
---
drivers/net/usb/r8152.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
index
On 2019/10/10 2:46, Scott Wood wrote:
On Wed, 2019-10-09 at 16:41 +0800, Jason Yan wrote:
Hi Scott,
On 2019/10/9 15:13, Scott Wood wrote:
On Wed, 2019-10-09 at 14:10 +0800, Jason Yan wrote:
Hi Scott,
Would you please take sometime to test this?
Thank you so much.
On 2019/9/24 13:52,
Hi Bjorn,
On 2019-10-20 19:06, Bjorn Andersson wrote:
Cc stable@ is used to assist in making sure your patch is backported to
stable kernels, other than that the purpose Cc here is to indicate that
specific people have been requested to comment on your patch.
So please skip these from the
On Sat 19 Oct 04:37 PDT 2019, Sai Prakash Ranjan wrote:
> LLCC behaviour is controlled by the configuration data set
> in the llcc-qcom driver, add the same for SC7180 SoC.
> Also convert the existing bindings to json-schema and add
> the compatible for SC7180 SoC.
>
Thanks for the patches and
From: yuqi jin
When the address width of DMA is greater than 32, the packet header occupies
a BD descriptor. The starting address of the data should be added to the
header length.
Fixes: a993db88d17d ("net: stmmac: Enable support for > 32 Bits addressing in
XGMAC")
Cc: Eric Dumazet
Cc:
On Fri, Oct 18, 2019 at 07:56:09AM -0400, Qian Cai wrote:
>
>
> On Oct 18, 2019, at 2:35 AM, Naoya Horiguchi
> wrote:
>
>
> You're right, then I don't see how this happens. If the error hugepage was
> isolated without having PG_hwpoison set, it's unexpected and problematic.
>
On 2019/10/20 6:04, Alexandre Belloni wrote:
> On 15/10/2019 16:08:27+0800, Jinke Fan wrote:
>> save_freq_select = CMOS_READ(RTC_FREQ_SELECT);
>> -CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
>> +
>> +#ifdef CONFIG_X86
>> +if (boot_cpu_data.x86_vendor ==
On 10/19/2019 8:19 PM, Vivien Didelot wrote:
> Now that we have a potential list of CPU ports, make use of it instead
> of only configuring the master device of an unique CPU port.
Out of your series, this is the only one that has possible side effects
to existing set-up in that if you had
Add a device tree match table.
Signed-off-by: Ikjoon Jang
---
drivers/hid/hid-google-hammer.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/hid/hid-google-hammer.c b/drivers/hid/hid-google-hammer.c
index 84f8c127ebdc..b726f8a15044 100644
---
DT bindings for Whiskers swich device and its documentation.
v2 has no changes from v1, but
* dropped a patch not relevant to DT bindings
* Add more recipients (add devicetree@ and robh+dt@)
Ikjoon Jang (2):
dt-bindings: input: Add DT bindings for Whiskers switch
HID: google: Add of_match
Add the DT binding document for Hammer's TABLET_MODE switch.
Signed-off-by: Ikjoon Jang
---
.../devicetree/bindings/input/cros-cbas.yaml | 25 +++
1 file changed, 25 insertions(+)
create mode 100644 Documentation/devicetree/bindings/input/cros-cbas.yaml
diff --git
On 10/19/2019 8:19 PM, Vivien Didelot wrote:
> Add a list of switch ports within the switch fabric. This will help the
> lookup of a port inside the whole fabric, and it is the first step
> towards supporting multiple CPU ports, before deprecating the usage of
> the unique dst->cpu_dp pointer.
On 10/19/2019 8:19 PM, Vivien Didelot wrote:
> Allocate the struct dsa_port the first time it is accessed with
> dsa_port_touch, and remove the static dsa_port array from the
> dsa_switch structure.
>
> Signed-off-by: Vivien Didelot
Reviewed-by: Florian Fainelli
--
Florian
On 10/19/2019 8:19 PM, Vivien Didelot wrote:
> Now that ports are dynamically listed in the fabric, there is no need
> to provide a special helper to allocate the dsa_switch structure. This
> will give more flexibility to drivers to embed this structure as they
> wish in their private
If we reach here with r = 0, we will reassign r = 0
unnecesarry, then do the label set_irqchip_out work.
If we reach here with r != 0, then we will do the label
work directly. So this if statement and r = 0 assignment
is redundant.
Signed-off-by: Miaohe Lin
---
arch/x86/kvm/x86.c | 3 ---
1
On 10/19/2019 8:19 PM, Vivien Didelot wrote:
> Instead of digging into the other dsa_switch structures of the fabric
> and relying too much on the dsa_to_port helper, use the new list
> of switch fabric ports to remap the Port VLAN Map of local bridge
> group members or remap the Port VLAN
On 10/19/2019 8:19 PM, Vivien Didelot wrote:
> Instead of digging into the other dsa_switch structures of the fabric
> and relying too much on the dsa_to_port helper, use the new list of
> switch fabric ports to define the mask of the local ports allowed to
> receive frames from another port of
On 10/19/2019 8:19 PM, Vivien Didelot wrote:
> Since mv88e6xxx_pvt_map is a static helper, no need to return
> -EOPNOTSUPP if the chip has no PVT, simply silently skip the operation.
>
> Signed-off-by: Vivien Didelot
Reviewed-by: Florian Fainelli
--
Florian
> Subject: [PATCH] ASoC: bdw-rt5677: enable runtime channel merge
>
> In the DAI link "Capture PCM", the FE DAI "Capture Pin" supports 4-channel
> capture but the BE DAI supports only 2-channel capture. To fix the channel
> mismatch, we need to enable the runtime channel merge for this DAI link.
On 10/19/2019 8:19 PM, Vivien Didelot wrote:
> Use the new ports list instead of iterating over switches and their
> ports when setting up the default CPU port. Unassign it on teardown.
>
> Now that we can iterate over multiple CPU ports, remove dst->cpu_dp.
>
> At the same time, provide a
On 10/19/2019 8:19 PM, Vivien Didelot wrote:
> Use the new ports list instead of iterating over switches and their
> ports when looking up the first CPU port in the tree.
>
> Signed-off-by: Vivien Didelot
Reviewed-by: Florian Fainelli
--
Florian
From: Randy Dunlap
Fix Sphinx warning when building Documentation:
Documentation/admin-guide/sysctl/kernel.rst:397: WARNING: Title underline too
short.
hung_task_interval_warnings:
===
Signed-off-by: Randy Dunlap
Cc: Dmitry Safonov
Cc: Andrew Morton
Cc: Ingo Molnar
---
On 10/19/2019 8:19 PM, Vivien Didelot wrote:
> Use the new ports list instead of iterating over switches and their
> ports to find a port from a given node.
>
> Signed-off-by: Vivien Didelot
Reviewed-by: Florian Fainelli
--
Florian
This adds tests which will validate architecture page table helpers and
other accessors in their compliance with expected generic MM semantics.
This will help various architectures in validating changes to existing
page table helpers or addition of new ones.
This test covers basic page table
This series adds a test validation for architecture exported page table
helpers. Patch in the series adds basic transformation tests at various
levels of the page table.
This test was originally suggested by Catalin during arm64 THP migration
RFC discussion earlier. Going forward it can include
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