[RFC PATCH v11 4/9] clk: tegra: Add Tegra210 CSI TPG clock gate

Tegra210 CSI hardware internally uses PLLD for internal test pattern generator logic. PLLD_BASE register in CAR has a bit CSI_CLK_SOURCE to enable PLLD out to CSI during TPG mode. This patch adds this CSI TPG clock gate to Tegra210 clock driver to allow Tegra video driver to ungate CSI TPG clock

[RFC PATCH v11 5/9] dt-binding: tegra: Add VI and CSI bindings

Tegra contains VI controller which can support up to 6 MIPI CSI camera sensors. Each Tegra CSI port from CSI unit can be one-to-one mapper to VI channel and can capture from an external camera sensor or from built-in test pattern generator. This patch adds dt-bindings for Tegra VI and CSI.

[RFC PATCH v11 2/9] arm64: tegra: Add reset-cells to mc

Tegra210 device tree is missing reset-cells property for mc node. This patch fixes it. Signed-off-by: Sowjanya Komatineni --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi

[RFC PATCH v11 7/9] MAINTAINERS: Add Tegra Video driver section

Add maintainers and mailing list entries to Tegra Video driver section. Acked-by: Thierry Reding Signed-off-by: Sowjanya Komatineni --- MAINTAINERS | 10 ++ 1 file changed, 10 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 973b7db..795b201 100644 --- a/MAINTAINERS +++

[RFC PATCH v11 8/9] dt-bindings: reset: Add ID for Tegra210 VI reset

This patch adds ID for Tegra210 VI controller reset to use with device tree. Acked-by: Rob Herring Signed-off-by: Sowjanya Komatineni --- include/dt-bindings/reset/tegra210-car.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/reset/tegra210-car.h

[RFC PATCH v11 6/9] media: tegra: Add Tegra210 Video input driver

Tegra210 contains a powerful Video Input (VI) hardware controller which can support up to 6 MIPI CSI camera sensors. Each Tegra CSI port can be one-to-one mapped to VI channel and can capture from an external camera sensor connected to CSI or from built-in test pattern generator. Tegra210

[RFC PATCH v11 9/9] arm64: tegra: Add Tegra VI CSI support in device tree

Tegra210 contains VI controller for video input capture from MIPI CSI camera sensors and also supports built-in test pattern generator. CSI ports can be one-to-one mapped to VI channels for capturing from an external sensor or from built-in test pattern generator. This patch adds support for VI

[RFC PATCH v11 1/9] arm64: tegra: Fix sor powergate clocks and reset

Tegra210 device tree lists csi clock and reset under SOR powergate node. But Tegra210 has csicil in SOR partition and csi in VENC partition. So, this patch includes fix for sor powergate node. Signed-off-by: Sowjanya Komatineni --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 5 +++-- 1 file

[RFC PATCH v11 3/9] dt-bindings: clock: tegra: Add clk id for CSI TPG clock

Tegra210 uses PLLD out internally for CSI TPG. This patch adds clk id for this CSI TPG clock from PLLD. Acked-by: Rob Herring Acked-by: Stephen Boyd Signed-off-by: Sowjanya Komatineni --- include/dt-bindings/clock/tegra210-car.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff

Re: [PATCH 04/18] ARM: debug-ll: Add support for r8a7742

On Wed, Apr 29, 2020 at 10:56:41PM +0100, Lad Prabhakar wrote: > @@ -1701,6 +1709,7 @@ config DEBUG_UART_PHYS > default 0xe6e6 if DEBUG_RCAR_GEN2_SCIF0 > default 0xe6e68000 if DEBUG_RCAR_GEN2_SCIF1 > default 0xe6ee if DEBUG_RCAR_GEN2_SCIF4 > + default 0xe6c6 if

[PATCH 11/18] ARM: dts: r8a7742: Add SYS-DMAC support

Describe SYS-DMAC0/1 in the R8A7742 device tree. Signed-off-by: Lad Prabhakar Reviewed-by: Marian-Cristian Rotariu --- arch/arm/boot/dts/r8a7742.dtsi | 66 ++ 1 file changed, 66 insertions(+) diff --git a/arch/arm/boot/dts/r8a7742.dtsi

[PATCH 10/18] dt-bindings: rcar-dmac: Document r8a7742 support

Renesas RZ/G SoC also have the R-Car gen2/3 compatible DMA controllers. Document RZ/G1H (also known as R8A7742) SoC bindings. Signed-off-by: Lad Prabhakar Reviewed-by: Marian-Cristian Rotariu --- Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt | 1 + 1 file changed, 1 insertion(+)

[PATCH 13/18] dt-bindings: serial: renesas,scifa: Document r8a7742 bindings

RZ/G1H (R8A7742) SoC also has the R-Car gen2 compatible SCIFA ports, so document the SoC specific bindings. Signed-off-by: Lad Prabhakar Reviewed-by: Marian-Cristian Rotariu --- Documentation/devicetree/bindings/serial/renesas,scifa.yaml | 1 + 1 file changed, 1 insertion(+) diff --git

[PATCH 18/18] ARM: dts: r8a7742: Add GPIO support

Describe GPIO blocks in the R8A7742 device tree. Signed-off-by: Lad Prabhakar Reviewed-by: Marian-Cristian Rotariu --- arch/arm/boot/dts/r8a7742.dtsi | 36 ++-- 1 file changed, 30 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/r8a7742.dtsi

[PATCH 12/18] dt-bindings: serial: renesas,scif: Document r8a7742 bindings

RZ/G1H (R8A7742) SoC also has the R-Car gen2 compatible SCIF ports, so document the SoC specific bindings. Signed-off-by: Lad Prabhakar Reviewed-by: Marian-Cristian Rotariu --- Documentation/devicetree/bindings/serial/renesas,scif.yaml | 1 + 1 file changed, 1 insertion(+) diff --git

[PATCH 08/18] dt-bindings: irqchip: renesas-irqc: Document r8a7742 bindings

Document SoC specific bindings for RZ/G1H (r8a7742) SoC. Signed-off-by: Lad Prabhakar Reviewed-by: Marian-Cristian Rotariu --- Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.yaml | 1 + 1 file changed, 1 insertion(+) diff --git

[PATCH 17/18] dt-bindings: gpio: rcar: Add r8a7742 (RZ/G1H) support

Renesas RZ/G1H (R8A7742) SoC GPIO blocks are identical to the R-Car Gen2 family. Add support for its GPIO controllers. Signed-off-by: Lad Prabhakar Reviewed-by: Marian-Cristian Rotariu --- Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt | 1 + 1 file changed, 1 insertion(+) diff

[PATCH 14/18] dt-bindings: serial: renesas,scifb: Document r8a7742 bindings

RZ/G1H (R8A7742) SoC also has the R-Car gen2 compatible SCIFB ports, so document the SoC specific bindings. Signed-off-by: Lad Prabhakar Reviewed-by: Marian-Cristian Rotariu --- Documentation/devicetree/bindings/serial/renesas,scifb.yaml | 1 + 1 file changed, 1 insertion(+) diff --git

[PATCH 09/18] ARM: dts: r8a7742: Add IRQC support

Describe the IRQC interrupt controller in the r8a7742 device tree. Signed-off-by: Lad Prabhakar Reviewed-by: Marian-Cristian Rotariu --- arch/arm/boot/dts/r8a7742.dtsi | 14 ++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/r8a7742.dtsi

[PATCH 07/18] ARM: dts: r8a7742: Initial SoC device tree

Basic support for the RZ/G1H (R8A7742) SoC. Added placeholders for the peripherals supported by the SoC which will be filled up by incremental patches. Signed-off-by: Lad Prabhakar Reviewed-by: Marian-Cristian Rotariu --- arch/arm/boot/dts/r8a7742.dtsi | 715

[PATCH 15/18] dt-bindings: serial: renesas,hscif: Document r8a7742 bindings

RZ/G1H (R8A7742) SoC also has the R-Car gen2 compatible HSCIF ports, so document the SoC specific bindings. Signed-off-by: Lad Prabhakar Reviewed-by: Marian-Cristian Rotariu --- Documentation/devicetree/bindings/serial/renesas,hscif.yaml | 1 + 1 file changed, 1 insertion(+) diff --git

[PATCH 16/18] ARM: dts: r8a7742: Add [H]SCIF{A|B} support

Describe [H]SCIF{|A|B} ports in the R8A7742 device tree. Signed-off-by: Lad Prabhakar Reviewed-by: Marian-Cristian Rotariu --- arch/arm/boot/dts/r8a7742.dtsi | 140 ++--- 1 file changed, 130 insertions(+), 10 deletions(-) diff --git

[PATCH 01/18] soc: renesas: Add Renesas R8A7742 config option

Add configuration option for the RZ/G1H (R8A77420) SoC. Signed-off-by: Lad Prabhakar Reviewed-by: Marian-Cristian Rotariu --- drivers/soc/renesas/Kconfig | 7 +++ 1 file changed, 7 insertions(+) diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig index 1eff82c..53cd8d2

[PATCH 02/18] ARM: shmobile: defconfig: Enable r8a7742 SoC

Enable recently added r8a7742 (RZ/G1H) SoC. Signed-off-by: Lad Prabhakar Reviewed-by: Marian-Cristian Rotariu --- arch/arm/configs/shmobile_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/shmobile_defconfig b/arch/arm/configs/shmobile_defconfig index

[PATCH 05/18] dt-bindings: pinctrl: sh-pfc: Document r8a7742 PFC support

Document PFC support for the RZ/G1H (R8A7742) SoC. Signed-off-by: Lad Prabhakar Reviewed-by: Marian-Cristian Rotariu --- Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt | 1 + 1 file changed, 1 insertion(+) diff --git

[PATCH 06/18] pinctrl: sh-pfc: r8a7790: Add r8a7742 PFC support

Renesas RZ/G1H (R8A7742) is pin compatible with R-Car H2 (R8A7790). Signed-off-by: Lad Prabhakar Reviewed-by: Marian-Cristian Rotariu --- drivers/pinctrl/sh-pfc/Kconfig | 4 drivers/pinctrl/sh-pfc/Makefile | 1 + drivers/pinctrl/sh-pfc/core.c| 6 ++

Re: [PATCH] platform/chrome: cros_ec_typec: Handle NULL EC pointer during probe.

Hi Daniil, Thank you for the patch. On 28/4/20 3:02, Daniil Lunev wrote: > Missing EC in device hierarchy causes NULL pointer to be returned to the > probe function which leads to NULL pointer dereference when trying to > send a command to the EC. This can be the case if the device is missing >

[PATCH 04/18] ARM: debug-ll: Add support for r8a7742

Enable low-level debugging support for RZ/G1H (R8A7742). RZ/G1H uses SCIFA2 for the debug console. Signed-off-by: Lad Prabhakar Reviewed-by: Marian-Cristian Rotariu --- arch/arm/Kconfig.debug | 10 ++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/Kconfig.debug

[PATCH 03/18] ARM: multi_v7_defconfig: Enable r8a7742 SoC

Enable recently added r8a7742 (RZ/G1H) SoC. Signed-off-by: Lad Prabhakar Reviewed-by: Marian-Cristian Rotariu --- arch/arm/configs/multi_v7_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig index

Re: [PATCH v2 0/5] Fix ELF / FDPIC ELF core dumping, and use mmap_sem properly in there

On Wed, Apr 29, 2020 at 11:49:49PM +0200, Jann Horn wrote: > At the moment, we have that rather ugly mmget_still_valid() helper to > work around : ELF core dumping > doesn't take the mmap_sem while traversing the task's VMAs, and if > anything (like

[PATCH 00/18] Add R8A7742/RZG1H board support

Hi All, This patch set adds initial board support for R8A7742 SoC, enabling R8A7742 arch in defconfigs with initial dtsi. Cheers, --Prabhakar Lad Prabhakar (18): soc: renesas: Add Renesas R8A7742 config option ARM: shmobile: defconfig: Enable r8a7742 SoC ARM: multi_v7_defconfig: Enable

Re: [PATCH 03/10] efi/x86: Use pr_efi_err for error messages

On Wed, 29 Apr 2020 at 23:53, Joe Perches wrote: > > On Wed, 2020-04-29 at 17:43 -0400, Arvind Sankar wrote: > > On Wed, Apr 29, 2020 at 08:49:21PM +0200, Ard Biesheuvel wrote: > > > On Wed, 29 Apr 2020 at 20:47, Joe Perches wrote: > > > > On Wed, 2020-04-29 at 13:41 -0400, Arvind Sankar wrote:

[PATCH 09/15] ARM: dts: Configure system timers for omap4

We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on

[PATCH 10/15] ARM: dts: Configure system timers for omap5 and dra7

We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on

[PATCH 15/15] bus: ti-sysc: Timers no longer need legacy quirk handling

As timers no longer need legacy quirk handling, let's move them to the CONFIG_DEBUG section to make it easier to see which drivers still need more work. Let's also add detection for few more older timer revisions while at it as that makes CONFIG_DEBUG output easier to read with proper names. Cc:

[PATCH 02/15] dt-bindings: timer: add ti,dmtimer compatible for for system timers

The TI dual-mode timer can be used for both clocksource and clockevent system timers. We need a way to specify which dual-mode timers are reserved for system timers as there are multiple instances available that may require a board specific configuration. Let's add a generic compatible

[PATCH 08/15] ARM: dts: Configure system timers for am437x

We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on

[PATCH 11/15] ARM: dts: Configure system timers for omap3

We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on

[PATCH 13/15] ARM: dts: Configure system timers for omap2

We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on

[PATCH 05/15] bus: ti-sysc: Ignore timer12 on secure omap3

Some early omap3 boards use timer12 for system timer, but for secure SoCs like on n900 it's not accessible. Likely we will be configuring unavailable devices for other SoCs too based on runtime SoC detection, so let's use a switch to start with. Cc: Keerthy Cc: Lokesh Vutla Cc: Tero Kristo

[PATCH 06/15] ARM: OMAP2+: Add omap_init_time_of()

This allows us to move the SoCs to probe system timers one SoC at at time. As arch/arm/mach-omap2/timer.c will be eventually gone, let's just add omap_init_time_of() to board-generic.c directly. Cc: Keerthy Cc: Lokesh Vutla Cc: Tero Kristo Signed-off-by: Tony Lindgren ---

[PATCH 14/15] ARM: OMAP2+: Drop old timer code for dmtimer and 32k counter

With dmtimer and 32k counter being initialized based on devicetree data, we can just drop the old timer code. This still leaves the omap5 and dra7 realtime_counter_init() that depend on the smc calls and control module platform code for the dra7 quirk init. Cc: Keerthy Cc: Lokesh Vutla Cc:

[PATCH 07/15] ARM: dts: Configure system timers for am335x

We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on

[PATCH 04/15] clk: ti: dm816: enable sysclk6_ck on init

We need sysclk6_ck enabled early as it is needed by l4_ls and system timers early on boot. This removes the dependency of system timers to the interconnect related code that can be then probed later on when suitable at module_init time. Cc: linux-...@vger.kernel.org Cc: Michael Turquette Cc:

[PATCH 12/15] ARM: dts: Configure system timers for ti81xx

We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on

[PATCH 03/15] clocksource/drivers/timer-ti-dm: Add clockevent and clocksource support

We can move the TI dmtimer clockevent and clocksource to live under drivers/clocksource if we rely only on the clock framework, and handle the module configuration directly in the clocksource driver based on the device tree data. This removes the early dependency with system timers to the

[PATCH 01/15] clocksource/drivers/timer-ti-32k: Add support for initializing directly

Let's allow probing the 32k counter directly based on devicetree data to prepare for dropping the related legacy platform code. Let's only do this if the parent node is compatible with ti-sysc to make sure we have the related devicetree data available. Let's also show the 32k counter information

[PATCHv2 00/15] Update omaps to use drivers/clocksource timers

Hi all, Here's v2 series to udpate omaps to use drivers/clocksource timers for the 32k counter and dmtimer, and to remove the old legacy platform code. Please review and test. I've updated the timer-ti-dm-systimer.c patch based on the comments from Daniel, and also updated the dts files

Re: [PATCH 03/10] efi/x86: Use pr_efi_err for error messages

On Wed, 2020-04-29 at 17:43 -0400, Arvind Sankar wrote: > On Wed, Apr 29, 2020 at 08:49:21PM +0200, Ard Biesheuvel wrote: > > On Wed, 29 Apr 2020 at 20:47, Joe Perches wrote: > > > On Wed, 2020-04-29 at 13:41 -0400, Arvind Sankar wrote: > > > > Use pr_efi_err instead of bare efi_printk for error

Re: [PATCH 09/10] efi/x86: Support builtin command line

On Wed, 29 Apr 2020 at 23:48, Arvind Sankar wrote: > > On Wed, Apr 29, 2020 at 11:40:51PM +0200, Ard Biesheuvel wrote: > > On Wed, 29 Apr 2020 at 23:39, Arvind Sankar wrote: > > > > > > On Wed, Apr 29, 2020 at 09:07:32PM +0200, Ard Biesheuvel wrote: > > > > On Wed, 29 Apr 2020 at 19:41, Arvind

BPF vs objtool again

On Thu, Jul 18, 2019 at 12:14:08PM -0700, tip-bot for Josh Poimboeuf wrote: > Commit-ID: 3193c0836f203a91bef96d88c64cccf0be090d9c > Gitweb: > https://git.kernel.org/tip/3193c0836f203a91bef96d88c64cccf0be090d9c > Author: Josh Poimboeuf > AuthorDate: Wed, 17 Jul 2019 20:36:45 -0500 >

Re: [PATCH 03/10] efi/x86: Use pr_efi_err for error messages

On Wed, Apr 29, 2020 at 11:45:17PM +0200, Ard Biesheuvel wrote: > On Wed, 29 Apr 2020 at 23:43, Arvind Sankar wrote: > > > > On Wed, Apr 29, 2020 at 08:49:21PM +0200, Ard Biesheuvel wrote: > > > On Wed, 29 Apr 2020 at 20:47, Joe Perches wrote: > > > > > > > > On Wed, 2020-04-29 at 13:41 -0400,

[PATCH v2 5/5] mm/gup: Take mmap_sem in get_dump_page()

Properly take the mmap_sem before calling into the GUP code from get_dump_page(); and play nice, allowing the GUP code to drop the mmap_sem if it has to sleep. As Linus pointed out, we don't actually need the VMA because __get_user_pages() will flush the dcache for us if necessary.

[PATCH v2 3/5] coredump: Refactor page range dumping into common helper

Both fs/binfmt_elf.c and fs/binfmt_elf_fdpic.c need to dump ranges of pages into the coredump file. Extract that logic into a common helper. Any other binfmt that actually wants to create coredumps will probably need the same function; so stop making get_dump_page() depend on CONFIG_ELF_CORE.

[PATCH v2 4/5] binfmt_elf, binfmt_elf_fdpic: Use a VMA list snapshot

In both binfmt_elf and binfmt_elf_fdpic, use a new helper dump_vma_snapshot() to take a snapshot of the VMA list (including the gate VMA, if we have one) while protected by the mmap_sem, and then use that snapshot instead of walking the VMA list without locking. An alternative approach would be

[PATCH v2 1/5] binfmt_elf_fdpic: Stop using dump_emit() on user pointers on !MMU

dump_emit() is for kernel pointers, and VMAs describe userspace memory. Let's be tidy here and avoid accessing userspace pointers under KERNEL_DS, even if it probably doesn't matter much on !MMU systems - especially given that it looks like we can just use the same get_dump_page() as on MMU if we

[PATCH v2 2/5] coredump: Let dump_emit() bail out on short writes

dump_emit() has a retry loop, but there seems to be no way for that retry logic to actually be used; and it was also buggy, writing the same data repeatedly after a short write. Let's just bail out on a short write. Suggested-by: Linus Torvalds Signed-off-by: Jann Horn --- fs/coredump.c | 22

[PATCH v2 0/5] Fix ELF / FDPIC ELF core dumping, and use mmap_sem properly in there

At the moment, we have that rather ugly mmget_still_valid() helper to work around : ELF core dumping doesn't take the mmap_sem while traversing the task's VMAs, and if anything (like userfaultfd) then remotely messes with the VMA tree, fireworks ensue. So at

Re: [PATCH 09/10] efi/x86: Support builtin command line

On Wed, Apr 29, 2020 at 11:40:51PM +0200, Ard Biesheuvel wrote: > On Wed, 29 Apr 2020 at 23:39, Arvind Sankar wrote: > > > > On Wed, Apr 29, 2020 at 09:07:32PM +0200, Ard Biesheuvel wrote: > > > On Wed, 29 Apr 2020 at 19:41, Arvind Sankar wrote: > > > > > > > > Add support for the x86

Re: [PATCH net-next v2 7/7] net: bcmgenet: add WAKE_FILTER support

On 4/29/20 1:02 PM, Doug Berger wrote: > This commit enables support for the WAKE_FILTER method of Wake on > LAN for the GENET driver. The method can be enabled by adding 'f' > to the interface 'wol' setting specified by ethtool. > > Rx network flow rules can be specified using ethtool. Rules

Re: [PATCH net-next v2 6/7] net: bcmgenet: add support for ethtool rxnfc flows

On 4/29/20 1:02 PM, Doug Berger wrote: > This commit enables driver support for ethtool commands of this form: > ethtool -N|-U|--config-nfc|--config-ntuple devname > flow-type ether|ip4 > [src xx:yy:zz:aa:bb:cc [m xx:yy:zz:aa:bb:cc]] > [dst xx:yy:zz:aa:bb:cc [m xx:yy:zz:aa:bb:cc]]

Re: [PATCH 03/10] efi/x86: Use pr_efi_err for error messages

On Wed, 29 Apr 2020 at 23:43, Arvind Sankar wrote: > > On Wed, Apr 29, 2020 at 08:49:21PM +0200, Ard Biesheuvel wrote: > > On Wed, 29 Apr 2020 at 20:47, Joe Perches wrote: > > > > > > On Wed, 2020-04-29 at 13:41 -0400, Arvind Sankar wrote: > > > > Use pr_efi_err instead of bare efi_printk for

Re: [PATCH 03/10] efi/x86: Use pr_efi_err for error messages

On Wed, Apr 29, 2020 at 08:49:21PM +0200, Ard Biesheuvel wrote: > On Wed, 29 Apr 2020 at 20:47, Joe Perches wrote: > > > > On Wed, 2020-04-29 at 13:41 -0400, Arvind Sankar wrote: > > > Use pr_efi_err instead of bare efi_printk for error messages. > > > > Perhaps it'd be better to rename

Re: [PATCH v10 1/6] dt-bindings: mfd: add document bindings for mp2629

On Mon, Apr 20, 2020 at 08:19:10AM +0100, Lee Jones wrote: > On Sat, 18 Apr 2020, Jonathan Cameron wrote: > > > On Sat, 18 Apr 2020 17:01:17 +0200 > > saravanan sekar wrote: > > > > > Hi Jonathan, > > > > > > On 18/04/20 4:53 pm, Jonathan Cameron wrote: > > > > On Fri, 17 Apr 2020 10:49:58

Re: [PATCH 09/10] efi/x86: Support builtin command line

On Wed, 29 Apr 2020 at 23:39, Arvind Sankar wrote: > > On Wed, Apr 29, 2020 at 09:07:32PM +0200, Ard Biesheuvel wrote: > > On Wed, 29 Apr 2020 at 19:41, Arvind Sankar wrote: > > > > > > Add support for the x86 CMDLINE_BOOL and CMDLINE_OVERRIDE configuration > > > options. > > > > > >

Re: [PATCH 09/10] efi/x86: Support builtin command line

On Wed, Apr 29, 2020 at 09:07:32PM +0200, Ard Biesheuvel wrote: > On Wed, 29 Apr 2020 at 19:41, Arvind Sankar wrote: > > > > Add support for the x86 CMDLINE_BOOL and CMDLINE_OVERRIDE configuration > > options. > > > > Signed-off-by: Arvind Sankar > > --- > >

Re: [PATCHv3] w1: omap-hdq: Simplify driver with PM runtime autosuspend

* H. Nikolaus Schaller [200429 21:35]: > I have reworked the way the spinlocks, setting and resetting > of the hdq_irqstatus bits are done and now it works right from > start of boot. Without any timeouts or delays. > > I am not exactly sure what went wrong, but it seems as if > the read is

Re: [PATCH 2/2] ima: add policy support for the new file open MAY_OPENEXEC flag

Hi Mimi, I love your patch! Yet something to improve: [auto build test ERROR on integrity/next-integrity] [also build test ERROR on linus/master v5.7-rc3 next-20200429] [cannot apply to security/next-testing] [if your patch is applied to the wrong git tree, please drop us a note to help improve

[PATCH v2 2/2] docs: sysctl/kernel: document firmware_config

Based on the firmware fallback mechanisms documentation and the implementation in drivers/base/firmware_loader/fallback.c. Signed-off-by: Stephen Kitt --- Documentation/admin-guide/sysctl/kernel.rst | 13 + 1 file changed, 13 insertions(+) diff --git

Re: [PATCH v2 2/4] clk: qcom: mmcc-msm8996: Properly describe GPU_GX gdsc

On Fri, 17 Apr 2020 00:00:42 -0700, Bjorn Andersson wrote: > The GPU_GX GDSC depends on both GPU GDSC being enabled and that the > VDD_GX rail is powered, so update the description of the node to cover > these requirements. > > Signed-off-by: Bjorn Andersson > --- > > Changes since v1: > -

Re: [PATCH 2/3] docs: sysctl/kernel: document ftrace entries

On Tue, 28 Apr 2020 12:41:33 -0600, Jonathan Corbet wrote: > On Thu, 23 Apr 2020 20:36:50 +0200 > Stephen Kitt wrote: > > Based on the ftrace documentation, the tp_printk boot parameter > > documentation, and the implementation in kernel/trace/trace.c. > > > > Signed-off-by: Stephen Kitt >

Re: [PATCH net-next v2 3/7] net: bcmgenet: move clk_wol management to bcmgenet_wol

On 4/29/20 1:02 PM, Doug Berger wrote: > The GENET_POWER_WOL_MAGIC power up and power down code configures > the device for WoL when suspending and disables the WoL logic when > resuming. It makes sense that this code should also manage the WoL > clocking. > > This commit consolidates the logic

Re: [PATCH 1/2] dt-bindings: pinctrl: qcom: Add sm8250 pinctrl bindings

On Thu, Apr 16, 2020 at 11:19:06PM -0700, Bjorn Andersson wrote: > Add device tree binding Documentation details for Qualcomm SM8250 > pinctrl driver. > > Signed-off-by: Bjorn Andersson > --- > .../bindings/pinctrl/qcom,sm8250-pinctrl.yaml | 147 ++ > 1 file changed, 147

Re: [PATCHv3] w1: omap-hdq: Simplify driver with PM runtime autosuspend

Hi, > Am 25.04.2020 um 12:37 schrieb H. Nikolaus Schaller : > > >> Am 25.04.2020 um 12:29 schrieb H. Nikolaus Schaller : >> >> H >> The things start to get "fixed" when the hdq_isr >> jumps to 6 indicating >> >> OMAP_HDQ_INT_STATUS_RXCOMPLETE | OMAP_HDQ_INT_STATUS_TXCOMPLETE >> >> So I am

Re: [PATCH net-next v2 4/7] Revert "net: bcmgenet: remove unused function in bcmgenet.c"

On 4/29/20 1:02 PM, Doug Berger wrote: > This reverts commit e2072600a24161b7ddcfb26814f69f5fbc8ef85a. > > This commit restores the previous implementation of Hardware Filter > Block functions to the file for use in subsequent commits. > > Signed-off-by: Doug Berger Acked-by: Florian Fainelli

Re: [PATCH net-next v2 5/7] net: bcmgenet: code movement

On 4/29/20 1:02 PM, Doug Berger wrote: > The Hardware Filter Block code will be used by ethtool functions > when defining flow types so this commit moves the functions in the > file to prevent the need for prototype declarations. > > This is broken out to facilitate review. > > Signed-off-by:

Re: [PATCH 08/10] efi/x86: Drop soft_limit for x86 initrd loading

On Wed, Apr 29, 2020 at 09:05:51PM +0200, Ard Biesheuvel wrote: > On Wed, 29 Apr 2020 at 19:41, Arvind Sankar wrote: > > > > Currently the EFI stub attempts to load initrd(s) specified on the > > command line below hdr->initrd_addr_max (2G) and if that fails, falls > > back to allocating at an

Re: [PATCH ghak25 v4 3/3] audit: add subj creds to NETFILTER_CFG record to cover async unregister

On 2020-04-29 14:47, Steve Grubb wrote: > On Wednesday, April 29, 2020 10:31:46 AM EDT Richard Guy Briggs wrote: > > On 2020-04-28 18:25, Paul Moore wrote: > > > On Wed, Apr 22, 2020 at 5:40 PM Richard Guy Briggs > wrote: > > > > Some table unregister actions seem to be initiated by the kernel

Re: [PATCH 1/2] dt-bindings: phy-mtk-tphy: add the property about force_vbus

On Fri, Apr 17, 2020 at 01:23:05PM +0800, Macpaul Lin wrote: > For some platforms, they don't have vbus pin connection between usb's phy > and mac. Hence we need to control force_vbus related registers to keep > hardware works normal. > This patch add the required bool property force_vbus. > >

Re: [PATCH RFC v2 00/11] dwmac-meson8b Ethernet RX delay configuration

> - Khadas VIM2 seems to have the RX delay built into the PCB trace > length. When I enable the RX delay on the PHY or MAC I can't get any > data through. I expect that we will have the same situation on all > GXBB, GXM, AXG, G12A, G12B and SM1 boards Hi Martin Can you actually see this on

Re: [PATCH V3 1/5] dt-bindings: clock: Convert i.MX6Q clock to json-schema

On Fri, Apr 17, 2020 at 08:41:27AM +0800, Anson Huang wrote: > Convert the i.MX6Q clock binding to DT schema format using json-schema. > > Signed-off-by: Anson Huang > --- > Changes since V2: > - Force 'interrupts' minItem/maxItem to 2. > --- >

Re: [PATCH V2 00/16] arm64/cpufeature: Introduce ID_PFR2, ID_DFR1, ID_MMFR5 and other changes

Hi Anshuman, On Wed, Apr 29, 2020 at 03:07:15PM +0530, Anshuman Khandual wrote: > On 04/14/2020 03:18 PM, Anshuman Khandual wrote: > > This series is primarily motivated from an adhoc list from Mark Rutland > > during our previous ID_ISAR6 discussion [1]. The current proposal also > >

Re: [PATCH RFC 3/6] KVM: x86: interrupt based APF page-ready event delivery

Hi, Vitaly, On Wed, Apr 29, 2020 at 11:36:31AM +0200, Vitaly Kuznetsov wrote: > + Type 1 page (page missing) events are currently always delivered as > + synthetic #PF exception. Type 2 (page ready) are either delivered > + by #PF exception (when bit 3 of MSR_KVM_ASYNC_PF_EN is clear)

Re: [PATCH V3 1/5] dt-bindings: clock: Convert i.MX6Q clock to json-schema

On Fri, Apr 17, 2020 at 08:41:27AM +0800, Anson Huang wrote: > Convert the i.MX6Q clock binding to DT schema format using json-schema. > > Signed-off-by: Anson Huang > --- > Changes since V2: > - Force 'interrupts' minItem/maxItem to 2. Not necessary. maxItems is sufficient. > --- >

Re: [PATCH net-next v2 2/7] net: bcmgenet: Fix WoL with password after deep sleep

On 4/29/20 1:02 PM, Doug Berger wrote: > Broadcom STB chips support a deep sleep mode where all register contents > are lost. Because we were stashing the MagicPacket password into some of > these registers a suspend into that deep sleep then a resumption would > not lead to being able to wake-up

Re: [PATCH net-next v2 1/7] net: bcmgenet: set Rx mode before starting netif

On 4/29/20 1:02 PM, Doug Berger wrote: > This commit explicitly calls the bcmgenet_set_rx_mode() function when > the network interface is started. This function is normally called by > ndo_set_rx_mode when the flags are changed, but apparently not when > the driver is suspended and resumed. > >

[PATCH v4 2/2] devicetree: bindings: phy: Document ipq806x dwc3 qcom phy

Document dwc3 qcom phy hs and ss phy bindings needed to correctly inizialize and use usb on ipq806x SoC. Signed-off-by: Ansuel Smith --- v4: * Add qcom to specific bindings v3: * Use explicit reg instead of regmap .../bindings/phy/qcom,ipq806x-usb-phy-hs.yaml | 58 +++

[PATCH v4 1/2] phy: qualcomm: add qcom ipq806x dwc usb phy driver

This has lost in the original push for the dwc3 qcom driver. This is needed for ipq806x SoC as without this the usb ports doesn't work at all. Signed-off-by: Andy Gross Signed-off-by: Ansuel Smith --- v4: * Add qcom to specific bindings v3: * Use reg instead of regmap phandle v2: * Renamed

Re: [PATCH v5 1/4] dt-bindings: Add Broadcom STB USB support

On Wed, Apr 29, 2020 at 04:08:23PM -0400, Al Cooper wrote: > Add DT bindings for Broadcom STB USB EHCI and XHCI drivers. > > NOTE: The OHCI driver is not included because it uses the generic > platform driver. > > Signed-off-by: Al Cooper > --- > .../bindings/usb/brcm,bcm7445-ehci.yaml

Re: [PATCH] arm64: kvm: fix gcc-10 shift warning

On Wed, Apr 29, 2020 at 08:56:20PM +0200, Arnd Bergmann wrote: > gcc-10 warns that the 32-bit zero cannot be shifted more than > 32 bits to the right: > > arch/arm64/kvm/../../../virt/kvm/arm/mmu.c: In function 'clear_hyp_p4d_entry': > arch/arm64/include/asm/pgtable.h:630:35: error: right shift

[RFC PATCH] virtio: virtio_pool can be static

Signed-off-by: kbuild test robot --- virtio_bounce.c |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/virtio/virtio_bounce.c b/drivers/virtio/virtio_bounce.c index 3de8e0eb71e48..5a68d48667c42 100644 --- a/drivers/virtio/virtio_bounce.c +++

Re: [PATCH 13/13] MIPS: ingenic: Drop obsolete code, merge the rest in setup.c

On Mon, Apr 13, 2020 at 05:26:33PM +0200, Paul Cercueil wrote: > Drop a bootload of 10-years-old dirty code, that is not used anymore, as > it has been replaced with clean code over the ages. > > Merge the very few bits left inside setup.c, so that everything is clean > and tidy now. > >

Re: [PATCH 09/13] MIPS: ingenic: DTS: Update JZ4770 support

On Mon, Apr 13, 2020 at 05:26:29PM +0200, Paul Cercueil wrote: > Add support for the RTC, AIC, CODEC, MMC 0/1/2, ADC, GPU, LCD, > USB OTG, USB PHY controllers. > > Signed-off-by: Paul Cercueil > --- > arch/mips/boot/dts/ingenic/jz4770.dtsi | 177 - > 1 file changed, 170

Re: [PATCH 12/13] MIPS: ingenic: GCW0: Update defconfig

On Mon, Apr 13, 2020 at 05:26:32PM +0200, Paul Cercueil wrote: > Enable support for the new hardware that was added in the devicetree. > > Signed-off-by: Paul Cercueil > --- > arch/mips/configs/gcw0_defconfig | 131 ++- > 1 file changed, 128 insertions(+), 3

Re: [PATCH 5/5] virtio: Add bounce DMA ops

us a note to help improve the system. BTW, we also suggest to use '--base' option to specify the base tree in git format-patch, please see https://stackoverflow.com/a/37406982] url: https://github.com/0day-ci/linux/commits/Srivatsa-Vaddagiri/virtio-on-Type-1-hypervisor/20200429-032334 base

Re: [PATCH 08/13] MIPS: ingenic: DTS: Add nodes for the watchdog/PWM/OST

On Mon, Apr 13, 2020 at 05:26:28PM +0200, Paul Cercueil wrote: > Add the TCU nodes to the JZ4780, JZ4770 and JZ4740 devicetree files. > > Signed-off-by: Paul Cercueil > --- > arch/mips/boot/dts/ingenic/jz4740.dtsi | 14 +++ > arch/mips/boot/dts/ingenic/jz4770.dtsi | 34

Re: [GIT PULL] Please pull proc and exec work for 5.7-rc1

On Wed, Apr 29, 2020 at 10:20 PM Bernd Edlinger wrote: > On 4/29/20 9:26 PM, Jann Horn wrote: > > On Wed, Apr 29, 2020 at 9:23 PM Bernd Edlinger > > wrote: > >> On 4/29/20 7:58 PM, Linus Torvalds wrote: > >>> On Tue, Apr 28, 2020 at 4:36 PM Jann Horn wrote: > > On Wed, Apr 29, 2020 at

Re: [PATCH 10/13] MIPS: ingenic: DTS: Update GCW0 support

On Mon, Apr 13, 2020 at 05:26:30PM +0200, Paul Cercueil wrote: > Add support for the face buttons, the ACT8600 PMUC, the LCD panel > with backlight, the rumble, internal/external SD readers, and other > things. > > Note that the otg-phy node was dropped in the process as it was neither > useful

Re: [PATCH 11/13] MIPS: ingenic: CI20: enable OST, PWM drivers in defconfig

On Mon, Apr 13, 2020 at 05:26:31PM +0200, Paul Cercueil wrote: > The OST driver provides a clocksource and sched_clock that are much more > accurate than the default ones. > > The PWM driver allows to use the PWM pins on the external header of the > board. > > Signed-off-by: Paul Cercueil > ---

Re: [PATCH 07/13] MIPS: ingenic: DTS: Respect cell count of common properties

On Mon, Apr 13, 2020 at 05:26:27PM +0200, Paul Cercueil wrote: > If N fields of X cells should be provided, then that's what the > devicetree should represent, instead of having one single field of > (N*X) cells. > > Signed-off-by: Paul Cercueil > --- > arch/mips/boot/dts/ingenic/jz4740.dtsi |

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