[PATCH next] gpiolib: check for parent device in devprop_gpiochip_set_names()

From: Bartosz Golaszewski It's possible for a GPIO chip to not have a parent device (whose properties we inspect for 'gpio-line-names'). In this case we should simply return from devprop_gpiochip_set_names(). Add an appropriate check for this use-case. Fixes: 7cba1a4d5e16 ("gpiolib: generalize

Re: [PATCH 10/16] wireless: intersil: convert tasklets to use new tasklet_setup() API

On Mon, 17 Aug 2020, Allen Pais wrote: > From: Allen Pais > > In preparation for unconditionally passing the > struct tasklet_struct pointer to all tasklet > callbacks, switch to using the new tasklet_setup() > and from_tasklet() to pass the tasklet pointer explicitly > and remove .data field.

[PATCH] blk-mq: add cond_resched() in __blk_mq_alloc_rq_maps()

We found it takes more time of blk_mq_alloc_rq_maps() in kernel space when testing nvme hot-plugging. The test and anlysis as below. Debug code, 1, blk_mq_alloc_rq_maps(): u64 start, end; depth = set->queue_depth; start = ktime_get_ns(); pr_err("[%d:%s

Re: [PATCH] memory: omap-gpmc: Fix compile test on SPARC

On Fri, Sep 11, 2020 at 04:32:51PM +0200, Krzysztof Kozlowski wrote: > SPARC comes without CONFIG_OF_ADDRESS thus compile testing fails on > linking: > > /usr/bin/sparc64-linux-gnu-ld: drivers/memory/omap-gpmc.o: in function > `gpmc_probe_generic_child': >

[PATCH 0/2] media: i2c: Add support for RDACM21 camera module

Hello, this series introduces support for the RDACM21 camera module, an automotive camera module based on GMSL technology. The camera module integrates a MAX9271 serializer, and OV10640 image sensor coupled with an OV490 ISP. The image sensor and the ISP are programmed loading the content of

Re: [PATCH V2 RESEND] perf stat: Fix the ratio comments of miss-events

Em Wed, Sep 16, 2020 at 06:48:51PM +0800, Qi Liu escreveu: > Perf stat displays miss ratio of L1-dcache, L1-icache, dTLB cache, > iTLB cache and LL-cache. Take L1-dcache for example, miss ratio is > caculated as "L1-dcache-load-misses/L1-dcache-loads". So > "of all L1-dcache hits" is unsuitable to

Re: [PATCH v5 2/2] misc: rtsx: Add power saving functions and fix driving parameter

On Tue, Sep 15, 2020 at 10:28:11AM -0500, Bjorn Helgaas wrote: > On Tue, Sep 15, 2020 at 08:24:50AM +, 吳昊澄 Ricky wrote: > > > -Original Message- > > > From: Bjorn Helgaas [mailto:helg...@kernel.org] > > > Sent: Friday, September 11, 2020 10:56 PM > > > To: 吳昊澄 Ricky > > > Cc:

Re: [PATCH v2 1/3] soundwire: qcom: clear BIT FIELDs before value set.

On 16-09-20, 09:36, Pierre-Louis Bossart wrote: > > > On 9/16/20 9:29 AM, Vinod Koul wrote: > > On 16-09-20, 08:18, Pierre-Louis Bossart wrote: > > > > > > > > According to usage (bitfields.h) of REG_FIELDS, > > > > > Modify is: > > > > > reg &= ~REG_FIELD_C; > > > > > reg |=

Re: [PATCH v2 5/6] ARM: dts: exynos: Align OPP table name with dt-schema

On Thu, Sep 03, 2020 at 09:14:37PM +0200, Krzysztof Kozlowski wrote: > Device tree nodes should have hyphens instead of underscores. This is > also expected by the bindings. > > Signed-off-by: Krzysztof Kozlowski > > --- > > Changes since v1: > 1. New patch > --- >

Re: [PATCH 16/26] perf tools: Synthesize modules with mmap3

Em Wed, Sep 16, 2020 at 10:20:18AM +0200, Jiri Olsa escreveu: > On Tue, Sep 15, 2020 at 01:17:44PM -0700, Ian Rogers wrote: > > SNIP > > > > > /* > > > >* kernel uses 0 for user space maps, see kernel/perf_event.c > > > >* __perf_event_mmap > > > > @@ -631,17 +629,30 @@ int

Re: [PATCH v3 08/16] irqchip/gic: Configure SGIs as standard interrupts

Hi Jon, +Linus, who is facing a similar issue. On 2020-09-16 15:16, Jon Hunter wrote: Hi Marc, On 14/09/2020 14:06, Marek Szyprowski wrote: Hi Marc, On 01.09.2020 16:43, Marc Zyngier wrote: Change the way we deal with GIC SGIs by turning them into proper IRQs, and calling into the arch

Re: [PATCH] pmem: export the symbols __copy_user_flushcache and __copy_from_user_flushcache

On Wed, Sep 16, 2020 at 10:24 AM Mikulas Patocka wrote: > > > > On Wed, 16 Sep 2020, Dan Williams wrote: > > > On Wed, Sep 16, 2020 at 3:57 AM Mikulas Patocka wrote: > > > > > > > > > > > > I'm submitting this patch that adds the required exports (so that we could > > > use

[PATCH] pmem: export the symbols __copy_user_flushcache and __copy_from_user_flushcache

On Tue, 15 Sep 2020, Mikulas Patocka wrote: > > > On Tue, 15 Sep 2020, Mikulas Patocka wrote: > > > > > - __copy_from_user_inatomic_nocache doesn't flush cache for leading and > > > > trailing bytes. > > > > > > You want copy_user_flushcache(). See how fs/dax.c arranges for > > >

[PATCH v2] doc: zh_CN: index files in arm64 subdirectory

Add arm64 subdirectory into the table of Contents for zh_CN, all translations residing on it would be indexed conveniently. Signed-off-by: Bailu Lin --- v2: -Fix patch description. --- Documentation/arm64/index.rst| 4 Documentation/translations/zh_CN/arm64/index.rst

Re: [RFC][PATCH 1/4] acpi: Use CPUIDLE_FLAG_TIMER_STOP

On Wed, Sep 16, 2020 at 6:01 PM Borislav Petkov wrote: > > On Wed, Sep 16, 2020 at 05:42:12PM +0200, pet...@infradead.org wrote: > > On Tue, Sep 15, 2020 at 06:26:52PM +0200, Rafael J. Wysocki wrote: > > > On Tue, Sep 15, 2020 at 12:44 PM Peter Zijlstra > > > wrote: > > > > > > > > Make

Re: [PATCH 2/2] serial: core: fix console port-lock regression

On Mon, Sep 14, 2020 at 11:09:16AM +0300, Tony Lindgren wrote: > * Andy Shevchenko [200910 09:27]: > > +Cc: Tony, let me add Tony to the discussion. > > > > On Thu, Sep 10, 2020 at 09:35:27AM +0200, Johan Hovold wrote: > > > And what about power management > > > which was the reason for wanting

Re: [RFC PATCH 05/35] KVM: SVM: Add initial support for SEV-ES GHCB access to KVM

On 9/15/20 11:28 AM, Sean Christopherson wrote: > On Tue, Sep 15, 2020 at 08:24:22AM -0500, Tom Lendacky wrote: >> On 9/14/20 3:58 PM, Sean Christopherson wrote: @@ -79,6 +88,9 @@ static inline void kvm_register_write(struct kvm_vcpu *vcpu, int reg, if (WARN_ON_ONCE((unsigned

[PATCH v3 07/11] kvm: arm64: Duplicate arm64_ssbd_callback_required for nVHE hyp

Hyp keeps track of which cores require SSBD callback by accessing a kernel-proper global variable. Create an nVHE symbol of the same name and copy the value from kernel proper to nVHE at KVM init time. Done in preparation for separating percpu memory owned by kernel proper and nVHE.

[PATCH v3 06/11] kvm: arm64: Add helpers for accessing nVHE hyp per-cpu vars

Defining a per-CPU variable in hyp/nvhe will result in its name being prefixed with __kvm_nvhe_. Add helpers for declaring these variables in kernel proper and accessing them with this_cpu_ptr and per_cpu_ptr. Signed-off-by: David Brazdil --- arch/arm64/include/asm/kvm_asm.h | 25

Re: [PATCH v3 0/5] HWpoison: further fixes and cleanups

On Wed, Sep 16, 2020 at 09:53:58AM -0400, Aristeu Rozanski wrote: > Hi Oscar, Thanks Aristeu, > > On Wed, Sep 16, 2020 at 09:27:02AM +0200, Oscar Salvador wrote: > > Could you please re-run the tests with the below patch applied, and > > attached then the logs here? > > here it is: > (removed

Re: [PATCH] ehci-hcd: Move include to keep CRC stable

On Wed, Sep 16, 2020 at 07:31:27PM +0200, Greg KH wrote: > On Wed, Sep 16, 2020 at 06:18:25PM +0100, Quentin Perret wrote: > > The CRC calculation done by genksyms is triggered when the parser hits > > EXPORT_SYMBOL*() macros. At this point, genksyms recursively expands the > > types of the

[PATCH v3 11/15] ARM: dts: aspeed: fix PCA95xx GPIO expander properties on Portwell

The PCA95xx GPIO expander requires GPIO controller properties to operate properly. Signed-off-by: Krzysztof Kozlowski Acked-by: Joel Stanley --- arch/arm/boot/dts/aspeed-bmc-portwell-neptune.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git

[PATCH] ehci-hcd: Move include to keep CRC stable

The CRC calculation done by genksyms is triggered when the parser hits EXPORT_SYMBOL*() macros. At this point, genksyms recursively expands the types of the function parameters, and uses that as the input for the CRC calculation. In the case of forward-declared structs, the type expands to

Re: [PATCH v2] remoteproc: qcom_q6v5: Assign mpss region to Q6 before MBA boot

Quoting Sibi Sankar (2020-09-16 07:52:52) > On secure devices which support warm reset, the MBA firmware requires > access to the modem region to clear them out. Hence provide Q6 access > to this region before MBA boot. This will be a nop during a modem SSR. > Does it need a Fixes: tag?

[RFC v2 2/8] drm/i915: Rename pwm_* backlight callbacks to ext_pwm_*

Since we're going to need to add a set of lower-level PWM backlight control hooks to be shared by normal backlight controls and HDR backlight controls in SDR mode, let's add a prefix to the external PWM backlight functions so that the difference between them and the high level PWM-only backlight

[RFC v2 6/8] drm/i915/dp: Enable Intel's HDR backlight interface (only SDR for now)

So-recently a bunch of laptops on the market have started using DPCD backlight controls instead of the traditional DDI backlight controls. Originally we thought we had this handled by adding VESA backlight control support to i915, but the story ended up being a lot more complicated then that.

[RFC v2 3/8] drm/i915: Keep track of pwm-related backlight hooks separately

Currently, every different type of backlight hook that i915 supports is pretty straight forward - you have a backlight, probably through PWM (but maybe DPCD), with a single set of platform-specific hooks that are used for controlling it. HDR backlights, in particular VESA and Intel's HDR

Re: [PATCH v6 0/2] PHY: Add new PHY attribute max_link_rate

On 16/09/20 6:13 PM, Vinod Koul wrote: > On 16-09-20, 15:18, Laurent Pinchart wrote: >> Hi Sekhar, >> >> On Wed, Sep 16, 2020 at 01:11:17PM +0530, Sekhar Nori wrote: >>> On 11/09/20 11:48 AM, Swapnil Jakhade wrote: This patch series adds a new PHY attribute max_link_rate. It also updates

[RFC v2 4/8] drm/i915/dp: Rename eDP VESA backlight interface functions

Since we're about to add support for a second type of backlight control interface over DP AUX (specifically, Intel's proprietary HDR backlight controls) let's rename all of the current backlight hooks we have for vesa to make it clear that they're specific to the VESA interface and not Intel's.

Re: [V9fs-developer] [PATCH RFC 0/4] 9p: fix open-unlink-f*syscall bug

On Mon, 14 Sep 2020 17:46:30 +0200 Greg Kurz wrote: > On Mon, 14 Sep 2020 17:19:20 +0200 > Christian Schoenebeck wrote: > > > On Montag, 14. September 2020 14:43:25 CEST Greg Kurz wrote: > > > > So yes, looks like this also requires changes to the 9pfs 'local' fs > > > > driver on QEMU side: >

[PATCH v3 04/15] arm64: dts: mediatek: align GPIO hog names with dtschema

The convention for node names is to use hyphens, not underscores. dtschema for pca95xx expects GPIO hogs to end with 'hog' prefix. Signed-off-by: Krzysztof Kozlowski --- .../boot/dts/mediatek/pumpkin-common.dtsi | 26 +-- 1 file changed, 13 insertions(+), 13 deletions(-)

[PATCH v3 02/15] dt-bindings: gpio: convert bindings for Maxim MAX732x family to dtschema

Convert the Maxim MAX732x family of GPIO expanders bindings to device tree schema by merging it with existing PCA95xx schema. These are quite similar so merging reduces duplication. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring --- Changes since v2: 1. Add Rob's review tag 2.

[PATCH v13 12/15] mtd: spi-nor: core: disable Octal DTR mode on suspend.

On resume, the init procedure will be run that will re-enable it. Signed-off-by: Pratyush Yadav --- drivers/mtd/spi-nor/core.c | 18 ++ 1 file changed, 18 insertions(+) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 853dfa02f0de..d5c92c9c7307 100644

Re: [PATCH 5.8 000/177] 5.8.10-rc1 review

On Wed, Sep 16, 2020 at 09:34:52AM -0600, Shuah Khan wrote: > On 9/16/20 9:26 AM, Greg Kroah-Hartman wrote: > > On Wed, Sep 16, 2020 at 08:26:48AM -0600, Shuah Khan wrote: > > > On 9/16/20 12:29 AM, Greg Kroah-Hartman wrote: > > > > On Tue, Sep 15, 2020 at 08:54:24PM -0600, Shuah Khan wrote: > > >

[PATCH v2 3/3] media: dt-bindings: media: renesas,drif: Add r8a77990 support

The r8a77990 (a.k.a. R-Car E3) device tree schema is compatible with R-Car H3 and M3-W schema. Document r8a77990 support within renesas,drif.yaml. Signed-off-by: Fabrizio Castro Reviewed-by: Geert Uytterhoeven Reviewed-by: Lad Prabhakar Reviewed-by: Laurent Pinchart --- v1->v2: * No change

[tip: x86/pti] x86/smp: Add a per-cpu view of SMT state

The following commit has been merged into the x86/pti branch of tip: Commit-ID: 0a260b1c5867863121b044afa8087d6b37e4fb7d Gitweb: https://git.kernel.org/tip/0a260b1c5867863121b044afa8087d6b37e4fb7d Author:Balbir Singh AuthorDate:Wed, 29 Jul 2020 10:10:59 +10:00 Committer:

[PATCH v3 09/15] ARM: dts: am335x: t335: align GPIO hog names with dtschema

The convention for node names is to use hyphens, not underscores. dtschema for pca95xx expects GPIO hogs to end with 'hog' prefix. Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/am335x-sbc-t335.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git

Re: [PATCH v37 02/24] x86/cpufeatures: x86/msr: Add Intel SGX Launch Control hardware bits

On Tue, Sep 15, 2020 at 03:39:29PM +0200, Borislav Petkov wrote: > On Tue, Sep 15, 2020 at 08:27:25AM -0500, Josh Poimboeuf wrote: > > I see the v37 missing patches now, but they're not threaded with the > > original thread. > > Probably because he bounced only the ones you didn't get,

[Patch 2/2] cpufreq: tegra194: Fix unlisted boot freq warning

Warning coming during boot because the boot freq set by bootloader gets filtered out due to big freq steps while creating freq_table. Fixing this by setting closest ndiv value from freq_table. Warning: cpufreq: cpufreq_online: CPU0: Running at unlisted freq cpufreq: cpufreq_online: CPU0:

[Patch 1/2] cpufreq: tegra194: get consistent cpuinfo_cur_freq

Frequency returned by 'cpuinfo_cur_freq' using counters is not fixed and keeps changing slightly. This change returns a consistent value from freq_table. If the reconstructed frequency has acceptable delta from the last written value, then return the frequency corresponding to the last written

[PATCH 2/3] eeprom: at25: set type id as EEPROM

Set type as NVMEM_TYPE_EEPROM to expose this info via sysfs: $ cat /sys/bus/nvmem/devices/{DEVICE}/type EEPROM Signed-off-by: Vadym Kochan --- drivers/misc/eeprom/at25.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/misc/eeprom/at25.c b/drivers/misc/eeprom/at25.c index

Re: [PATCH 2/2] ARM: s3c24xx: fix Wunused-variable warning on !MMU

On Thu, Sep 10, 2020 at 05:41:50PM +0200, Krzysztof Kozlowski wrote: > If S3C24xx machine code is build without CONFIG_MMU, the iotable() > macros do nothing so annotate structures to get rid of warnings: > > arch/arm/mach-s3c24xx/common.c:140:24: warning: ‘s3c_iodesc’ defined but > not used

Re: [PATCH -next] s390/ap: remove unnecessary spin_lock_init()

On Wed, Sep 16, 2020 at 02:21:30PM +0800, Qinglang Miao wrote: > The spinlock ap_poll_timer_lock is initialized statically. It is > unnecessary to initialize by spin_lock_init(). > > Signed-off-by: Qinglang Miao > --- > drivers/s390/crypto/ap_bus.c | 1 - > 1 file changed, 1 deletion(-)

[PATCH v7 3/5] irqchip/irq-pruss-intc: Add logic for handling reserved interrupts

From: Suman Anna The PRUSS INTC has a fixed number of output interrupt lines that are connected to a number of processors or other PRUSS instances or other devices (like DMA) on the SoC. The output interrupt lines 2 through 9 are usually connected to the main Arm host processor and are referred

[PATCH v7 5/5] irqchip/irq-pruss-intc: Add support for ICSSG INTC on K3 SoCs

From: Suman Anna The K3 AM65x and J721E SoCs have the next generation of the PRU-ICSS IP, commonly called ICSSG. The PRUSS INTC present within the ICSSG supports more System Events (160 vs 64), more Interrupt Channels and Host Interrupts (20 vs 10) compared to the previous generation PRUSS INTC

Re: [PATCH v2] arm64: bpf: Fix branch offset in JIT

Hi, Ilias! > On Tue, 15 Sep 2020 22:23:11 +0300, Ilias Apalodimas wrote: > Hi Will, > On Tue, Sep 15, 2020 at 03:17:08PM +0100, Will Deacon wrote: >> On Tue, Sep 15, 2020 at 04:53:44PM +0300, Ilias Apalodimas wrote: >> > On Tue, Sep 15, 2020 at 02:11:03PM +0100, Will Deacon wrote: >>

[tip: x86/irq] PCI_vmd_Mark_VMD_irqdomain_with_DOMAIN_BUS_VMD_MSI

The following commit has been merged into the x86/irq branch of tip: Commit-ID: d7f954e54079b4bf6088956d59f43768ec71269a Gitweb: https://git.kernel.org/tip/d7f954e54079b4bf6088956d59f43768ec71269a Author:Thomas Gleixner AuthorDate:Wed, 26 Aug 2020 13:16:52 +02:00

Re: [PATCH RFC 0/3] scsi: mpt: Refactor and port to dma_* interface

On Tue, Sep 15, 2020 at 10:12:06PM -0400, Martin K. Petersen wrote: > > Alex, > > > Any feedback would be greatly appreciated! > > Have you tested your changes? No, as I'm afraid I don't have the hardware. For patch #1 though, I'm not sure that's such an issue, as the refactoring was really

Re: Changing vma->vm_file in dma_buf_mmap()

On Wed, Sep 16, 2020 at 11:53:59AM +0200, Daniel Vetter wrote: > But within the driver, we generally need thousands of these, and that > tends to bring fd exhaustion problems with it. That's why all the private > buffer objects which aren't shared with other process or other drivers are > handles

Re: [PATCH] driver/pci: reduce the single block time in pci_read_config

On Sun, Sep 13, 2020 at 12:27:09PM +0800, Jiang Biao wrote: > On Thu, 10 Sep 2020 at 09:59, Bjorn Helgaas wrote: > > On Thu, Sep 10, 2020 at 09:54:02AM +0800, Jiang Biao wrote: > > > On Thu, 10 Sep 2020 at 09:25, Bjorn Helgaas wrote: > > > > On Mon, Aug 24, 2020 at 01:20:25PM +0800, Jiang Biao

Re: [PATCH v5 0/3] arm: dts: add and modify device node in NPCM7xx device tree

Hi Tomer, On Wed, 16 Sep 2020 at 12:56, Tomer Maimon wrote: > > This patch set adds and modify device tree nodes in the NPCM7xx > Baseboard Management Controller (BMC) device tree. Thanks Tomer. I smoke tested these by booting on the npcm730 qemu machine. Are you able to submit the gsj device

[PATCH v13 03/15] mtd: spi-nor: core: add spi_nor_controller_ops_erase helper

RE: [PATCH 1/3] firmware: xilinx: Add validation check for IOCTL

Hi Greg, > -Original Message- > From: Greg KH > Sent: Wednesday, September 16, 2020 4:34 AM > To: Amit Sunil Dhamne > Cc: ard.biesheu...@linaro.org; mi...@kernel.org; > m...@codeblueprint.co.uk; sudeep.ho...@arm.com; hkallwe...@gmail.com; > keesc...@chromium.org;

[PATCH net-next v9 4/6] net: marvell: prestera: Add ethtool interface support

The ethtool API provides support for the configuration of the following features: speed and duplex, auto-negotiation, MDI-x, forward error correction, port media type. The API also provides information about the port status, hardware and software statistic. The following limitation exists: -

Re: [RFC PATCH 2/2] mm/damon/debugfs: Support multiple contexts

On Tue, Sep 15, 2020 at 11:03 AM SeongJae Park wrote: > > From: SeongJae Park > > DAMON allows the programming interface users to run monitoring with > multiple contexts. This could be useful in some cases. For example, if > someone want to do highly accurate monitoring and lots of CPUs are >

[PATCH] erofs: remove unneeded parameter

From: Chao Yu In below call path, no page will be cached into @pagepool list or grabbed from @pagepool list: - z_erofs_readpage - z_erofs_do_read_page - preload_compressed_pages - erofs_allocpage Let's get rid of this unneeded parameter. Signed-off-by: Chao Yu --- fs/erofs/utils.c | 2

Re: [PATCH v6 0/2] PHY: Add new PHY attribute max_link_rate

Hi Sekhar, On 16-09-20, 13:11, Sekhar Nori wrote: > Hi Vinod, > > On 11/09/20 11:48 AM, Swapnil Jakhade wrote: > > This patch series adds a new PHY attribute max_link_rate. > > It also updates Cadence Torrent PHY driver to set attributes bus_width, > > max_link_rate and mode for DisplayPort. > >

Re: [PATCH -next] perf metric: Remove duplicate include

Em Tue, Sep 15, 2020 at 11:51:22PM +0900, Namhyung Kim escreveu: > Hello, > > On Tue, Sep 15, 2020 at 5:16 PM YueHaibing wrote: > > > > Remove duplicate header which is included twice. > > > > Signed-off-by: YueHaibing > > Acked-by: Namhyung Kim Thanks, applied. - Arnaldo > Thanks >

Re: [PATCH v2 1/3] soundwire: qcom: clear BIT FIELDs before value set.

Hi Srini, On 16-09-20, 10:21, Srinivas Kandagatla wrote: > According to usage (bitfields.h) of REG_FIELDS, > Modify is: > reg &= ~REG_FIELD_C; > reg |= FIELD_PREP(REG_FIELD_C, c); > > Patch ("soundwire: qcom : use FIELD_{GET|PREP}") seems to have > accidentally removed clearing bit field

[PATCH v13 00/15] mtd: spi-nor: add xSPI Octal DTR support

Hi, This series adds support for Octal DTR flashes in the SPI NOR framework, and then adds hooks for the Cypress Semper and Micron Xcella flashes to allow running them in Octal DTR mode. This series assumes that the flash is handed to the kernel in Legacy SPI mode. Tested on TI J721E EVM with

Re: [PATCH v3 2/2] ARM: support PHYS_OFFSET minimum aligned at 64KiB boundary

(+ Arnd, Nico) On Wed, 16 Sep 2020 at 05:51, Zhen Lei wrote: > > Currently, only support the kernels where the base of physical memory is > at a 16MiB boundary. Because the add/sub instructions only contains 8bits > unrotated value. But we can use one more "add/sub" instructions to handle > bits

Re: [PATCH] dasd: remove the unused dasd_enable_device export

Am 03.09.20 um 10:30 schrieb Christoph Hellwig: > Signed-off-by: Christoph Hellwig Acked-by:Stefan Haberland > --- > drivers/s390/block/dasd.c | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/drivers/s390/block/dasd.c b/drivers/s390/block/dasd.c > index eb17fea8075c6f..6ab992b3eed004

[PATCH net-next v9 0/6] net: marvell: prestera: Add Switchdev driver for Prestera family ASIC device 98DX3255 (AC3x)

Marvell Prestera 98DX3255 integrates up to 24 ports of 1GbE with 8 ports of 10GbE uplinks or 2 ports of 40Gbps stacking for a largely wireless SMB deployment. Prestera Switchdev is a firmware based driver that operates via PCI bus. The current implementation supports only boards designed for the

[PATCH net-next v9 1/6] net: marvell: prestera: Add driver for Prestera family ASIC devices

Marvell Prestera 98DX326x integrates up to 24 ports of 1GbE with 8 ports of 10GbE uplinks or 2 ports of 40Gbps stacking for a largely wireless SMB deployment. The current implementation supports only boards designed for the Marvell Switchdev solution and requires special firmware. The core

Re: [PATCH v3 08/16] irqchip/gic: Configure SGIs as standard interrupts

Hi Marc, On 14/09/2020 14:06, Marek Szyprowski wrote: > Hi Marc, > > On 01.09.2020 16:43, Marc Zyngier wrote: >> Change the way we deal with GIC SGIs by turning them into proper >> IRQs, and calling into the arch code to register the interrupt range >> instead of a callback. >> >> Reviewed-by:

Re: [PATCH v3 08/16] irqchip/gic: Configure SGIs as standard interrupts

On 16/09/2020 16:10, Marc Zyngier wrote: > Hi Jon, > > +Linus, who is facing a similar issue. > > On 2020-09-16 15:16, Jon Hunter wrote: >> Hi Marc, >> >> On 14/09/2020 14:06, Marek Szyprowski wrote: >>> Hi Marc, >>> >>> On 01.09.2020 16:43, Marc Zyngier wrote: Change the way we deal

[PATCH v3 06/15] arm64: dts: ti: align GPIO hog names with dtschema

The convention for node names is to use hyphens, not underscores. dtschema for pca95xx expects GPIO hogs to end with 'hog' prefix. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git

Re: [RFC PATCH] mm/page_alloc.c: micro-optimization reduce oom critical section size

Hello, Thank you for your comments. I will modify the patch where necessary and resend v2, but first I will make 100% sure about the lack of synchronization problem, that might potentially be there as you mentioned in previous mail , and try to check some numbers for my support. Sincerely

[PATCH 4/6] clk: mmp: pxa1928: drop unused 'clk' variable

'clk' is assigned but never read: drivers/clk/mmp/clk-of-pxa1928.c: In function ‘pxa1928_pll_init’: drivers/clk/mmp/clk-of-pxa1928.c:71:14: warning: variable ‘clk’ set but not used [-Wunused-but-set-variable] Signed-off-by: Krzysztof Kozlowski --- drivers/clk/mmp/clk-of-pxa1928.c | 3 +--

Re: [PATCH v2 0/2] Add DT to get PCIe working in J721E SoC

[PATCH 6/6] clk: rockchip: rk3308: drop unused mux_timer_src_p

The parent names 'mux_timer_src_p' is not used: In file included from drivers/clk/rockchip/clk-rk3308.c:13:0: drivers/clk/rockchip/clk-rk3308.c:136:7: warning: ‘mux_timer_src_p’ defined but not used [-Wunused-const-variable=] Signed-off-by: Krzysztof Kozlowski ---

[PATCH 5/6] clk: si5341: drop unused 'err' variable

'err' is assigned but never read: /drivers/clk/clk-si5341.c: In function ‘si5341_output_get_parent’: drivers/clk/clk-si5341.c:886:6: warning: variable ‘err’ set but not used [-Wunused-but-set-variable] Signed-off-by: Krzysztof Kozlowski --- drivers/clk/clk-si5341.c | 4 +--- 1 file

Re: [PATCH RFC v1 06/18] x86/hyperv: allocate output arg pages if required

Wei Liu writes: > On Tue, Sep 15, 2020 at 12:43:18PM +, Wei Liu wrote: >> On Tue, Sep 15, 2020 at 12:16:58PM +0200, Vitaly Kuznetsov wrote: >> > Wei Liu writes: >> > >> > > When Linux runs as the root partition, it will need to make hypercalls >> > > which return data from the hypervisor.

Re: [v2,2/3] PCI: mediatek: Add new generation controller support

On Mon, 2020-09-14 at 08:32 -0600, Rob Herring wrote: > On Mon, Sep 14, 2020 at 5:07 AM Jianjun Wang > wrote: > > > > On Fri, 2020-09-11 at 16:44 -0600, Rob Herring wrote: > > > On Thu, Sep 10, 2020 at 11:45:35AM +0800, Jianjun Wang wrote: > > > > MediaTek's PCIe host controller has three

Re: [PATCH] bitfield.h: annotate type_replace_bits functions with __must_check

On Wed, Sep 16, 2020 at 04:03:33PM +0100, Srinivas Kandagatla wrote: > usage of apis like u32_replace_bits() without actually catching the return > value could hide problems without any warning! > > Found this with recent usage of this api in SoundWire! > Having __must_check annotation would

Re: [PATCH v2 1/2] vfs: block chmod of symlinks

On Wed, Sep 16, 2020 at 07:25:53AM +0100, Christoph Hellwig wrote: > On Tue, Sep 15, 2020 at 08:22:54PM -0400, Rich Felker wrote: > > It was discovered while implementing userspace emulation of fchmodat > > AT_SYMLINK_NOFOLLOW (using O_PATH and procfs magic symlinks; otherwise > > it's not

[tip: x86/pti] Documentation: Add L1D flushing Documentation

The following commit has been merged into the x86/pti branch of tip: Commit-ID: 767d46ab566dd489733666efe48732d523c8c332 Gitweb: https://git.kernel.org/tip/767d46ab566dd489733666efe48732d523c8c332 Author:Balbir Singh AuthorDate:Wed, 29 Jul 2020 10:11:03 +10:00 Committer:

Re: [PATCH v2] software_node: Add support for fwnode_graph*() family of functions

Hi Dan, On 16/09/2020 14:22, Dan Scally wrote: > Hi Sakari - thanks for the comments > > On 16/09/2020 10:17, Sakari Ailus wrote: >> Moi Daniel and Heikki, >> >> On Wed, Sep 16, 2020 at 12:28:27AM +0100, Daniel Scally wrote: >>> From: Heikki Krogerus >>> >>> This implements the remaining

[PATCH v3 00/15] ARM: dts: / gpio: Add dtschema for NXP PCA953x and correct dts

Hi, Changes since v2: 1. Add Rob's review, 2. Minor fixup in patch #1, 3. Add acks to 11 and 13. Changes since v1: 1. Patch 1: Use additionalProperties, Add wakeup-source, Add hogs, Extend example with hogs. 2. New patches: 3, 4, 5, 6, 7, 9, 10, 12, 14 and 15. The patches could be picked up

[PATCH] [PATCH] ARM64: Setup DMA32 zone size by bootargs

this patch allowing the DMA32 zone be configurable in ARM64. For some devices, the main memory split into 2 part due to the memory architecture, the efficient and less inefficient part. One of the use case is fine-tune the dma32 size to contain all the efficient part of memory block on this kind

Re: [RFC] autonuma: Migrate on fault among multiple bound nodes

On Wed, 2020-09-16 at 08:59 +0800, Huang Ying wrote: > static int apply_policy_zone(struct mempolicy *policy, enum zone_type zone) > @@ -2474,11 +2481,13 @@ int mpol_misplaced(struct page *page, struct > vm_area_struct *vma, unsigned long > int thisnid = cpu_to_node(thiscpu); > int

[PATCH v2] dmaengine: ti: k3-udma-glue: fix channel enable functions

Re: [PATCH v7] cpufreq: mediatek-hw: Add support for Mediatek cpufreq HW driver

Hi, Rob sir: Sorry to bother you, may I have your review comment for the binding part? Appreciated. On Thu, 2020-09-10 at 11:04 +0530, Viresh Kumar wrote: > On 10-09-20, 13:30, Hector Yuan wrote: > > On Thu, 2020-09-10 at 10:33 +0530, Viresh Kumar wrote: > > > On 10-09-20, 12:31, Hector Yuan

[PATCH v2] remoteproc: Fixup coredump debugfs disable request

Fix the discrepancy observed between accepted input and read back value while disabling remoteproc coredump through the coredump debugfs entry. Fixes: 3afdc59e4390 ("remoteproc: Add coredump debugfs entry") Cc: sta...@vger.kernel.org Signed-off-by: Sibi Sankar --- V2: * Fixup commit message

[PATCH v13 01/15] mtd: spi-nor: core: use EOPNOTSUPP instead of ENOTSUPP

Re: [PATCH v3 08/16] irqchip/gic: Configure SGIs as standard interrupts

On 2020-09-16 16:46, Jon Hunter wrote: On 16/09/2020 16:10, Marc Zyngier wrote: Hi Jon, +Linus, who is facing a similar issue. On 2020-09-16 15:16, Jon Hunter wrote: Hi Marc, On 14/09/2020 14:06, Marek Szyprowski wrote: Hi Marc, On 01.09.2020 16:43, Marc Zyngier wrote: Change the way we

Re: [PATCH RFC v1 06/18] x86/hyperv: allocate output arg pages if required

On Tue, Sep 15, 2020 at 12:43:18PM +, Wei Liu wrote: > On Tue, Sep 15, 2020 at 12:16:58PM +0200, Vitaly Kuznetsov wrote: > > Wei Liu writes: > > > > > When Linux runs as the root partition, it will need to make hypercalls > > > which return data from the hypervisor. > > > > > > Allocate

Re: [PATCH v2 0/7] PHY: Prepare Cadence Torrent PHY driver to support multilink configurations

Hi Swapnil, On 08-09-20, 13:57, Swapnil Kashinath Jakhade wrote: > > On 27-08-20, 15:28, Swapnil Jakhade wrote: > > > Cadence Torrent PHY is a multiprotocol PHY supporting different > > > multilink PHY configurations including DisplayPort, PCIe, USB, SGMII, > > QSGMII etc. > > > Existing Torrent

[PATCH v3 1/3] soundwire: qcom: clear BIT FIELDs before value set.

According to usage (bitfields.h) of REG_FIELDS, Modify is: reg &= ~REG_FIELD_C; reg |= FIELD_PREP(REG_FIELD_C, c); Patch ("soundwire: qcom : use FIELD_{GET|PREP}") seems to have accidentally removed clearing bit field while modifying the register. Fix this by using u32_replace_bits() to

[PATCH 0/3] amd : iommu : Initial IOMMU support for SNP

Introducing support for AMD Secure Nested Paging (SNP) with IOMMU, which mainly affects the use of IOMMU Exclusion Base and Range Limit registers. Note that these registers are no longer used by Linux IOMMU driver. Patch 2 and 3 are SNP-specific, and discuss detail of the implementation. In order

[PATCH v3 0/3] soundwire: qcom: fix IP version v1.5.1 support

While testing Qualcomm soundwire controller version 1.5.1, found two issue, Firstly the frame shape information configured vs the bus parameters are out of sync. secondly some ports on this ip version require block packing mode support. With this patchset I was able to test 2 WSA speakers! Also

Re: [PATCH] bitfield.h: annotate type_replace_bits functions with __must_check

On 16/09/2020 16:20, Greg KH wrote: On Wed, Sep 16, 2020 at 04:03:33PM +0100, Srinivas Kandagatla wrote: usage of apis like u32_replace_bits() without actually catching the return value could hide problems without any warning! Found this with recent usage of this api in SoundWire! Having

Re: [PATCH] scripts/setlocalversion: make git describe output more reliable

On Fri, Sep 11, 2020 at 5:28 PM Rasmus Villemoes wrote: > > On 10/09/2020 21.05, Brian Norris wrote: > > On Thu, Sep 10, 2020 at 7:35 AM Masahiro Yamada > > wrote: > >> On Thu, Sep 10, 2020 at 8:57 PM Rasmus Villemoes > >> wrote: > >>> So in order to avoid `uname -a` output relying on such

Re: [GIT PULL] dt-bindings: gpio: fsl-imx-gpio: Cleanup for v5.10

On Sat, 12 Sep 2020 at 11:40, Linus Walleij wrote: > > On Fri, Sep 4, 2020 at 5:11 PM Krzysztof Kozlowski wrote: > > > These were on the list for some time. They got review from Rob so I guess > > they > > are good to go via subsystem tree. > > Pulled in to my devel branch, thanks! > >

[tip: x86/irq] PCI/MSI: Rework pci_msi_domain_calc_hwirq()

The following commit has been merged into the x86/irq branch of tip: Commit-ID: dfb9eb7cf6cd0c0b0f2afcc47b0a297b097d Gitweb: https://git.kernel.org/tip/dfb9eb7cf6cd0c0b0f2afcc47b0a297b097d Author:Thomas Gleixner AuthorDate:Wed, 26 Aug 2020 13:16:45 +02:00

[tip: x86/irq] x86/xen: Wrap XEN MSI management into irqdomain

The following commit has been merged into the x86/irq branch of tip: Commit-ID: 2e4386eba0c0830becc5c88848b765950970533d Gitweb: https://git.kernel.org/tip/2e4386eba0c0830becc5c88848b765950970533d Author:Thomas Gleixner AuthorDate:Wed, 26 Aug 2020 13:16:58 +02:00

[tip: x86/irq] genirq/chip: Use the first chip in irq_chip_compose_msi_msg()

The following commit has been merged into the x86/irq branch of tip: Commit-ID: 13b90cadfc294718dd5a89e1fcf103477b01eb50 Gitweb: https://git.kernel.org/tip/13b90cadfc294718dd5a89e1fcf103477b01eb50 Author:Thomas Gleixner AuthorDate:Wed, 26 Aug 2020 13:16:32 +02:00

[PATCHv2] perf: Fix race in perf_mmap_close function

There's a possible race in perf_mmap_close when checking ring buffer's mmap_count refcount value. The problem is that the mmap_count check is not atomic because we call atomic_dec and atomic_read separately. perf_mmap_close: ... atomic_dec(>mmap_count); ... if

[tip: x86/irq] x86/irq: Consolidate DMAR irq allocation

The following commit has been merged into the x86/irq branch of tip: Commit-ID: 55e039157281f9d8ee7d595c2529a3fd4e790b52 Gitweb: https://git.kernel.org/tip/55e039157281f9d8ee7d595c2529a3fd4e790b52 Author:Thomas Gleixner AuthorDate:Wed, 26 Aug 2020 13:16:43 +02:00

Re: [PATCH v9] binder: transaction latency tracking for user build

On Tue, Sep 08, 2020 at 10:06:45PM +0800, Frankie Chang wrote: > Change from v9: > - rename timestamp to ts in binder_internal.h for conciseness. > - change 'struct timeval' to 'struct timespec64' in binder_internal.h. These just blew up in the 0-day testing, again, so I'm dropping them from

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