Add some basic sanity-check tests for the fat_checksum() function and
the fat_time_unix2fat() and fat_time_fat2unix() functions. These unit
tests verify these functions return correct output for a number of test
inputs.
These tests were inspored by -- and serve a similar purpose to -- the
On Mon, Oct 19, 2020 at 03:32:57PM -0700, Abhishek Pandit-Subedi wrote:
> Add a check to make sure the kobj is created and in sysfs before sending
> a change event notification. Otherwise, udev rules that depend on the
> change notification may find that the path that changed doesn't actually
>
> Hi,
>
> On Sun, Oct 18, 2020 at 03:28:10PM +0800, Dinghao Liu wrote:
> > When clk_hw_register_fixed_rate_with_accuracy() fails,
> > clk_data should be freed. It's the same for the subsequent
> > two error paths, but we should also unregister the already
> > registered clocks in them.
> >
> >
On 20-10-20, 10:35, Viresh Kumar wrote:
> On 19-10-20, 15:10, Sudeep Holla wrote:
> > On Mon, Oct 19, 2020 at 04:05:35PM +0530, Viresh Kumar wrote:
> > > On 19-10-20, 11:12, Sudeep Holla wrote:
> > > > Yes it has clocks property but used by SCMI(for CPUFreq/DevFreq) and not
> > > > by any clock
Hello Shakeel,
Shakeel Butt writes:
>>
>> V3: Handle common case where use_hierarchy=1 and update description.
>>
>> mm/memcontrol.c | 7 +--
>> 1 file changed, 5 insertions(+), 2 deletions(-)
>>
>> diff --git a/mm/memcontrol.c b/mm/memcontrol.c
>> index 6877c765b8d0..34b8c4a66853 100644
>>
dev_err_probe() can reduce code size, uniform error handling and record the
defer probe reason etc., use it to simplify the code.
Signed-off-by: Anson Huang
Acked-by: Uwe Kleine-König
---
changes since V1:
- remove redundant return value print.
---
drivers/pwm/pwm-imx27.c | 25
dev_err_probe() can reduce code size, uniform error handling and record the
defer probe reason etc., use it to simplify the code.
Signed-off-by: Anson Huang
Acked-by: Uwe Kleine-König
---
changes since V1:
- remove redundant return value print.
---
drivers/pwm/pwm-imx-tpm.c | 10
dev_err_probe() can reduce code size, uniform error handling and record the
defer probe reason etc., use it to simplify the code.
Signed-off-by: Anson Huang
Acked-by: Uwe Kleine-König
---
changes since V1:
- remove redundant return value print.
---
drivers/pwm/pwm-imx1.c | 21
Hello,
On Tue, Oct 20, 2020 at 12:42 AM John Garry wrote:
>
> There is much duplication in the error handling for directory traversing
> for processing JSONs.
>
> Factor out the common code to tidy a bit.
>
> Signed-off-by: John Garry
> ---
[SNIP]
> -empty_map:
>
On Tue, Oct 20, 2020 at 12:51 AM Kostya Serebryany wrote:
>
> Hi,
> I would like to hear opinions from others in CC on these choices:
> * Production use of In-kernel MTE should be based on stripped-down
> KASAN, or implemented independently?
Andrey, what are the fundamental consequences of
Signed-off-by: Sameer Pujar
Cc: Philipp Zabel
---
Documentation/devicetree/bindings/graph.txt | 128
Documentation/devicetree/bindings/graph.yaml | 170 +++
2 files changed, 170 insertions(+), 128 deletions(-)
delete mode 100644
On Fri, 9 Oct 2020 at 05:20, Joel Stanley wrote:
>
> On Thu, 1 Oct 2020 at 04:30, Andrew Jeffery wrote:
> >
> > Setting both CONFIG_KPROBES=y and CONFIG_FORTIFY_SOURCE=y on ARM leads
> > to a panic in memcpy() when injecting a kprobe despite the fixes found
> > in commit e46daee53bb5 ("ARM:
On 15-10-20, 10:01, Viresh Kumar wrote:
> On 15-10-20, 02:35, Aisheng Dong wrote:
> > Hi Viresh
> >
> > Thanks for the quick fix.
> >
> > > From: Viresh Kumar
> > > Sent: Wednesday, October 14, 2020 12:26 PM
> > >
> > > The patch missed returning 0 early in case of success and hence the
> > >
On Mon, Oct 19, 2020 at 2:23 PM Marco Elver wrote:
>
> On Wed, 14 Oct 2020 at 22:44, Andrey Konovalov wrote:
> [...]
> > A question to KASAN maintainers: what would be the best way to support the
> > "off" mode? I see two potential approaches: add a check into each kasan
> > callback (easier to
On 19-10-20, 15:10, Sudeep Holla wrote:
> On Mon, Oct 19, 2020 at 04:05:35PM +0530, Viresh Kumar wrote:
> > On 19-10-20, 11:12, Sudeep Holla wrote:
> > > Yes it has clocks property but used by SCMI(for CPUFreq/DevFreq) and not
> > > by any clock provider driver. E.g. the issue you will see if
Hi Daniel,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on 7cf726a59435301046250c42131554d9ccc566b8]
url:
https://github.com/0day-ci/linux/commits/Daniel-Latypov/wireguard-convert-selftest-counter-ratelimiter-c-to-KUnit/20201020-042650
base:
Hi,
> From: Serge Semin, Sent: Wednesday, October 14, 2020 7:14 PM
>
> With minor peculiarities (like uploading some vendor-specific firmware)
> these are just Generic xHCI controllers fully compatible with its
> properties. Make sure the Renesas USB xHCI DT nodes are also validated
> against
On Sun 18 Oct 15:12 CDT 2020, Andy Shevchenko wrote:
> On Sat, Oct 17, 2020 at 8:41 AM Bjorn Andersson
> wrote:
> >
> > The Light Pulse Generator (LPG) is a PWM-block found in a wide range of
> > PMICs from Qualcomm. It can operate on fixed parameters or based on a
> > lookup-table, altering the
Hi,
On Mon, 2020-10-19 at 14:54 -0500, Rob Herring wrote:
> On Sat, Oct 17, 2020 at 12:10:33AM +0800, Hsin-Hsiung Wang wrote:
> > This adds documentation for the SPMI controller found on Mediatek SoCs.
> >
> > Signed-off-by: Hsin-Hsiung Wang
> > ---
>
> If you have a dependency such as the
On Mon, 19 Oct 2020 at 08:57, Dylan Hung wrote:
>
> The interrupt handler may set the flag to reset the mac in the future,
> but that flag is not cleared once the reset has occured.
>
> Fixes: 10cbd6407609 ("ftgmac100: Rework NAPI & interrupts handling")
> Signed-off-by: Dylan Hung
>
Preempt_set and preempt_get are new functions of ethtool ops, which
is to configure frame preemption according to 802.1qbu and 802.3br.
Add them on slave ports of DSA framework, so that DSA devices can
support to configure frame preemption by using ethtool.
Signed-off-by: Xiaoliang Yang
---
After using ethtool to enable and configure frame preemption on
vsc9959, use tc-taprio preempt set to mark the preempt queues and
express queueus.
Signed-off-by: Xiaoliang Yang
---
drivers/net/dsa/ocelot/felix_vsc9959.c | 16
1 file changed, 16 insertions(+)
diff --git
On Mon, 19 Oct 2020 at 23:20, Benjamin Herrenschmidt
wrote:
>
> On Mon, 2020-10-19 at 16:57 +0800, Dylan Hung wrote:
> > These rules must be followed when accessing the TX descriptor:
> >
> > 1. A TX descriptor is "cleanable" only when its value is non-zero
> > and the owner bit is set to
VSC9959 support preempt queues according to 802.1qbu and 802.3br. This
patch add ethtool preempt set to configure preemption.
In user space, it can be set like this:
ethtool --set-frame-preemption swp0 enable min-frag-size 0
Signed-off-by: Xiaoliang Yang
---
VSC9959 supports frame preemption according to 802.1qbu and 802.3br.
This patch series use ethtool to enable and configure frame preemption,
then use tc-taprio preempt set to mark the preempt queues and express
queueus.
This series depends on series: "ethtool: Add support for frame preemption"
Hi,
On Mon, 2020-10-19 at 14:52 -0500, Rob Herring wrote:
> On Sat, 17 Oct 2020 00:10:33 +0800, Hsin-Hsiung Wang wrote:
> > This adds documentation for the SPMI controller found on Mediatek SoCs.
> >
> > Signed-off-by: Hsin-Hsiung Wang
> > ---
> > .../bindings/spmi/mtk,spmi-mtk-pmif.yaml
The COPY_MC_TEST facility has served its purpose for validating the
early termination conditions of the copy_mc_fragile() implementation.
Remove it and the EXPORT_SYMBOL_GPL of copy_mc_fragile().
Reported-by: Borislav Petkov
Cc: Thomas Gleixner
Cc: Ingo Molnar
Cc: x...@kernel.org
Cc: "H. Peter
VI I2C don't have DMA support and uses PIO mode all the time.
Current driver uses writesl() to fill TX FIFO based on available
empty slots and with this seeing strange silent hang during any I2C
register access after filling TX FIFO with 8 words.
Using writel() followed by i2c_readl() in a loop
On Tue, Oct 20, 2020 at 1:43 AM Alexander Kochetkov wrote:
>
>
>
> > 19 окт. 2020 г., в 11:21, Maxime Ripard написал(а):
> >
> > Hi!
> >
> > On Thu, Oct 15, 2020 at 06:47:40PM +0300, Alexander Kochetkov wrote:
> >> DMA-based transfer will be enabled if data length is larger than FIFO size
> >>
Implement serdes_power, serdes_get_lane and serdes_pcs_get_state ops for
the MV88E6123 so that the ports without a built-in PHY supported as
serdes ports and directly connected to other network interfaces or to
SFPs. Also implement serdes_get_regs_len and serdes_get_regs to aid
future debugging.
Implement serdes_power, serdes_get_lane and serdes_pcs_get_state ops for
the MV88E6097/6095/6185 so that ports 8 & 9 can be supported as serdes
ports and directly connected to other network interfaces or to SFPs
without a PHY.
Signed-off-by: Chris Packham
Reviewed-by: Andrew Lunn
---
Changes in
When a port is configured with 'managed = "in-band-status"' don't force
the link up, the switch MAC will detect the link status correctly.
Signed-off-by: Chris Packham
Reviewed-by: Andrew Lunn
---
Changes in v3:
- None
Changes in v2:
- Add review from Andrew
drivers/net/dsa/mv88e6xxx/chip.c |
This small series gets my hardware into a working state. The key points are to
make sure we don't force the link and that we ask the MAC for the link status.
I also have updated my dts to say `phy-mode = "1000base-x";` and `managed =
"in-band-status";`
I've included patch #3 in this series but I
On 10/19/20 6:43 PM, Joel Fernandes (Google) wrote:
---
.../admin-guide/kernel-parameters.txt | 7 +
include/linux/entry-common.h | 2 +-
include/linux/sched.h | 12 +
kernel/entry/common.c | 25 +-
Hi Joel,
On 10/19/20 6:43 PM, Joel Fernandes (Google) wrote:
Document the usecases, design and interfaces for core scheduling.
Co-developed-by: Vineeth Pillai
Tested-by: Julien Desfossez
Signed-off-by: Joel Fernandes (Google)
---
.../admin-guide/hw-vuln/core-scheduling.rst | 312
On 10/19/2020 11:24 PM, Philip Li wrote:
On Mon, Oct 19, 2020 at 09:27:32AM -0400, Mathieu Desnoyers wrote:
Hi,
I pointed out an issue with the will-it-scale context_switch1 test run by the
0day bot on
October 7, 2020, and got no reply.
Thanks Mathieu for the feedback, we had added it to
On 10/7/2020 10:50 PM, Mathieu Desnoyers wrote:
- On Oct 2, 2020, at 4:33 AM, Rong Chen rong.a.c...@intel.com wrote:
Greeting,
FYI, we noticed a -37.0% regression of will-it-scale.per_thread_ops due to
commit:
commit: bdfcae11403e5099769a7c8dc3262e3c4193edef ("[RFC PATCH 2/3] sched:
David Rientjes writes:
> On Sun, 4 Oct 2020, kernel test robot wrote:
>
>> Greeting,
>>
>> FYI, we noticed a -8.7% regression of vm-scalability.throughput due to
>> commit:
>>
>>
>> commit: 85b9f46e8ea451633ccd60a7d8cacbfff9f34047 ("mm, thp: track fallbacks
>> due to failed memcg charges
Add NAND FLASH Controller(NFC) node for RK3036 SoC.
Signed-off-by: Yifeng Zhao
---
(no changes since v1)
arch/arm/boot/dts/rk3036.dtsi | 52 +++
1 file changed, 52 insertions(+)
diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
index
Add maintainers to ROCKCHIP NFC.
Signed-off-by: Yifeng Zhao
---
(no changes since v1)
MAINTAINERS | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 5919b758c708..b2db04cfec61 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2362,12 +2362,12
Add NAND FLASH Controller(NFC) node for RK2928, RK3066, RK3168
and RK3188 SoCs.
Signed-off-by: Yifeng Zhao
---
(no changes since v1)
arch/arm/boot/dts/rk3xxx.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi
index
Rockchp's NFC(Nand Flash Controller) has four versions: V600, V622, V800 and
V900.This series patch can support all four versions.
Changes in v12:
- Fix some warnings while make dt_binding_check
- Drop a allOf defined
Changes in v11:
- Fix compile error.
Changes in v10:
- Fix compile error
Add NAND FLASH Controller(NFC) node for PX30 SoC.
Signed-off-by: Yifeng Zhao
---
(no changes since v1)
arch/arm64/boot/dts/rockchip/px30.dtsi | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi
b/arch/arm64/boot/dts/rockchip/px30.dtsi
Add NAND FLASH Controller(NFC) node for RV1108 SoC.
Signed-off-by: Yifeng Zhao
---
(no changes since v1)
arch/arm/boot/dts/rv1108.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi
index
This driver supports Rockchip NFC (NAND Flash Controller) found on RK3308,
RK2928, RKPX30, RV1108 and other SOCs. The driver has been tested using
8-bit NAND interface on the ARM based RK3308 platform.
Support Rockchip SoCs and NFC versions:
- PX30 and RK3326(NFCv900).
ECC: 16/40/60/70
From: Yifeng Zhao
Add NAND FLASH Controller(NFC) node for RK3308 SoC.
Signed-off-by: Yifeng Zhao
Signed-off-by: Yifeng Zhao
---
(no changes since v1)
arch/arm64/boot/dts/rockchip/rk3308.dtsi | 15 +++
1 file changed, 15 insertions(+)
diff --git
Documentation support for Rockchip RK3xxx NAND flash controllers
Signed-off-by: Yifeng Zhao
---
Changes in v12:
- Fix some warnings while make dt_binding_check
- Drop a allOf defined
Changes in v8:
- Fix a error while make dt_binding_check
Changes in v7:
- Fix some wrong define
Changes in
Fix the following sparse warning:
lib/lzo/lzo1x_compress.c:304:5: warning: symbol
'lzogeneric1x_1_compress' was not declared. Should it be static?
Signed-off-by: Jason Yan
---
lib/lzo/lzo1x_compress.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/lzo/lzo1x_compress.c
On 10/19/20 3:48 PM, Julia Lawall wrote:
On Mon, 19 Oct 2020, Waiman Long wrote:
On 10/15/20 7:38 AM, Julia Lawall wrote:
Hello,
Phoenix is an implementation of map reduce:
https://github.com/kozyraki/phoenix
The phoenix-2.0/tests subdirectory contains some benchmarks, including
On Tue, 20 Oct 2020 10:23:41 +1100 Benjamin Herrenschmidt wrote:
> On Mon, 2020-10-19 at 12:00 -0700, Jakub Kicinski wrote:
> > On Mon, 19 Oct 2020 08:57:03 + Joel Stanley wrote:
> > > > diff --git a/drivers/net/ethernet/faraday/ftgmac100.c
> > > > b/drivers/net/ethernet/faraday/ftgmac100.c
Hi Daniel,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on 7cf726a59435301046250c42131554d9ccc566b8]
url:
https://github.com/0day-ci/linux/commits/Daniel-Latypov/wireguard-convert-selftest-counter-ratelimiter-c-to-KUnit/20201020-042650
base:
Thanks Michal,
Hi, raghavendra, Jens
Could you help comment this issue? Thanks in advance.
-Original Message-
From: Michal Hocko [mailto:mho...@suse.com]
Sent: Monday, October 19, 2020 7:40 PM
To: tianxianting (RD)
Cc: ax...@kernel.dk; raghavendra...@linux.vnet.ibm.com;
The devfreq governor is able to have the specific flag as follows
in order to implement the specific feature. For example, devfreq allows
user to change the governors on runtime via sysfs interface.
But, if devfreq device uses 'passive' governor, don't allow user to change
the governor. For this
Each devfreq governor can have the different sysfs attributes and features.
In order to provide the only available sysfs attribute to user-space,
add governor attribute flag with DEVFREQ_GOV_ATTR_[attribute name] defintion.
Also, each governor is able to have the specific flag in order to
support
DEVFREQ supports the default governors like performance, simple_ondemand and
also allows the devfreq driver to add their own governor like tegra30-devfreq.c
according to their requirement. In result, some sysfs attributes are useful
or not useful. Prior to that the user can access all sysfs
On Fri, Oct 09, 2020 at 11:53:00AM +0200, Peter Zijlstra wrote:
> On Fri, Oct 09, 2020 at 10:37:51AM +0100, Will Deacon wrote:
> > On Fri, Oct 09, 2020 at 11:09:27AM +0200, Peter Zijlstra wrote:
>
> > > Patch 4 makes it all far worse by exposing it to pretty much everybody.
> > >
> > > Now, I
On Fri, 2020-10-16 at 12:14 -0500, Rob Herring wrote:
> On Tue, Oct 13, 2020 at 04:52:05PM +0800, Chunfeng Yun wrote:
> > Convert mediatek,mtk-xhci.txt to YAML schema mediatek,mtk-xhci.yaml
> >
>
> There's some refactoring of usb-hcd.yaml and XHCI schema under review
> and this may need some
Hi Stanley,
On 2020-09-22 15:09, Can Guo wrote:
If someone plays with the UFS clk scaling devfreq governor through
sysfs,
ufshcd_devfreq_scale may be called even when hba is not runtime ACTIVE,
which can lead to unexpected error. We cannot just protect it by
calling
pm_runtime_get_sync,
On Fri, 2020-10-16 at 12:05 -0500, Rob Herring wrote:
> On Tue, Oct 13, 2020 at 04:52:01PM +0800, Chunfeng Yun wrote:
> > Convert phy-mtk-tphy.txt to YAML schema mediatek,tphy.yaml
> >
> > Signed-off-by: Chunfeng Yun
> > ---
> > v2: modify description and compatible
> > ---
> >
On Fri, 2020-10-16 at 12:04 -0500, Rob Herring wrote:
> On Tue, Oct 13, 2020 at 04:52:01PM +0800, Chunfeng Yun wrote:
> > Convert phy-mtk-tphy.txt to YAML schema mediatek,tphy.yaml
> >
> > Signed-off-by: Chunfeng Yun
> > ---
> > v2: modify description and compatible
> > ---
> >
From: Ramuthevar Vadivel Murugan
Add compatible string for Intel LGM SoC.
Signed-off-by: Ramuthevar Vadivel Murugan
---
Documentation/devicetree/bindings/spi/cadence-quadspi.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
From: Ramuthevar Vadivel Murugan
Convert the cadence-quadspi.txt documentation to cadence-quadspi.yaml
remove the cadence-quadspi.txt from Documentation/devicetree/bindings/spi/
Signed-off-by: Ramuthevar Vadivel Murugan
---
.../devicetree/bindings/spi/cadence-quadspi.txt| 67 --
From: Ramuthevar Vadivel Murugan
Move the Documentation/devicetree/bindings/mtd/cadence-quadspi.txt to
Documentation/devicetree/bindings/spi/
Signed-off-by: Ramuthevar Vadivel Murugan
---
Documentation/devicetree/bindings/{mtd => spi}/cadence-quadspi.txt | 0
1 file changed, 0 insertions(+),
From: Ramuthevar Vadivel Murugan
Add QSPI controller support for Intel LGM SoC.
Signed-off-by: Ramuthevar Vadivel Murugan
---
drivers/spi/Kconfig | 2 +-
drivers/spi/spi-cadence-quadspi.c | 3 +++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/Kconfig
From: Ramuthevar Vadivel Murugan
On Intel Lightning Mountain(LGM) SoCs QSPI controller do not use
Direct Access Controller(DAC).
This patch adds a quirk to disable the Direct Access Controller
for data transfer instead it uses indirect data transfer.
Signed-off-by: Ramuthevar Vadivel Murugan
Add QSPI controller support for Intel LGM SoC.
Note from Vignesh(mtd subsystem maintainer):
This series is a subset of "[PATCH v12 0/4] spi: cadence-quadspi: Add
support for the Cadence QSPI controller" by Ramuthevar,Vadivel MuruganX
that intended to move
cadence-quadspi driver to spi-mem
From: Ramuthevar Vadivel Murugan
Add multiple chipselect support for Intel LGM SoCs,
currently QSPI-NOR and QSPI-NAND supported.
Signed-off-by: Ramuthevar Vadivel Murugan
---
drivers/spi/spi-cadence-quadspi.c | 14 ++
1 file changed, 14 insertions(+)
diff --git
On Fri, 2020-10-16 at 12:00 -0500, Rob Herring wrote:
> On Tue, Oct 13, 2020 at 04:52:00PM +0800, Chunfeng Yun wrote:
> > Convert phy-mtk-xsphy.txt to YAML schema mediatek,xsphy.yaml
> >
> > Signed-off-by: Chunfeng Yun
> > ---
> > v2: modify description and compatible definition suggested by Rob
On 2020-10-06 06:36, Jaegeuk Kim wrote:
From: Jaegeuk Kim
When giving a stress test which enables/disables clkgating, we hit
device
timeout sometimes. This patch avoids subtle racy condition to address
it.
Cc: Alim Akhtar
Cc: Avri Altman
Cc: Can Guo
Signed-off-by: Jaegeuk Kim
---
On Mon 19.Oct'20 at 22:08:51 -0400, Arvind Sankar wrote:
On Tue, Oct 20, 2020 at 09:38:09AM +0800, Shuo A Liu wrote:
On Mon 19.Oct'20 at 18:15:15 -0400, Arvind Sankar wrote:
>On Mon, Oct 19, 2020 at 02:17:50PM +0800, shuo.a@intel.com wrote:
>> From: Shuo Liu
>>
>> The Service VM
On 09/30/20 at 12:23pm, Alexander Egorenkov wrote:
> The offset of the field 'init_uts_ns.name' has changed
> since commit 9a56493f6942 ("uts: Use generic ns_common::count").
>
> Link:
> https://lore.kernel.org/r/159644978167.604812.1773586504374412107.stgit@localhost.localdomain
>
> Make the
Hi Luka,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on hwmon/hwmon-next]
[also build test WARNING on v5.9]
[cannot apply to pavel-linux-leds/for-next lee-mfd/for-mfd-next next-20201016]
[If your patch is applied to the wrong git tree, kindly drop us a note.
On 2020-10-06 06:36, Jaegeuk Kim wrote:
From: Jaegeuk Kim
Must have WQ_MEM_RECLAIM
``WQ_MEM_RECLAIM``
All wq which might be used in the memory reclaim paths **MUST**
have this flag set. The wq is guaranteed to have at least one
execution context regardless of memory pressure.
The
This reverts commit 00fdec98d9881bf5173af09aebd353ab3b9ac729.
(but only from 5.2 and prior kernels)
The original commit was a preventive fix based on code-review and was
auto-picked for stable back-port (for better or worse).
It was OK for v5.3+ kernels, but turned up needing an implicit change
On 2020-10-06 06:36, Jaegeuk Kim wrote:
From: Jaegeuk Kim
This adds user-friendly tracepoints with group id.
Cc: Alim Akhtar
Cc: Avri Altman
Cc: Can Guo
Signed-off-by: Jaegeuk Kim
Reviewed-by: Can Guo
---
drivers/scsi/ufs/ufshcd.c | 6 --
include/trace/events/ufs.h | 21
On 2020-10-06 06:36, Jaegeuk Kim wrote:
From: Jaegeuk Kim
In order to conduct FFU or RPMB operations, UFS needs to clear UAC.
This patch
clears it explicitly, so that we could get no failure given early
execution.
Usually it is the user's/utility's/tool's responsiblity to clear UA by
Hi Bjorn, Lorenzo and Kishon,
> -Original Message-
> From: Kishon Vijay Abraham I
> Sent: 2020年10月19日 13:41
> To: Z.q. Hou ; Bjorn Helgaas
> Cc: linux-kernel@vger.kernel.org; linux-...@vger.kernel.org;
> r...@kernel.org; lorenzo.pieral...@arm.com; bhelg...@google.com;
>
On Tue, Oct 20, 2020 at 09:38:09AM +0800, Shuo A Liu wrote:
> On Mon 19.Oct'20 at 18:15:15 -0400, Arvind Sankar wrote:
> >On Mon, Oct 19, 2020 at 02:17:50PM +0800, shuo.a@intel.com wrote:
> >> From: Shuo Liu
> >>
> >> The Service VM communicates with the hypervisor via conventional
> >>
allmodconfig
powerpc allnoconfig
x86_64 randconfig-a004-20201019
x86_64 randconfig-a002-20201019
x86_64 randconfig-a006-20201019
x86_64 randconfig-a003-20201019
x86_64 randconfig-a005-20201019
Hi Linus,
The bulk of ARC pull request is removal of EZChip NPS platform which was
suffering
from constant bitrot. In recent years EZChip has gone though multiple successive
acquisitions and I guess things and people move on. I would like to take this
opportunity to recognize and thank all those
On Mon, Oct 19, 2020 at 11:10:49PM +0200, Richard Weinberger wrote:
> Commit b2b29d6d0119 ("mm: account PMD tables like PTE tables") uncovered
> a bug in uml, we forgot to call the destructor.
> While we are here, give x a sane name.
>
> Reported-by: Anton Ivanov
> Co-developed-by: Matthew
In order to prevent interference and clearly support both per-task and CGroup
APIs, split the cookie into 2 and allow it to be set from either per-task, or
CGroup API. The final cookie is the combined value of both and is computed when
the stop-machine executes during a change of cookie.
Also,
From: Peter Zijlstra
Marks all tasks in a cgroup as matching for core-scheduling.
A task will need to be moved into the core scheduler queue when the cgroup
it belongs to is tagged to run with core scheduling. Similarly the task
will need to be moved out of the core scheduler queue when the
From: Vineeth Pillai
Similar to how user to kernel mode transitions are protected in earlier
patches, protect the entry into kernel from guest mode as well.
Tested-by: Julien Desfossez
Signed-off-by: Vineeth Pillai
---
arch/x86/kvm/x86.c| 3 +++
include/linux/entry-kvm.h | 12
During exit, we have to free the references to a cookie that might be shared by
many tasks. This commit therefore ensures when the task_struct is released, any
references to cookies that it holds are also released.
Tested-by: Julien Desfossez
Signed-off-by: Joel Fernandes (Google)
---
From: Peter Zijlstra
Tested-by: Julien Desfossez
Not-Signed-off-by: Peter Zijlstra (Intel)
---
kernel/sched/core.c | 37 -
1 file changed, 36 insertions(+), 1 deletion(-)
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index
Tested-by: Julien Desfossez
Signed-off-by: Joel Fernandes (Google)
---
tools/testing/selftests/sched/.gitignore | 1 +
tools/testing/selftests/sched/Makefile| 14 +
tools/testing/selftests/sched/config | 1 +
.../testing/selftests/sched/test_coresched.c | 840
This will be used by kselftest to verify the CGroup cookie value that is
set by the CGroup interface.
Tested-by: Julien Desfossez
Signed-off-by: Joel Fernandes (Google)
---
kernel/sched/core.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/kernel/sched/core.c
Add a per-thread core scheduling interface which allows a thread to share a
core with another thread, or have a core exclusively for itself.
ChromeOS uses core-scheduling to securely enable hyperthreading. This cuts
down the keypress latency in Google docs from 150ms to 50ms while improving
the
From: Peter Zijlstra
When a sibling is forced-idle to match the core-cookie; search for
matching tasks to fill the core.
rcu_read_unlock() can incur an infrequent deadlock in
sched_core_balance(). Fix this by using the RCU-sched flavor instead.
Tested-by: Julien Desfossez
Signed-off-by: Peter
Document the usecases, design and interfaces for core scheduling.
Co-developed-by: Vineeth Pillai
Tested-by: Julien Desfossez
Signed-off-by: Joel Fernandes (Google)
---
.../admin-guide/hw-vuln/core-scheduling.rst | 312 ++
Documentation/admin-guide/hw-vuln/index.rst | 1
Google has a usecase where the first level tag to tag a CGroup is not
sufficient. So, a patch is carried for years where a second tag is added which
is writeable by unprivileged users.
Google uses DAC controls to make the 'tag' possible to set only by root while
the second-level 'color' can be
From: Peter Zijlstra
Get rid of the __call_single_node union and clean up the API a little
to avoid external code relying on the structure layout as much.
(Needed for irq_work_is_busy() API in core-scheduling series).
Tested-by: Julien Desfossez
Signed-off-by: Peter Zijlstra (Intel)
Due to earlier patches, the old way of computing a task's cookie when it
is added to a CGroup,is outdated. Update it by fetching the group's
cookie using the new helpers.
Tested-by: Julien Desfossez
Signed-off-by: Joel Fernandes (Google)
---
kernel/sched/core.c | 15 ++-
1 file
core.c is already huge. The core-tagging interface code is largely
independent of it. Move it to its own file to make both files easier to
maintain.
Tested-by: Julien Desfossez
Signed-off-by: Joel Fernandes (Google)
---
kernel/sched/Makefile | 1 +
kernel/sched/core.c| 481
From: Peter Zijlstra
Instead of only selecting a local task, select a task for all SMT
siblings for every reschedule on the core (irrespective which logical
CPU does the reschedule).
During a CPU hotplug event, schedule would be called with the hotplugged
CPU not in the cpumask. So use
From: Peter Zijlstra
Introduce the basic infrastructure to have a core wide rq->lock.
Tested-by: Julien Desfossez
Signed-off-by: Peter Zijlstra (Intel)
Signed-off-by: Julien Desfossez
Signed-off-by: Vineeth Remanan Pillai
---
kernel/Kconfig.preempt | 6 +++
kernel/sched/core.c| 109
From: Aubrey Li
- Don't migrate if there is a cookie mismatch
Load balance tries to move task from busiest CPU to the
destination CPU. When core scheduling is enabled, if the
task's cookie does not match with the destination CPU's
core cookie, this task will be skipped by
From: Peter Zijlstra
Tested-by: Julien Desfossez
Signed-off-by: Peter Zijlstra (Intel)
---
kernel/sched/fair.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c
index bd6aed63f5e3..b4bc82f46fe7 100644
---
Core-scheduling prevents hyperthreads in usermode from attacking each
other, but it does not do anything about one of the hyperthreads
entering the kernel for any reason. This leaves the door open for MDS
and L1TF attacks with concurrent execution sequences between
hyperthreads.
This patch
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