On Sat, Oct 24, 2020 at 07:47:13AM +, Peng Fan wrote:
> > Subject: Re: [PATCH 2/2] i2c: imx: remove id_table entry
> >
> > On Fri, Oct 23, 2020 at 04:18:23PM +0800, peng@nxp.com wrote:
> > > From: Peng Fan
> > >
> > > The legacy platform device code has been removed under
> > >
On Sat, Oct 24, 2020 at 5:54 PM harshal chaudhari
wrote:
> On Tue, Oct 13, 2020 at 4:42 PM David Laight wrote:
> So I am a little bit confused about this check whether it's required or not
> Please could you point me in the right direction?
>
> In any case, thanks for your help ...
>
> Here is
Hi,
On Sat, 24 Oct 2020 at 20:39, Icenowy Zheng wrote:
>
>
>
> 于 2020年10月25日 GMT+08:00 上午2:30:35, "Jernej Škrabec"
> 写到:
> >Dne sobota, 24. oktober 2020 ob 19:51:06 CEST je Icenowy Zheng
> >napisal(a):
> >> 在 2020-10-25星期日的 00:25 +0800，Chen-Yu Tsai写道：
> >>
> >> > From: Chen-Yu Tsai
> >> >
>
Previously ASPM L1-Sub-States control registers (CTL1 and CTL2) weren't
saved and restored during suspend/resume leading to ASPM-L1SS
configuration being lost post resume.
Save the ASPM-L1SS control registers so that the configuration is retained
post resume.
Signed-off-by: Vidya Sagar
---
v1:
Assorted stuff all over the place (the largest group here is
Christoph's stat cleanups). This is probably the last pull request
for this window - there's also a group of sparc patches in -next,
and davem seemed to be OK with that at the time, but I'd rather have
it go through his tree
于 2020年10月25日 GMT+08:00 上午2:30:35, "Jernej Škrabec"
写到:
>Dne sobota, 24. oktober 2020 ob 19:51:06 CEST je Icenowy Zheng
>napisal(a):
>> 在 2020-10-25星期日的 00:25 +0800，Chen-Yu Tsai写道：
>>
>> > From: Chen-Yu Tsai
>> >
>> > The Ethernet PHY on the A31 Hummingbird has the RX and TX delays
>> >
Dne sobota, 24. oktober 2020 ob 19:51:06 CEST je Icenowy Zheng napisal(a):
> 在 2020-10-25星期日的 00:25 +0800，Chen-Yu Tsai写道：
>
> > From: Chen-Yu Tsai
> >
> > The Ethernet PHY on the A31 Hummingbird has the RX and TX delays
> > enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
> >
>
Antworten Sie zu den 850.000,00 Euro, die Ihnen gerade von Herrn Manuel Franco
gespendet wurden.
Antworten Sie zu den 850.000,00 Euro, die Ihnen gerade von Herrn Manuel Franco
gespendet wurden.
On Sat, Oct 24, 2020 at 07:17:05PM +0200, Andrew Lunn wrote:
> > - Every PHY driver gains a .handle_interrupt() implementation that, for
> > the most part, would look like below:
> >
> > irq_status = phy_read(phydev, INTR_STATUS);
> > if (irq_status < 0) {
> >
CC: rdma, looks like rdma from the stack trace
On Fri, 23 Oct 2020 20:07:17 -0700 syzbot wrote:
> syzbot has found a reproducer for the following issue on:
>
> HEAD commit:3cb12d27 Merge tag 'net-5.10-rc1' of git://git.kernel.org/..
> git tree: net
> console output:
On 24/10/20 9:03 pm, Joe Perches wrote:
> On Sat, 2020-10-24 at 18:54 +0530, Aditya wrote:
>>> Would you like to work on
>>> further rules that can be improved with your evaluation approach?
>>
>> Yes, I would like work on further rules.
>
> Some generic ideas:
>
> How about working to reduce
The pull request you sent on Fri, 23 Oct 2020 22:13:02 -0700 (PDT):
> git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git
> tags/riscv-for-linus-5.10-mw1
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/0593c1b4598a77b5f835b278cde0ab71e2578588
Thank you!
--
The pull request you sent on Sat, 24 Oct 2020 21:50:21 +1100:
> https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git
> tags/powerpc-5.10-2
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/b6f96e75ae121ead54da3f58c545d68184079f90
Thank you!
--
On Sat, Oct 24, 2020 at 07:17:05PM +0200, Andrew Lunn wrote:
> > - Every PHY driver gains a .handle_interrupt() implementation that, for
> > the most part, would look like below:
> >
> > irq_status = phy_read(phydev, INTR_STATUS);
> > if (irq_status < 0) {
> >
On 9/30/20 10:21 PM, Andrew Gabbasov wrote:
> In the function ravb_hwtstamp_get() in ravb_main.c with the existing
> values for RAVB_RXTSTAMP_TYPE_V2_L2_EVENT (0x2) and RAVB_RXTSTAMP_TYPE_ALL
> (0x6)
>
> if (priv->tstamp_rx_ctrl & RAVB_RXTSTAMP_TYPE_V2_L2_EVENT)
> config.rx_filter =
Hello!
On 10/19/20 10:32 AM, Andrew Gabbasov wrote:
Sorry for the delay again, I keep forgetting about the mails I' couldn't
reply
quickly. :-|
[...]
>>The patch was set to the "Changes Requested" state -- most probably
>> because of this
>> mail. Though unintentionally, it served to
On Sat, 2020-10-24 at 03:09 +0100, Matthew Wilcox wrote:
> On Fri, Oct 23, 2020 at 08:48:04PM -0400, Rik van Riel wrote:
> > The allocation flags of anonymous transparent huge pages can be
> > controlled
> > through the files in /sys/kernel/mm/transparent_hugepage/defrag,
> > which can
> > help
在 2020-10-25星期日的 00:25 +0800，Chen-Yu Tsai写道：
> From: Chen-Yu Tsai
>
> The Ethernet PHY on the A31 Hummingbird has the RX and TX delays
> enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
>
> Fix the phy-mode description to correct reflect this so that the
> implementation doesn't
On 10/23/20 1:45 AM, Xu Yilun wrote:
> This patch adds 10G configurations support for dfl ether group private
> feature.
>
> 10G configurations have different PHY & MAC IP blocks from 25G, so a
> different set of HW operations is implemented, but the software arch is
> quite similar with 25G.
On Fri, Oct 23, 2020 at 09:28:59PM +, David Laight wrote:
> From: Segher Boessenkool
> > Sent: 23 October 2020 19:27
> > On Fri, Oct 23, 2020 at 06:58:57PM +0100, Al Viro wrote:
> > > On Fri, Oct 23, 2020 at 03:09:30PM +0200, David Hildenbrand wrote:
> > > On arm64 when callee expects a 32bit
On 10/24/20 9:39 AM, Andrew Lunn wrote:
> On Sat, Oct 24, 2020 at 08:03:51AM -0700, Tom Rix wrote:
>> On 10/23/20 1:45 AM, Xu Yilun wrote:
>>> This driver supports the ethernet retimers (Parkvale) for the Intel PAC
>>> (Programmable Acceleration Card) N3000, which is a FPGA based Smart NIC.
>>
On 10/23/20 1:45 AM, Xu Yilun wrote:
> This driver supports the DFL Ether Group private feature for the Intel(R)
> PAC N3000 FPGA Smart NIC.
>
> The DFL Ether Group private feature contains an Ether Wrapper and several
> ports (phy-mac pair). There are two types of Ether Groups, line side &
> - Every PHY driver gains a .handle_interrupt() implementation that, for
> the most part, would look like below:
>
> irq_status = phy_read(phydev, INTR_STATUS);
> if (irq_status < 0) {
> phy_error(phydev);
> return IRQ_NONE;
> }
>
> if
Hi Bernard.
On Fri, Oct 23, 2020 at 03:48:49PM +0800, Bernard wrote:
>
>
> From: Thomas Zimmermann
> Date: 2020-10-23 15:13:30
> To: Bernard Zhao ,Dave Airlie ,David
> Airlie ,Daniel Vetter
> ,dri-de...@lists.freedesktop.org,linux-kernel@vger.kernel.org
> Cc: opensource.ker...@vivo.com
>
On Fri, Oct 23, 2020 at 11:15:50PM +0800, zhang...@gmail.com wrote:
> From: Freeman Zhang
>
> Add the watchdog driver for Nuvoton NCT668x series. So far this driver only
> supports NCT6688DL and customized chip used in Lenovo ThinkCentre M90n Nano.
>
> Signed-off-by: Freeman Zhang
> ---
>
El 24/10/20 a las 13:25, Chen-Yu Tsai escribió:
From: Chen-Yu Tsai
The Ethernet PHY on the Cubietruck has the RX and TX delays
enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure
-s031-20201024 (attached as .config)
compiler: powerpc-linux-gcc (GCC) 9.3.0
reproduce:
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.3-17
From: David Laight
> Sent: 23 October 2020 22:52
...
> Could do_put_user() do an initial check for 64 bit
> then expand a different #define that contains the actual
> code passing either "a" or "A" for the constriant.
>
> Apart from another level of indirection nothing is duplicated.
This code
Hi Dan,
On Sat, Oct 24, 2020 at 05:33:32PM +0100, Dan Scally wrote:
> On 24/10/2020 15:29, Sakari Ailus wrote:
> > On Sat, Oct 24, 2020 at 03:39:55AM +0300, Laurent Pinchart wrote:
> >> On Wed, Oct 21, 2020 at 01:49:10AM +0300, Sakari Ailus wrote:
> >>> On Tue, Oct 20, 2020 at 08:56:07PM +0100,
On Sat, Oct 24, 2020 at 08:03:51AM -0700, Tom Rix wrote:
>
> On 10/23/20 1:45 AM, Xu Yilun wrote:
> > This driver supports the ethernet retimers (Parkvale) for the Intel PAC
> > (Programmable Acceleration Card) N3000, which is a FPGA based Smart NIC.
>
> Parkvale is a code name, it would be
The default codec after driver open is set to be H264 but the
instance format for capture is wrongly set to H263. Correct this
to H264.
For regular applications this is not a big issue because they set
the format through S_FMT but for example v4l2-complience does not.
Signed-off-by: Stanimir
The profile and level in op_set_ctrl was recently changed but during
v4l2_ctrl_handler_setup profile and level control values are mangled.
Fixes: 435c53c3698f ("media: venus: venc: Use helper to set profile and level")
Signed-off-by: Stanimir Varbanov
---
On 24/10/2020 15:29, Sakari Ailus wrote:
> On Sat, Oct 24, 2020 at 03:39:55AM +0300, Laurent Pinchart wrote:
>> Hi Sakari
>>
>> On Wed, Oct 21, 2020 at 01:49:10AM +0300, Sakari Ailus wrote:
>>> On Tue, Oct 20, 2020 at 08:56:07PM +0100, Dan Scally wrote:
On 20/10/2020 13:06, Sakari Ailus
Currently intel_idle driver gets the c-state information from ACPI
_CST if the processor model is not recognized by it. However the
c-state in _CST starts with index 1 which is different from the
index in intel_idle driver's internal c-state table. While
intel_idle_max_cstate_reached() was
From: Chen-Yu Tsai
The Ethernet PHY on the Bananapi M64 has the RX and TX delays
enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
happened with commit
From: Chen-Yu Tsai
The Ethernet PHY on the Bananapi M2+ has the RX and TX delays
enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
happened with commit
From: Chen-Yu Tsai
The Ethernet PHY on the Cubietruck has the RX and TX delays
enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
happened with commit
From: Chen-Yu Tsai
The Ethernet PHY on the Orange Pi Plus 2E has the RX and TX delays
enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
happened with
From: Chen-Yu Tsai
The Ethernet PHY on the Cubieboard 4 and A80 Optimus have the RX
and TX delays enabled on the PHY, using pull-ups on the RXDLY and
TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
From: Chen-Yu Tsai
The Ethernet PHY on the Libre Computer ALL-H5-CC has the RX and TX
delays enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
happened
From: Chen-Yu Tsai
This reverts commit 75ee680cbd2e4d0156b94f9fec50076361ab12f2.
Turns out the activity and link LEDs on the RJ45 port are active low,
just like on the Orange Pi PC.
Revert the commit that says otherwise.
Fixes: 75ee680cbd2e ("arm: sun8i: orangepi-pc-plus: Set EMAC activity
From: Chen-Yu Tsai
The Ethernet PHY on the A31 Hummingbird has the RX and TX delays
enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
happened with
On Fri, Oct 23, 2020 at 6:24 PM syzbot
wrote:
>
> Hello,
>
> syzbot found the following issue on:
>
> HEAD commit:f804b315 Merge tag 'linux-watchdog-5.10-rc1' of git://www...
> git tree: upstream
> console output: https://syzkaller.appspot.com/x/log.txt?x=1797677f90
> kernel config:
From: Chen-Yu Tsai
The Ethernet PHY on the Bananapi M3 and Cubietruck Plus have the RX
and TX delays enabled on the PHY, using pull-ups on the RXDLY and
TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
From: Chen-Yu Tsai
The Ethernet PHY on the Bananapi M1+ has the RX and TX delays
enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
happened with commit
On Thu, 2020-10-22 at 20:37 +0800, Weiyi Lu wrote:
> Add MT8192 imp i2c wrapper c clock provider
>
> Signed-off-by: Weiyi Lu
> ---
> drivers/clk/mediatek/Kconfig | 6 +++
> drivers/clk/mediatek/Makefile| 1 +
>
These will be used by the imx8mn for blk_ctl driver.
Signed-off-by: Adam Ford
---
include/dt-bindings/clock/imx8mn-clock.h | 11 +++
1 file changed, 11 insertions(+)
diff --git a/include/dt-bindings/clock/imx8mn-clock.h
b/include/dt-bindings/clock/imx8mn-clock.h
index
There are some less-documented registers which control clocks and
resets for the multimedia block which controls the LCDIF, ISI, MIPI
CSI, and MIPI DSI.
The i.Mx8M Nano appears to have a subset of the i.MX8MP registers with
a couple shared registers with the i.MX8MM. This series builds on the
This driver is intended to work with the multimedia block which
contains display and camera subsystems:
LCDIF
ISI
MIPI CSI
MIPI DSI
Signed-off-by: Adam Ford
---
drivers/clk/imx/clk-blk-ctl-imx8mn.c | 80
1 file changed, 80 insertions(+)
diff --git
These will be used by the imx8mn for blk_ctl driver.
Signed-off-by: Adam Ford
---
include/dt-bindings/reset/imx8mn-reset.h | 22 ++
1 file changed, 22 insertions(+)
diff --git a/include/dt-bindings/reset/imx8mn-reset.h
b/include/dt-bindings/reset/imx8mn-reset.h
new file
On Sat, Oct 24, 2020 at 1:23 AM Borislav Petkov wrote:
>
> On Fri, Oct 23, 2020 at 05:12:49PM -0700, Andy Lutomirski wrote:
> > I disagree. A real CPU does exactly what I'm describing. If I stick
>
> A real modern CPU fetches up to 32 bytes insn window which it tries
> to decode etc. I don't
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: f11901ed723d1351843771c3a84b03a253bbf8b2
commit: 9934430e2178d5164eb1ac91a9b092f9e7e64745 SMB3.1.1: Fix ids returned in
POSIX query dir
date: 4 days ago
config: powerpc64-randconfig-r004-20201022
On Fri, 23 Oct 2020 14:22:58 -0500
Rob Herring wrote:
> Clean-up incorrect indentation, extra spaces, and missing EOF newline in
> schema files. Most of the clean-ups are for list indentation which
> should always be 2 spaces more than the preceding keyword.
>
> Found with yamllint (now
On Sat, Oct 24, 2020 at 4:34 AM Jarkko Sakkinen wrote:
>
> On Fri, Oct 23, 2020 at 07:19:05AM -0700, Dave Hansen wrote:
> > On 10/23/20 3:17 AM, Jarkko Sakkinen wrote:
> > > On Tue, Oct 20, 2020 at 02:19:26PM -0700, Dave Hansen wrote:
> > >> On 10/2/20 9:50 PM, Jarkko Sakkinen wrote:
> > >>> + *
On Wed, Oct 21, 2020 at 07:00:30PM +0300, Alexey Budankov wrote:
>
> Introduce decompressor to trace reader object so that decompression
> could be executed on per trace file basis separately for every
> trace file located in trace directory.
>
> Signed-off-by: Alexey Budankov
> ---
>
On Wed, Oct 21, 2020 at 06:59:48PM +0300, Alexey Budankov wrote:
>
> Move definition of reader to session header file to be shared
> among different source files. Introduce reference to active
> reader object from session object.
>
> Signed-off-by: Alexey Budankov
> ---
>
On Wed, Oct 21, 2020 at 07:02:56PM +0300, Alexey Budankov wrote:
SNIP
>
> record__synthesize(rec, true);
> - /* this will be recalculated during process_buildids() */
> - rec->samples = 0;
>
> if (!err) {
> if (!rec->timestamp_filename) {
> @@ -2680,9
On Wed, Oct 21, 2020 at 07:10:09PM +0300, Alexey Budankov wrote:
>
> Start threads in detached state because its management is possible
> via messaging. Block signals prior the threads start so only main
> tool thread would be notified on external async signals during data
> collection. Streaming
On Wed, Oct 21, 2020 at 07:03:48PM +0300, Alexey Budankov wrote:
>
> Introduce thread local data object and its array to be used for
> threaded trace streaming.
>
> Signed-off-by: Alexey Budankov
> ---
> tools/perf/builtin-record.c | 18 ++
> 1 file changed, 18 insertions(+)
>
This clock must be always enabled to allow access to any registers in
fsys1 CMU. Until proper solution based on runtime PM is applied
(similar to what was done for Exynos5433), mark that clock as critical
so it won't be disabled.
It was observed on Samsung Galaxy S6 device (based on Exynos7420),
On Wed, Oct 21, 2020 at 07:07:00PM +0300, Alexey Budankov wrote:
>
> Introduce thread local variable and use it for threaded trace streaming.
>
> Signed-off-by: Alexey Budankov
> ---
> tools/perf/builtin-record.c | 71 -
> 1 file changed, 62 insertions(+), 9
On Wed, Oct 21, 2020 at 07:04:26PM +0300, Alexey Budankov wrote:
>
> Provide allocation, initialization, finalization and releasing of
> thread specific objects at thread specific data array. Allocate
> thread specific object for every data buffer making one-to-one
> relation between data buffer
On Wed, Oct 21, 2020 at 07:01:19PM +0300, Alexey Budankov wrote:
>
> Read trace files located in data directory into tool process memory.
> Basic analysis support of data directories is provided for report
> mode. Raw dump (-D) and aggregated reports are available for data
> directories, still
On Wed, Oct 21, 2020 at 06:57:53PM +0300, Alexey Budankov wrote:
>
> Open files located at trace data directory in case read access
> mode is requested. File are opened and its fds assigned to
> perf_data dir files especially for loading data directories
> content in perf report mode.
>
>
On Wed, Oct 21, 2020 at 06:52:43PM +0300, Alexey Budankov wrote:
>
> Changes in v2:
> - explicitly added credit tags to patches 6/15 and 15/15,
> additionally to cites [1], [2]
> - updated description of 3/15 to explicitly mention the reason
> to open data directories in read access mode
> On Oct 24, 2020, at 7:38 AM, Dr. Greg wrote:
>
>
> I can't bring myself to believe that LSM's are going to be written
> that will be making enclave security decisions on a page by page
> basis. Given what I have written above, I think all of this comes
> down to giving platform
On Sat, 2020-10-24 at 18:54 +0530, Aditya wrote:
> > Would you like to work on
> > further rules that can be improved with your evaluation approach?
>
> Yes, I would like work on further rules.
Some generic ideas:
How about working to reduce runtime and complexity by
making the rules
On 10/24/20 2:10 AM, Paolo Bonzini wrote:
> allyesconfig results in:
>
> ld: drivers/block/paride/paride.o: in function `pi_init':
> (.text+0x1340): multiple definition of `pi_init';
> arch/x86/kvm/vmx/posted_intr.o:posted_intr.c:(.init.text+0x0): first defined
> here
> make: ***
Hi Daniel,
Thanks for the update.
On Mon, Oct 19, 2020 at 11:59:03PM +0100, Daniel Scally wrote:
> Currently on platforms designed for Windows, connections between CIO2 and
> sensors are not properly defined in DSDT. This patch extends the ipu3-cio2
> driver to compensate by building
Hi Linus,
Set of fixes that should go into -rc1:
- fsize was missed in previous unification of work flags
- Few fixes cleaning up the flags unification creds cases (Pavel)
- Fix NUMA affinities for completely unplugged/replugged node for io-wq
- Two fallout fixes from the set_fs changes. One
Hi Linus,
Two minor libata fixes:
- Fix a DMA boundary mask regression for sata_rcar (Geert)
- kerneldoc markup fix (Mauro)
Please pull!
The following changes since commit 9ff9b0d392ea08090cd1780fb196f36dbb586529:
Merge tag 'net-next-5.10' of
Hi Laurent, Daniel,
On Sat, Oct 24, 2020 at 04:24:11AM +0300, Laurent Pinchart wrote:
> Hi Daniel,
>
> Thank you for the patch.
>
> On Mon, Oct 19, 2020 at 11:59:03PM +0100, Daniel Scally wrote:
> > Currently on platforms designed for Windows, connections between CIO2 and
> > sensors are not
From: Jaegeuk Kim
This adds user-friendly tracepoints with group id.
Reviewed-by: Can Guo
Signed-off-by: Jaegeuk Kim
---
drivers/scsi/ufs/ufshcd.c | 6 --
include/trace/events/ufs.h | 21 +
2 files changed, 21 insertions(+), 6 deletions(-)
diff --git
The below call stack prevents clk_gating at every IO completion.
We can remove the condition, ufshcd_any_tag_in_use(), since clkgating_work
will check it again.
ufshcd_complete_requests(struct ufs_hba *hba)
ufshcd_transfer_req_compl()
__ufshcd_transfer_req_compl()
From: Jaegeuk Kim
In order to conduct FFU or RPMB operations, UFS needs to clear UAC. This patch
clears it explicitly, so that we could get no failure given early execution.
Signed-off-by: Jaegeuk Kim
---
drivers/scsi/ufs/ufshcd.c | 70 +++
Change log from v2:
- use active_req-- instead of __ufshcd_release to avoid UFS timeout
Change log from v1:
- remove clkgating_enable check in __ufshcd_release
- use __uhfshcd_release instead of active_req.
From: Jaegeuk Kim
Must have WQ_MEM_RECLAIM
``WQ_MEM_RECLAIM``
All wq which might be used in the memory reclaim paths **MUST**
have this flag set. The wq is guaranteed to have at least one
execution context regardless of memory pressure.
Signed-off-by: Jaegeuk Kim
---
From: Jaegeuk Kim
When giving a stress test which enables/disables clkgating, we hit device
timeout sometimes. This patch avoids subtle racy condition to address it.
If we use __ufshcd_release(), I've seen that gate_work can be called in parallel
with ungate_work, which results in UFS timeout
On 10/23/20 1:45 AM, Xu Yilun wrote:
> This driver supports the ethernet retimers (Parkvale) for the Intel PAC
> (Programmable Acceleration Card) N3000, which is a FPGA based Smart NIC.
Parkvale is a code name, it would be better if the public name was used.
As this is a physical chip that
On Wed, Oct 21, 2020 at 12:04:08PM +0300, Sergei Shtepa wrote:
> Signed-off-by: Sergei Shtepa
I know I don't take patches without any changelog text.
Maybe some maintainers are more lax...
Also, "second version" doesn't belong in the subject line, the
documentation shows how to properly
Commit c09f56b8f68d ("net/sunrpc: Fix return value for sysctl
sunrpc.transports") attempted to add error checking for the call to
memory_read_from_buffer(), however its return value was assigned to a
size_t variable, so any negative values would be lost in the cast. Fix
this.
On 10/24/20 5:55 AM, Colin King wrote:
> From: Colin Ian King
>
> There are a couple of trivial spelling mistakes, fix these.
>
> Signed-off-by: Colin Ian King
Acked-by: Randy Dunlap
Thanks.
> ---
> arch/Kconfig | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff
On 10/23/20 1:45 AM, Xu Yilun wrote:
> This patch adds an API for dfl devices to find which physical device
> owns the DFL.
>
> This patch makes preparation for supporting DFL Ether Group private
> feature driver. It uses this information to determine which retimer
> device physically connects
On Tue, Oct 20, 2020 at 09:40:00AM -0700, Sean Christopherson wrote:
Good morning, I hope the week has gone well for everyone.
> On Tue, Oct 20, 2020 at 05:01:18AM -0500, Dr. Greg wrote:
> >
> > With respect to the security issue at hand, the only relevant issue
> > would seem to be if a page
> +++ b/Documentation/ABI/testing/sysfs-class-net-dfl-eth-group
> @@ -0,0 +1,19 @@
> +What:/sys/class/net//tx_pause_frame_quanta
> +Date:Oct 2020
> +KernelVersion: 5.11
> +Contact: Xu Yilun
> +Description:
> + Read-Write. Value representing
On Sat, Oct 24, 2020 at 03:39:55AM +0300, Laurent Pinchart wrote:
> Hi Sakari
>
> On Wed, Oct 21, 2020 at 01:49:10AM +0300, Sakari Ailus wrote:
> > On Tue, Oct 20, 2020 at 08:56:07PM +0100, Dan Scally wrote:
> > > On 20/10/2020 13:06, Sakari Ailus wrote:
> > > > On Tue, Oct 20, 2020 at 12:19:58PM
On 10/23/20 1:45 AM, Xu Yilun wrote:
> This patch adds the document for DFL Ether Group driver.
>
> Signed-off-by: Xu Yilun
> ---
> .../networking/device_drivers/ethernet/index.rst | 1 +
> .../ethernet/intel/dfl-eth-group.rst | 102
> +
> 2 files
The following changes since commit 270315b8235e3d10c2e360cff56c2f9e0915a252:
Merge tag 'riscv-for-linus-5.10-mw0' of
git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux (2020-10-19 18:18:30
-0700)
are available in the Git repository at:
On Sat, 24 Oct 2020 at 12:34, Topi Miettinen wrote:
>
> On 23.10.2020 20.52, Salvatore Mesoraca wrote:
> > Hi,
> >
> > On Thu, 22 Oct 2020 at 23:24, Topi Miettinen wrote:
> >> SARA looks interesting. What is missing is a prctl() to enable all W^X
> >> protections irrevocably for the current
Dear beneficiary,
I am happy to let you know that we have successfully concluded the
deal two weeks ago. The total funds were successfully transferred to
the new bank account in Venezuela.
You are a good person and I appreciate your efforts and support during
the transactions. I have decided to
On Sat, Oct 24, 2020 at 03:14:07PM +0300, Ioana Ciornei wrote:
> This RFC just contains the patches for phylib and a single driver -
> Atheros. The rest can be found on my Github branch here: TODO
> They will be submitted as a multi-part series once the merge window
> closes.
>
It seems that I
This allows compiling the driver on architectures where the hardware is not
available. Most other mailbox drivers support this as well.
Signed-off-by: Martin Kaiser
---
I used this for testing the trivial patch that removes the duplicate error
message. Also, compiling the driver on x86_64
platform_get_irq_byname already prints an error message if the requested irq
was not found. Don't print another message in the driver.
Signed-off-by: Martin Kaiser
---
drivers/mailbox/stm32-ipcc.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/mailbox/stm32-ipcc.c
Hallo
Mein Name ist George Mike. Ich bin von Beruf Rechtsanwalt. Ich möchte
Ihnen anbieten
der nächste Verwandte meines Klienten. Sie erben die Summe von (8,5
Millionen US-Dollar)
Dollar, die mein Kunde vor seinem Tod auf der Bank gelassen hat.
Mein Kunde ist ein Staatsbürger Ihres Landes, der
ext4_inode_datasync_dirty() needs to return 'true' if the inode is
dirty, 'false' otherwise, but the logic seems to be incorrectly changed
by commit aa75f4d3daae ("ext4: main fast-commit commit path").
This introduces a problem with swap files that are always failing to be
activated, showing this
On 10/23/20 1:45 AM, Xu Yilun wrote:
> This patch makes preparation for supporting DFL Ether Group private
> feature driver, which reads bitstream_id.vendor_net_cfg field to
> determin the interconnection of network components on FPGA device.
>
> Signed-off-by: Xu Yilun
> ---
>
On Fri, Oct 23, 2020 at 02:19:41PM +0200, Christoph Hellwig wrote:
> > diff --git a/drivers/gpu/drm/i915/gt/shmem_utils.c
> > b/drivers/gpu/drm/i915/gt/shmem_utils.c
> > index f011ea42487e..7eb542018219 100644
> > --- a/drivers/gpu/drm/i915/gt/shmem_utils.c
> > +++
On Sat, Oct 24, 2020 at 03:13:37PM +0200, Andrea Righi wrote:
> I'm getting the following error if I try to create and activate a swap
> file defined on an ext4 filesystem:
>
> [ 34.406479] swapon: file is not committed
>
> The swap file is created in the root filesystem (ext4 mounted with
On 24/10/20 12:36 am, Lukas Bulwahn wrote:
>
>
> On Fri, 23 Oct 2020, Aditya Srivastava wrote:
>
>> Presence of hexadecimal address or symbol results in false warning
>> message by checkpatch.pl.
>>
>
> I think this strategy now makes sense and has the right complexity for a
> good heuristics
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