Mickaël Salaün wrote:
> +#include
Something like linux/types.h is probably a better choice.
David
On Thu, Dec 03, 2020 at 07:58:16AM +0800, kernel test robot wrote:
> All warnings (new ones prefixed by >>):
>
>lib/zstd/compress/zstd_double_fast.c: In function
> 'ZSTD_compressBlock_doubleFast_extDict_generic':
> >> lib/zstd/compress/zstd_double_fast.c:501:1: warning: the frame size of
>
Hello Lee,
On Fri, Dec 04, 2020 at 01:24:36PM +, Lee Jones wrote:
> On Fri, 04 Dec 2020, Thierry Reding wrote:
> > Now, I can no longer find a link to the discussion that I recall, so it
> > was either on IRC (where I don't have any logs) or I'm loosing my mind.
>
> Don't worry, you are
The struct ab8500_regulator_platform_data was a leftover
since the days before we probed all regulators from the
device tree. The ab8500-ext regulator was the only used,
defining platform data and register intialization that
was never used for anything, a copy of a boardfile no
longer in use.
The platform data header was only used to pass platform
data from board files. We now populate the regulators
exclusively from device tree, so the header contents can
be moved into the regulator drivers.
Signed-off-by: Linus Walleij
---
drivers/regulator/ab8500-ext.c | 13 ++-
Greg,
On Mon, Nov 23, 2020 at 11:23:13AM +0100, Johan Hovold wrote:
> Instead of using the array-of-pointers trick to avoid having gcc mess up
> the earlycon array stride, specify type alignment when declaring entries
> to prevent gcc from increasing alignment.
>
> This is essentially an
Mickaël Salaün wrote:
> > What would be easiest way to smoke test the changes?
>
> An easy way to test it is to enable the second trusted keyring to
> dynamically load certificates in the kernel. Then we can create a hash
> of a valid certificate (but not loaded yet) and sign it as explained in
Rob,
On Mon, Nov 23, 2020 at 11:23:12AM +0100, Johan Hovold wrote:
> Specify type alignment when declaring linker-section match-table entries
> to prevent gcc from increasing alignment and corrupting the various
> tables with padding (e.g. timers, irqchips, clocks, reserved memory).
>
> This is
On Mon, Nov 16, 2020 at 05:18:20PM +0100, Johan Hovold wrote:
> Unlike other drivers cp210x have been retrieving the current terminal
> settings from the device on open and reflecting those in termios.
>
> Due to how set_termios() was implemented this saved a few control
> requests on open
From: Arnd Bergmann
Compile-testing the DRM_MEDIATEK_HDMI driver shows two missing
dependencies, one results in a link failure:
arm-linux-gnueabi-ld: drivers/phy/mediatek/phy-mtk-hdmi.o: in function
`mtk_hdmi_phy_probe':
phy-mtk-hdmi.c:(.text+0xd8): undefined reference to `__clk_get_name'
On Fri, Dec 04, 2020 at 02:48:26PM +0100, Steen Hegelund wrote:
> On 03.12.2020 22:52, Andrew Lunn wrote:
> > What i have not yet seen is how this code plugs together with
> > phylink_pcs_ops?
> >
> > Can this hardware also be used for SATA, USB? As far as i understand,
> > the Marvell Comphy is
On Fri, Dec 4, 2020 at 2:47 AM Chunfeng Yun wrote:
> > diff --git a/drivers/phy/mediatek/Kconfig b/drivers/phy/mediatek/Kconfig
> > index 65ed26e40c9f..29a85b2738f8 100644
> > --- a/drivers/phy/mediatek/Kconfig
> > +++ b/drivers/phy/mediatek/Kconfig
> > @@ -40,7 +40,9 @@ config PHY_MTK_XSPHY
> >
On Wed, 2 Dec 2020 at 19:51, Marcin Wojtas wrote:
>
> As a preparation for supporting ACPI, modify the driver
> to use the clk framework only when booting with DT -
> otherwise rely on the configuration done by firmware.
> For that purpose introduce also a custom SDHCI get_max_clock
> callback.
>
On 03.12.2020 22:52, Russell King - ARM Linux admin wrote:
EXTERNAL EMAIL: Do not click links or open attachments unless you know the
content is safe
On Thu, Dec 03, 2020 at 10:52:53PM +0100, Andrew Lunn wrote:
> +/* map from SD25G28 interface width to configuration value */
> +static u8
Hello Thierry,
On Fri, Dec 04, 2020 at 01:41:16PM +0100, Thierry Reding wrote:
> On Thu, Dec 03, 2020 at 09:41:42AM +0100, Uwe Kleine-König wrote:
> > Currently .get_state() and .apply() use dev_get_drvdata() on the struct
> > device related to the pwm chip. This only works after .probe() called
On 03.12.2020 22:52, Andrew Lunn wrote:
EXTERNAL EMAIL: Do not click links or open attachments unless you know the
content is safe
+/* map from SD25G28 interface width to configuration value */
+static u8 sd25g28_get_iw_setting(const u8 interface_width)
+{
+ switch (interface_width) {
+
On Fri, 4 Dec 2020 at 14:40, Li, Aubrey wrote:
>
> On 2020/12/4 21:17, Vincent Guittot wrote:
> > On Fri, 4 Dec 2020 at 14:13, Vincent Guittot
> > wrote:
> >>
> >> On Fri, 4 Dec 2020 at 12:30, Mel Gorman
> >> wrote:
> >>>
> >>> On Fri, Dec 04, 2020 at 11:56:36AM +0100, Vincent Guittot wrote:
On 2020/12/4 21:40, Li, Aubrey wrote:
> On 2020/12/4 21:17, Vincent Guittot wrote:
>> On Fri, 4 Dec 2020 at 14:13, Vincent Guittot
>> wrote:
>>>
>>> On Fri, 4 Dec 2020 at 12:30, Mel Gorman wrote:
On Fri, Dec 04, 2020 at 11:56:36AM +0100, Vincent Guittot wrote:
>> The intent was
On Fri, Dec 4, 2020 at 12:38 PM Sudeep Holla wrote:
>
> On Fri, Dec 04, 2020 at 12:17:46AM +0100, Arnd Bergmann wrote:
> > From: Arnd Bergmann
> >
> > Wtihout CONFIG_COMMON_CLK, the scmi driver fails to link:
> >
> > arm-linux-gnueabi-ld: drivers/cpufreq/scmi-cpufreq.o: in function
> >
On Fri, Dec 4, 2020 at 5:11 AM H. Nikolaus Schaller wrote:
>
> Anyways it is debatable if this is a bug at all. It is just a definition.
I respectfully disagree. Prior to the fix, your panel's active-low chip select
needed to be described in the devicetree with 'spi-cs-high'. That sounds
very
095894][T0] CPU: 0 PID: 0 Comm: swapper Not tainted
5.10.0-rc6-next-20201204+ #11
[5.104099][T0] Hardware name: HPE ProLiant DL385 Gen10/ProLiant DL385
Gen10, BIOS A40 07/10/2019
[5.113370][T0] RIP: 0010:__free_one_page+0xa19/0x1140
[5.118864][T0] Code: d2 e9 69 f6 ff ff 0f 0b 48
Hi Arnd,
On Fri, Dec 04, 2020 at 01:49:39PM +0100, Arnd Bergmann wrote:
> On Fri, Dec 4, 2020 at 11:44 AM Jacopo Mondi wrote:
> >
> > Hi Arnd,
> >
> > On Thu, Dec 03, 2020 at 11:38:30PM +0100, Arnd Bergmann wrote:
> > > From: Arnd Bergmann
> > >
> > > When the MMAL code is built-in but the
On Thu, Dec 03, 2020 at 08:01:40PM +0200, Vladimir Oltean wrote:
> On Thu, Dec 03, 2020 at 06:53:20PM +0100, Oleksij Rempel wrote:
> > It is possible to poll it more frequently, but it make no reals sense
> > on this low power devices.
>
> Frankly I thought you understood the implications of
On 2020/12/4 21:17, Vincent Guittot wrote:
> On Fri, 4 Dec 2020 at 14:13, Vincent Guittot
> wrote:
>>
>> On Fri, 4 Dec 2020 at 12:30, Mel Gorman wrote:
>>>
>>> On Fri, Dec 04, 2020 at 11:56:36AM +0100, Vincent Guittot wrote:
> The intent was that the sibling might still be an idle
On Fri, Dec 4, 2020 at 12:03 PM Simon Horman wrote:
>
> I'm slightly curious to know how you configured the kernel to build
> the Netronome NFP driver but not CRC32 but nonetheless I have no
> objection to this change.
I ran into one link error on a randconfig build and then tried an
I am bringing this notice to your attention in respect of the death of
a deceased client of mine that has the same surname with you and his
fund valued at $19.9M to be paid to you.contact me at
cephasagb...@gmail.com for more details.
Yours Sincerely,
Cephas Agbeh,
Attorney At Law.
The table for Unicode upcase conversion requires an order-5 allocation,
which may fail on a highly-fragmented system:
pool-udisksd: page allocation failure: order:5,
mode:0x40dc0(GFP_KERNEL|__GFP_COMP|__GFP_ZERO),
nodemask=(null),cpuset=/,mems_allowed=0
CPU: 4 PID: 3756880 Comm: pool-udisksd
From: Topi Miettinen
> Sent: 04 December 2020 10:58
>
> On 4.12.2020 1.15, David Laight wrote:
> > From: Mike Rapoport
> >> Sent: 03 December 2020 06:58
> >>
> >> On Wed, Dec 02, 2020 at 08:49:06PM +0200, Topi Miettinen wrote:
> >>> On 1.12.2020 23.45, Topi Miettinen wrote:
> Memory mappings
Hi Huang Ying,
Please, see a few fixes below.
Thanks,
Alex
On 12/4/20 10:15 AM, Huang Ying wrote:
> Signed-off-by: "Huang, Ying"
> ---
> man2/set_mempolicy.2 | 14 ++
> 1 file changed, 14 insertions(+)
>
> diff --git a/man2/set_mempolicy.2 b/man2/set_mempolicy.2
> index
On Fri, Dec 04, 2020 at 12:34:05AM +0100, Thomas Gleixner wrote:
> On Thu, Dec 03 2020 at 18:38, Corentin Labbe wrote:
> > On Wed, Dec 02, 2020 at 09:59:36PM +0100, Thomas Gleixner wrote:
> >> On Wed, Dec 02 2020 at 20:55, Corentin Labbe wrote:
> >> > On Tue, Dec 01, 2020 at 04:15:08PM +0100,
On Fri, 04 Dec 2020, Thierry Reding wrote:
> On Thu, Dec 03, 2020 at 09:41:42AM +0100, Uwe Kleine-König wrote:
> > Currently .get_state() and .apply() use dev_get_drvdata() on the struct
> > device related to the pwm chip. This only works after .probe() called
> > platform_set_drvdata() which in
Dear Wim, dear Daniel,
First, thank you for including all parties in the discussion.
Am 04.12.20 um 13:52 schrieb Wim Vervoorn:
I agree with you. Using an existing standard is better than inventing
a new one in this case. I think using the coreboot logging is a good
idea as there is indeed a
On Fri, 4 Dec 2020 at 14:13, Vincent Guittot wrote:
>
> On Fri, 4 Dec 2020 at 12:30, Mel Gorman wrote:
> >
> > On Fri, Dec 04, 2020 at 11:56:36AM +0100, Vincent Guittot wrote:
> > > > The intent was that the sibling might still be an idle candidate. In
> > > > the current draft of the series, I
On Fri, Dec 04, 2020 at 12:07:55PM +0200, Georgi Djakov wrote:
> Hello Greg,
>
> This is the pull request with the interconnect changes for the 5.11-rc1
> merge window. The highlight is a new driver for Samsung Exynos SoCs.
>
> Patches have been in linux-next without any reported issues. Please
VIRTIO itself has no dependencies and therefore can easily be just
select'ed, instead of depending on it. The current depends on causes
any others trying to select VIRTIO to fail like this:
drivers/gpu/drm/Kconfig:74:error: recursive dependency detected!
drivers/gpu/drm/Kconfig:74: symbol
On Fri, 4 Dec 2020 at 12:30, Mel Gorman wrote:
>
> On Fri, Dec 04, 2020 at 11:56:36AM +0100, Vincent Guittot wrote:
> > > The intent was that the sibling might still be an idle candidate. In
> > > the current draft of the series, I do not even clear this so that the
> > > SMT sibling is
On 12/2/20 4:09 PM, Hans Verkuil wrote:
> On 09/11/2020 18:35, Stanimir Varbanov wrote:
>> Make display delay and display delay enable MFC controls standard v4l
>> controls. This will allow reuse of the controls for other decoder
>> drivers. Also the new proposed controls are now codec agnostic
Hello Julius,
I agree with you. Using an existing standard is better than inventing a new one
in this case. I think using the coreboot logging is a good idea as there is
indeed a lot of support already available and it is lightweight and simple.
Best Regards,
Wim Vervoorn
Eltan B.V.
This driver was merged in the early days of device tree
on Arm in 2012 and somehow we failed to provide bindings
for it. Fix it up with some YAML bindings.
Cc: devicet...@vger.kernel.org
Signed-off-by: Linus Walleij
---
.../bindings/mfd/stericsson,db8500-prcmu.yaml | 282 ++
1
On Fri, 2020-12-04 at 08:05 +, Roberto Sassu wrote:
> > From: Mimi Zohar [mailto:zo...@linux.ibm.com]
> > Sent: Thursday, December 3, 2020 9:43 PM
> > Hi Roberto,
> >
> > On Wed, 2020-11-11 at 10:22 +0100, Roberto Sassu wrote:
> > > When a file is being created, LSMs can set the initial label
On 04.12.20 12:54, Lee Bruce wrote:
> From 810f69c5438c66aafccf18ba8f43b99b64b85237 Mon Sep 17 00:00:00 2001
> From: Stephen Zhang mailto:starzhang...@gmail.com>>
> Date: Fri, 4 Dec 2020 16:32:38 +0800
> Subject: [PATCH] mm: migrate: remove unused parameter in
> migrate_vma_insert_page()
>
>
On Thu, Dec 03 2020 at 18:36, Jason Gunthorpe wrote:
> On Thu, Dec 03, 2020 at 10:31:02PM +0100, Thomas Gleixner wrote:
>> On Thu, Dec 03 2020 at 22:05, Thomas Gleixner wrote:
>> > On Thu, Dec 03 2020 at 12:16, Jason Gunthorpe wrote:
>> > So now we have two options to fix this:
>> >
>> >1) Use
On Fri, Dec 04, 2020 at 01:18:05PM +0300, Sergey Temerkhanov wrote:
> Avoid race condition at shutdown by shutting downn the TPM 2.0
> devices synchronously. This eliminates the condition when the
> shutdown sequence sets chip->ops to NULL leading to the following:
>
> [ 1586.593561][ T8669]
On Fri, Dec 04, 2020 at 02:32:07PM +0200, Leon Romanovsky wrote:
> On Fri, Dec 04, 2020 at 12:42:46PM +0100, Greg KH wrote:
> > On Wed, Dec 02, 2020 at 04:54:24PM -0800, Dan Williams wrote:
> > > From: Dave Ertman
> > >
> > > Add support for the Auxiliary Bus, auxiliary_device and
> I have not yet received a report of the same issue.
> But I agree that this problem is likely to occur even if it is low
> probability.
Perhaps I should clarify my setup a little bit more.
The issue can be reliably reproduced on my laptop. It has 8 GBs of RAM
(pretty common amount nowadays) and
When we free a page whose order is very close to MAX_ORDER and greater
than pageblock_order, it wastes some CPU cycles to increase max_order
to MAX_ORDER one by one and check the pageblock migratetype of that page
repeatedly especially when MAX_ORDER is much larger than pageblock_order.
On Fri, Dec 04, 2020 at 01:35:05PM +0100, Greg KH wrote:
> On Wed, Dec 02, 2020 at 04:54:24PM -0800, Dan Williams wrote:
> > From: Dave Ertman
> >
> > Add support for the Auxiliary Bus, auxiliary_device and auxiliary_driver.
> > It enables drivers to create an auxiliary_device and bind an
> >
On Thu, Dec 03, 2020 at 12:02:10PM +0800, Jiaxun Yang wrote:
>
>
> 在 2020/12/2 下午6:39, Thomas Bogendoerfer 写道:
> > On Wed, Dec 02, 2020 at 11:00:05AM +0800, Jinyang He wrote:
> > > Reading synci_step by using rdhwr instruction may return zero if no cache
> > > need be synchronized. On the one
BD71828 and BD71827 charger blocks have some minor differencies.
Use own name for BD71828 so that charger driver can differentiate
these by device-id.
Signed-off-by: Matti Vaittinen
---
This patch is also provided in this RFC version only for the sake
of the completeness.
On 12/4/20 2:49 AM, Andrew Lunn wrote:
static const struct of_device_id gswip_of_match[] = {
{ .compatible = "lantiq,xrx200-gswip", .data = _xrx200 },
+ { .compatible = "lantiq,xrx300-gswip", .data = _xrx300 },
+ { .compatible = "lantiq,xrx330-gswip", .data = _xrx300 },
Add charger driver for ROHM BD718(27/28/78) PMIC charger block.
Driver utilizes the swgauge for battery status / current polling,
CC correction and SOC estimation.
A version of driver which does not utilize swgauge can be seen
in ROHM venor specific Linux tree - comparison can visualize how
On Thu, Dec 03, 2020 at 10:59:59AM -0800, Sowjanya Komatineni wrote:
> Some CSI2 receivers support 8 data lanes.
>
> So, this patch updates CSI2 maximum data lanes to be 8.
>
> Signed-off-by: Sowjanya Komatineni
Acked-by: Sakari Ailus
--
Sakari Ailus
On Thu, Dec 03, 2020 at 11:00:00AM -0800, Sowjanya Komatineni wrote:
> Tegra VI/CSI hardware don't have native 8 lane CSI RX port.
>
> But x8 capture can be supported by using consecutive x4 ports
> simultaneously with HDMI-to-CSI bridges where source image is split
> on to two x4 ports.
>
>
On Fri, Dec 4, 2020 at 11:44 AM Jacopo Mondi wrote:
>
> Hi Arnd,
>
> On Thu, Dec 03, 2020 at 11:38:30PM +0100, Arnd Bergmann wrote:
> > From: Arnd Bergmann
> >
> > When the MMAL code is built-in but the vchiq core config is
> > set to =m, the mmal code never gets built, which in turn can
> >
Add BD71827 driver header. For a record - Header is originally
based on work authored by Cong Pham although not much of original
work is left now.
Signed-off-by: Matti Vaittinen
---
This patch was not in v1. This brings in some charger registers
for the BD71827 charger which is in following
Add definitions for ROHM BD718(27/28/78) PMIC's charger blocks.
Signed-off-by: Matti Vaittinen
---
This patch was not in v1. This brings in some charger registers
for the BD71828 charger driver which is in following patches. Patch
split here reflects the subsystem change (for non RFC submitted
Add generic 'sw gauge' helper for performing iterative SOC estimation
and coulomb counter correction for devices with a (drifting) coulomb
counter. This should allow few charger/fuel-gauge drivers to use generic
loop instead of implementing their own.
Charger/fuel-gauge drivers can register
On Thu, Dec 03, 2020 at 09:41:42AM +0100, Uwe Kleine-König wrote:
> Currently .get_state() and .apply() use dev_get_drvdata() on the struct
> device related to the pwm chip. This only works after .probe() called
> platform_set_drvdata() which in this driver happens only after
> pwmchip_add() and
> From: Leon Romanovsky
> Sent: Friday, December 4, 2020 6:02 PM
>
> On Fri, Dec 04, 2020 at 12:42:46PM +0100, Greg KH wrote:
> > On Wed, Dec 02, 2020 at 04:54:24PM -0800, Dan Williams wrote:
> > > From: Dave Ertman
> > >
> > > Add support for the Auxiliary Bus, auxiliary_device and
The power-supply core supports concept of OCV (Open Circuit Voltage) =>
SOC (State Of Charge) conversion tables. Usually these tables are used
to estimate SOC based on OCV. Some systems use so called "Zero Adjust"
where at the near end-of-battery condition the SOC from coulomb counter
is used to
Sorry again folks - I picked you as recipients just because I assumed
you could have something to say in here. Again, please let me know
if you wish to be dropped from CC if this gets any further.
power: supply: add sw-gauge for SOC estimation and CC correction
This RFC has still not been
On Fri, Dec 04, 2020 at 10:03:43AM +0100, Linus Walleij wrote:
On Wed, Nov 25, 2020 at 2:03 PM Coiby Xu wrote:
Debounce filter setting should be independent from IRQ type setting
because according to the ACPI specs, there are separate arguments for
specifying debounce timeout and IRQ type in
On Wed, Nov 25, 2020 at 03:24:20PM +0200, Andy Shevchenko wrote:
On Wed, Nov 25, 2020 at 3:03 PM Coiby Xu wrote:
Debounce filter setting should be independent from IRQ type setting
because according to the ACPI specs, there are separate arguments for
specifying debounce timeout and IRQ type
should probably fix the patch
that does the move, otherwise we'll have a build-broken kernel still.
> I got this build error in todays next-20201204.
> Andrew, since both patches are in your -mm tree, I think this can be
> folded into 4c4c75881536 ("arm64, kfence: enable KFENCE for AR
Add support for SAMA7G5 10/100Mbps interface.
Signed-off-by: Claudiu Beznea
---
drivers/net/ethernet/cadence/macb_main.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/net/ethernet/cadence/macb_main.c
b/drivers/net/ethernet/cadence/macb_main.c
index
Add support for SAMA7G5 gigabit ethernet interface.
Signed-off-by: Claudiu Beznea
---
drivers/net/ethernet/cadence/macb_main.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/net/ethernet/cadence/macb_main.c
b/drivers/net/ethernet/cadence/macb_main.c
index
On Thu, Dec 03, 2020 at 01:39:42PM +0200, Maxim Levitsky wrote:
> On Tue, 2020-12-01 at 16:48 -0300, Marcelo Tosatti wrote:
> > On Tue, Dec 01, 2020 at 02:30:39PM +0200, Maxim Levitsky wrote:
> > > On Mon, 2020-11-30 at 16:16 -0300, Marcelo Tosatti wrote:
> > > > Hi Maxim,
> > > >
> > > > On
SAMA7G5's ethernet IPs TX clock could be provided by its generic clock or
by the external clock provided by the PHY. The internal IP logic divides
properly this clock depending on the link speed. The patch adds a new
capability so that macb_set_tx_clock() to not be called for IPs having
this
Unprepare clocks in case of any failure in fu540_c000_clk_init().
Fixes: c218ad559020 ("macb: Add support for SiFive FU540-C000")
Signed-off-by: Claudiu Beznea
---
drivers/net/ethernet/cadence/macb_main.c | 27 +--
1 file changed, 21 insertions(+), 6 deletions(-)
diff
Add documentation for SAMA7G5 gigabit ethernet interface.
Signed-off-by: Claudiu Beznea
---
Documentation/devicetree/bindings/net/macb.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/net/macb.txt
b/Documentation/devicetree/bindings/net/macb.txt
index
This is necessary for SAMA7G5 as it uses different values for
PHY interface and also introduces hdfctlen bit.
Signed-off-by: Claudiu Beznea
---
drivers/net/ethernet/cadence/macb.h | 10 ++
drivers/net/ethernet/cadence/macb_main.c | 28
2 files changed,
Add documentation for SAMA7G5 ethernet interface.
Signed-off-by: Claudiu Beznea
---
Documentation/devicetree/bindings/net/macb.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/net/macb.txt
b/Documentation/devicetree/bindings/net/macb.txt
index
Hi,
This series adds support for SAMA7G5 Ethernet interfaces: one 10/100Mbps
and one 1Gbps interfaces.
Along with it I also included a fix to disable clocks for SiFive FU540-C000
on failure path of fu540_c000_clk_init().
Thank you,
Claudiu Beznea
Claudiu Beznea (7):
net: macb: add userio
On Wed, Dec 02, 2020 at 04:54:24PM -0800, Dan Williams wrote:
> From: Dave Ertman
>
> Add support for the Auxiliary Bus, auxiliary_device and auxiliary_driver.
> It enables drivers to create an auxiliary_device and bind an
> auxiliary_driver to it.
>
> The bus supports probe/remove shutdown and
On Fri, Dec 04, 2020 at 12:42:46PM +0100, Greg KH wrote:
> On Wed, Dec 02, 2020 at 04:54:24PM -0800, Dan Williams wrote:
> > From: Dave Ertman
> >
> > Add support for the Auxiliary Bus, auxiliary_device and auxiliary_driver.
> > It enables drivers to create an auxiliary_device and bind an
> >
> actually enabled")
> and 4c4c75881536 ("arm64, kfence: enable KFENCE for ARM64") went in the
> same day via different trees.
>
> Signed-off-by: Anders Roxell
Reviewed-by: Alexander Potapenko
Thanks!
> ---
>
> I got this build error in todays next-20201204.
On Wed, Dec 02, 2020 at 11:17:18AM -0800, Sowjanya Komatineni wrote:
> On 12/2/20 9:27 AM, Mark Brown wrote:
> > On Tue, Dec 01, 2020 at 01:12:44PM -0800, Sowjanya Komatineni wrote:
[...]
> > > +static int tegra_qspi_setup(struct spi_device *spi)
> > > +{
> > > + if (cdata &&
Em Fri, Dec 04, 2020 at 12:08:36AM +0100, Jiri Olsa escreveu:
> We're missing -lcap in test-all.bin target, so in case it's
> the only library missing (if more are missing test-all.bin
> fails anyway), we will falsely claim that we detected it and
> fail build, like:
Thanks, applied.
- Arnaldo
Document SATA support for the RZ/G2H, no driver change required.
Signed-off-by: Lad Prabhakar
Reviewed-by: Marian-Cristian Rotariu
Acked-by: Rob Herring
Reviewed-by: Geert Uytterhoeven
---
Hi All,
This patch is part of series [1] (original patch [2]) where rest of the
patches have been
On Fri, Dec 04, 2020 at 07:43:48AM +0100, Thorsten Leemhuis wrote:
> Add the full text of the CC-BY-4.0 license to the kernel tree as well as
> the required tags for reference and tooling.
>
> The license text was copied directly from the following url, but for
> clarification a 'Creative
>-Original Message-
>From: Arnd Bergmann
>Sent: Friday, December 4, 2020 12:37 AM
[...]
>Subject: [PATCH] enetc: fix build warning
>
>From: Arnd Bergmann
>
>When CONFIG_OF is disabled, there is a harmless warning about
>an unused variable:
>
>enetc_pf.c: In function
via different trees.
Signed-off-by: Anders Roxell
---
I got this build error in todays next-20201204.
Andrew, since both patches are in your -mm tree, I think this can be
folded into 4c4c75881536 ("arm64, kfence: enable KFENCE for ARM64")
arch/arm64/include/asm/kfence.h | 2 +-
1 f
On Wed, Dec 02, 2020 at 05:27:21PM +, Mark Brown wrote:
> On Tue, Dec 01, 2020 at 01:12:44PM -0800, Sowjanya Komatineni wrote:
> > Tegra SoC has a Quad SPI controller starting from Tegra210.
> >
> > This patch adds support for Tegra210 QSPI controller.
>
> This looks pretty clean but I've
-randconfig-r016-20201204 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project
32c501dd88b62787d3a5ffda7aabcf4650dbe3cd)
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
On Thu, Dec 03, 2020 at 11:19:03AM +0800, Tiezhu Yang wrote:
> In order to get more memblock configuration with memblock=debug in the boot
> cmdline, move memblock_dump_all() to the end of setup_arch(), this can help
> us to get dmi_setup() and resource_init() memblock info, at least for now.
>
>
On Tue, Dec 01, 2020 at 01:12:44PM -0800, Sowjanya Komatineni wrote:
> Tegra SoC has a Quad SPI controller starting from Tegra210.
>
> This patch adds support for Tegra210 QSPI controller.
>
> Signed-off-by: Sowjanya Komatineni
> ---
> drivers/spi/Kconfig |9 +
> drivers/spi/Makefile
On Thu, Dec 03, 2020 at 11:58:51AM +0800, Jiaxun Yang wrote:
>
>
> 在 2020/12/3 上午11:19, Tiezhu Yang 写道:
> > In the current code, CONFIG_ARCH_KEEP_MEMBLOCK is not set for MIPS arch,
> > memblock_discard() will discard memory and reserved arrays if they were
> > allocated, select
On Tue, Dec 01, 2020 at 10:29:20PM +, Andrey Zhizhikin wrote:
> Commit 7ecdea4a0226 ("backlight: generic_bl: Remove this driver as it is
> unused") removed geenric_bl driver from the tree, together with
> corresponding config option.
>
> Remove BACKLIGHT_GENERIC config item from all MIPS
On Thu, Dec 03, 2020 at 03:22:51PM +0800, Xingxing Su wrote:
> Enable gcov profiling of the entire kernel on mips. Required changes
> include disabling profiling for:
>
> * arch/kernel/boot/compressed: not linked to main kernel.
>
> Lightly tested on Loongson 3A3000 an 3A4000, seems to work as
On Thu, Dec 03, 2020 at 01:36:49PM +0100, Alexander A Sverdlin wrote:
> From: Alexander Sverdlin
>
> Because check_kernel_sections_mem() does exactly this for all platforms.
>
> Signed-off-by: Alexander Sverdlin
> ---
> arch/mips/cavium-octeon/setup.c | 9 -
> 1 file changed, 9
On Thu, Dec 03, 2020 at 02:54:43PM +0800, Wei Li wrote:
> Currently we won't migrate irqs when offline CPUs, which has been
> implemented on most architectures. That will lead to some devices work
> incorrectly if the bound cores are offline.
>
> While that can be easily supported by enabling
On Thu, Dec 03, 2020 at 01:36:48PM +0100, Alexander A Sverdlin wrote:
> From: Alexander Sverdlin
>
> Linux doesn't own the memory immediately after the kernel image. On Octeon
> bootloader places a shared structure right close after the kernel _end,
> refer to "struct cvmx_bootinfo
On 4 Dec 2020, at 12:43, Wang Hai wrote:
Fix to return a negative error code from the error handling
case instead of 0, as done elsewhere in this function.
Changing 'return start' to 'return action_start' can fix this bug.
Fixes: 69929d4c49e1 ("net: openvswitch: fix TTL decrement action
On Fri, 2020-12-04 at 18:22 +0800, qiang.zh...@windriver.com wrote:
> From: Zqiang
>
> When a CPU offline, the per-cpu quarantine's offline be set true,
> after this, if the quarantine_put be called in this CPU, the objects
> will be free and return false, free objects doesn't to be done, due
>
On 03.12.2020 23:49, Andrew Morton wrote:
> On Thu, 3 Dec 2020 22:50:27 +0300 Alexander Popov
> wrote:
>
>> On 30.09.2020 15:50, Alexander Potapenko wrote:
>>> On Tue, Sep 29, 2020 at 8:35 PM Alexander Popov
>>> wrote:
Currently in CONFIG_SLAB init_on_free happens too late, and heap
kernel test robot wrote:
> FYI, we noticed a -4.8% regression of will-it-scale.per_process_ops due to
> commit:
>
>
> commit: 9bd0e337c633aed3e8ec3c7397b7ae0b8436f163 ("[PATCH 01/29] iov_iter:
> Switch to using a table of operations")
Out of interest, would it be possible for you to run
Linus Torvalds wrote:
> > FYI, we noticed a -4.8% regression of will-it-scale.per_process_ops due to
> > commit:
>
> Ok, I guess that's bigger than expected,
Note that it appears to be testing just the first patch and not the whole
series:
| commit: 9bd0e337c633aed3e8ec3c7397b7ae0b8436f163
On 03/12/2020 15:39, Jiri Olsa wrote:
+
On Thu, Nov 26, 2020 at 04:13:16PM +0200, James Clark wrote:
Changes since v5:
* Fix test for cpu_map__get_die() by shifting id before testing.
* Fix test for cpu_map__get_socket() by not using cpu_map__id_to_socket()
which is only valid in
From: Greg Kroah-Hartman
For some reason, the original aux bus patch had some really long lines
in a few places, probably due to it being a very long-lived patch in
development by many different people. Fix that up so that the two files
all have the same length lines and function formatting
On Fri, Dec 04, 2020 at 12:44:24PM +0100, Greg KH wrote:
> From: Greg Kroah-Hartman
>
> For some reason, the original aux bus patch had some really long lines
> in a few places, probably due to it being a very long-lived patch in
> development by many different people. Fix that up so that the
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