Before, when reading/writing the hysteresis of als, incli-3d, press, and
rotation sensor, we will get invalid argument error.
This patch add more sensitivity data fields for these sensors, so that
these sensors can get sensitivity index and return correct hysteresis
value.
Signed-off-by: Ye
On Sun, Jan 31, 2021 at 02:01:43PM -0800, Linus Torvalds wrote:
> Things look a little calmer than last week, and over-all very average
> for rc6. So - like always this late in the release schedule - I'd
> certainly have liked things to be even calmer, but nothing here really
> stands out.
>
>
No functional change has been made with this patch. The main intent here
is to reduce code repetition of getting sensitivity attribute.
In the current implementation, sensor_hub_input_get_attribute_info() is
called from multiple drivers to get attribute info for sensitivity
field. Moving this to
Incorrect mask for the "bus_prot_clr" field meant that imgtec
gpu power domain (mfg_async) was not powered up correctly, causing
failure in driver booting. Fixing this and also adding "domain_suuply"
capability to "mfg_async" power domain (for mt8173) as imgtec gpu
needs da9211 regulator to be
The mfg_async power domain in mt8173 is used to power up imgtec
gpu. This domain requires the da9211 regulator to be enabled before
the power domain can be enabled successfully.
Signed-off-by: Bilal Wasim
---
drivers/soc/mediatek/mt8173-pm-domains.h | 1 +
1 file changed, 1 insertion(+)
diff
When "bus_prot_reg_update" is false, the driver should use
INFRA_TOPAXI_PROTECTEN for both setting and clearing the bus
protection. However, the driver does not use this mask for
clearing bus protection which causes failure when booting
the imgtec gpu.
Corrected and tested with mt8173 chromebook.
On 2021/1/28 下午10:41, Stefano Garzarella wrote:
In some cases, it may be useful to provide a way to skip a number
of bytes in a vringh_kiov.
Let's implement vringh_kiov_advance() for this purpose, reusing the
code from vringh_iov_xfer().
We replace that code calling the new
This patch adds description for UIO support for dfl devices on DFL
bus.
Signed-off-by: Xu Yilun
Reviewed-by: Tom Rix
---
v2: no doc in v1, add it for v2.
v3: some documentation fixes.
v4: documentation change since the driver matching is changed.
v5: no change.
v6: improve the title of the
On 1/31/21 9:11 PM, Kyle Tso wrote:
> On Mon, Feb 1, 2021 at 12:02 AM Guenter Roeck wrote:
>>
>> On 1/31/21 7:18 AM, Kyle Tso wrote:
>>> Commit a079973f462a ("usb: typec: tcpm: Remove tcpc_config
>>> configuration mechanism") removed the tcpc_config which includes the
>>> Sink VDO and it is not
This patch supports the DFL drivers be written in userspace. This is
realized by exposing the userspace I/O device interfaces.
The driver now only binds the ether group feature, which has no irq. So
the irq support is not implemented yet.
Signed-off-by: Xu Yilun
---
v9: switch to add a uio
From: Christina Jacob
Add ethtool support to configure fec modes baser/rs and
support to fecth FEC stats from CGX as well PHY.
Configure fec mode
- ethtool --set-fec eth0 encoding rs/baser/off/auto
Query fec mode
- ethtool --show-fec eth0
Signed-off-by: Christina Jacob
From: Christina Jacob
Register get_link_ksettings callback to get link status information
from the driver. As virtual function (vf) shares same physical link
same API is used for both the drivers and for loop back drivers
simply returns the fixed values as its does not have physical link.
Hi Barry,
I love your patch! Perhaps something to improve:
[auto build test WARNING on tip/sched/core]
[also build test WARNING on next-20210125]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
On Fri, 2021-01-29 at 20:45 +0900, Tomasz Figa wrote:
> On Mon, Jan 25, 2021 at 4:34 PM Yong Wu wrote:
> >
> > On Mon, 2021-01-25 at 13:18 +0900, Tomasz Figa wrote:
> > > On Wed, Jan 20, 2021 at 4:08 PM Yong Wu wrote:
> > > >
> > > > On Wed, 2021-01-20 at 13:15 +0900, Tomasz Figa wrote:
> > > >
From: Christina Jacob
Register set_link_ksetting callback with driver such that
link configurations parameters like advertised mode,speed, duplex
and autoneg can be configured.
below command
ethtool -s eth0 advertise 0x1 speed 10 duplex full autoneg on
Signed-off-by: Christina Jacob
Hi Paolo,
On 2021/1/27 14:04, Like Xu wrote:
On 2021/1/26 17:42, Paolo Bonzini wrote:
On 08/01/21 02:36, Like Xu wrote:
@@ -401,6 +398,9 @@ static void intel_pmu_init(struct kvm_vcpu *vcpu)
pmu->fixed_counters[i].idx = i + INTEL_PMC_IDX_FIXED;
Checkpatch gives following warning for new patches, and the new patches
normally follow the existing standards for such stuff. Lets fix it
properly.
WARNING: ENOTSUPP is not a SUSV4 error code, prefer EOPNOTSUPP.
Signed-off-by: Viresh Kumar
---
include/linux/pm_opp.h | 64
Fix checkpatch warning:
ERROR: "foo * bar" should be "foo *bar".
Signed-off-by: Viresh Kumar
---
include/linux/pm_opp.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/linux/pm_opp.h b/include/linux/pm_opp.h
index 25e47ab937b9..c6c7d73eb015 100644
---
Hello,
syzbot found the following issue on:
HEAD commit:bec4c296 Merge tag 'ecryptfs-5.11-rc6-setxattr-fix' of git..
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=11991778d0
kernel config: https://syzkaller.appspot.com/x/.config?x=f75d66d6d359ef2f
The following changes since commit 5c8fe583cce542aa0b84adc939ce85293de36e5e:
Linux 5.11-rc1 (2020-12-27 15:30:22 -0800)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone.git
tags/keystone_dts_for_5.12
for you to fetch changes up
On Thu, Jan 14, 2021 at 01:00:49PM -0500, Mike Snitzer wrote:
> On Tue, Dec 29 2020 at 3:55am -0500,
> Satya Tangirala wrote:
>
> > Update the device-mapper core to support exposing the inline crypto
> > support of the underlying device(s) through the device-mapper device.
> >
> > This works
The vPMU uses GUEST_LBR_IN_USE_IDX (bit 58) in 'pmu->pmc_in_use' to
indicate whether a guest LBR event is still needed by the vcpu. If the
vcpu no longer accesses LBR related registers within a scheduling time
slice, and the enable bit of LBR has been unset, vPMU will treat the
guest LBR event as
In addition to DEBUGCTLMSR_LBR, any KVM trap caused by LBR msrs access
will result in a creation of guest LBR event per-vcpu.
If the guest LBR event is scheduled on with the corresponding vcpu context,
KVM will pass-through all LBR records msrs to the guest. The LBR callstack
mechanism
When vcpu sets DEBUGCTLMSR_LBR in the MSR_IA32_DEBUGCTLMSR, the KVM handler
would create a guest LBR event which enables the callstack mode and none of
hardware counter is assigned. The host perf would schedule and enable this
event as usual but in an exclusive way.
The guest LBR event will be
When the DEBUGCTLMSR_LBR bit 0 is set, the processor records a running
trace of the most recent branches, interrupts, and/or exceptions taken
by the processor (prior to a debug exception being generated) in the
last branch record (LBR) stack.
Adding vcpu_supported_debugctl() to throw #GP for
Usespace could set the bits [0, 5] of the IA32_PERF_CAPABILITIES
MSR which tells about the record format stored in the LBR records.
The LBR will be enabled on the guest if host perf supports LBR
(checked via x86_perf_get_lbr()) and the vcpu model is compatible
with the host one.
Signed-off-by:
On Intel platforms, KVM userspace will be able to configure
MSR_IA32_PERF_CAPABILITIES to adjust the visibility of guest
PMU features for vPMU-enabled guests.
Once MSR_IA32_PERF_CAPABILITIES is changed via vmx_set_msr(),
the adjustment in intel_pmu_refresh() will be triggered. To
ensure that the
Hi geniuses,
Please help review this new version which enables the guest LBR.
We already upstreamed the guest LBR support in the host perf, please
check more details in each commit and feel free to test and comment.
QEMU part:
To make code responsibilities clear, we may resue and invoke the
vmx_set_intercept_for_msr() in other vmx-specific files (e.g. pmu_intel.c),
so expose it to passthrough LBR msrs later.
Signed-off-by: Like Xu
Reviewed-by: Andi Kleen
---
arch/x86/kvm/vmx/vmx.c | 2 +-
arch/x86/kvm/vmx/vmx.h | 2
Hi Avri,
> + list_for_each_entry_safe(rgn, next_rgn, _info->lh_lru_rgn,
> + list_lru_rgn)
How about replace list_for_each_entry_safe to list_for_each_entry?
Thanks,
Daejun
On Mon, Feb 1, 2021 at 12:02 AM Guenter Roeck wrote:
>
> On 1/31/21 7:18 AM, Kyle Tso wrote:
> > Commit a079973f462a ("usb: typec: tcpm: Remove tcpc_config
> > configuration mechanism") removed the tcpc_config which includes the
> > Sink VDO and it is not yet added back with fwnode. Add it now.
>
Now that device mapper supports inline encryption, add the ability to
evict keys from all underlying devices. When an upper layer requests
a key eviction, we simply iterate through all underlying devices
and evict that key from each device.
Co-developed-by: Eric Biggers
Signed-off-by: Eric
Update the device-mapper core to support exposing the inline crypto
support of the underlying device(s) through the device-mapper device.
This works by creating a "passthrough keyslot manager" for the dm
device, which declares support for encryption settings which all
underlying devices support.
dm-linear and dm-flakey obviously can pass through inline crypto support.
Co-developed-by: Eric Biggers
Signed-off-by: Eric Biggers
Signed-off-by: Satya Tangirala
---
drivers/md/dm-flakey.c | 4 +++-
drivers/md/dm-linear.c | 5 +++--
2 files changed, 6 insertions(+), 3 deletions(-)
diff
Introduce blk_ksm_update_capabilities() to update the capabilities of
a keyslot manager (ksm) in-place. The pointer to a ksm in a device's
request queue may not be easily replaced, because upper layers like
the filesystem might access it (e.g. for programming keys/checking
capabilities) at the
The device mapper may map over devices that have inline encryption
capabilities, and to make use of those capabilities, the DM device must
itself advertise those inline encryption capabilities. One way to do this
would be to have the DM device set up a keyslot manager with a
"sufficiently large"
This patch series adds support for inline encryption to the device mapper.
Patch 1 introduces the "passthrough" keyslot manager.
The regular keyslot manager is designed for inline encryption hardware that
have only a small fixed number of keyslots. A DM device itself does not
actually have only
Hi Jens,
On Fri, 29 Jan 2021 at 18:59, Jens Wiklander wrote:
>
> Hi Rouven and Sumit,
>
> On Mon, Jan 25, 2021 at 10:58 AM Jens Wiklander via OP-TEE
> wrote:
> >
> > Hi Rouven and Sumit,
> >
> > On Mon, Jan 25, 2021 at 10:55 AM Jens Wiklander
> > wrote:
> > >
> > > Testing need_resched()
On Mon, Feb 1, 2021 at 7:48 AM Jiri Olsa wrote:
>
> On Fri, Jan 29, 2021 at 02:49:00PM +0900, Namhyung Kim wrote:
> > To synthesize information to resolve sample IPs, it needs to scan task
> > and mmap info from the /proc filesystem. For each process, it
> > opens (and reads) status and maps
On Fri, Jan 29, 2021 at 03:38:52PM +0100, Paolo Bonzini wrote:
> On 29/01/21 13:17, Yang Weijiang wrote:
> > > > It's specific to VM case, during VM reboot, memory mode reset but
> > > > VM_ENTRY_LOAD_CET_STATE
> > > > is still set, and VMCS contains stale GUEST_SSP, this hits vm-entry
> > > >
On Mon, Feb 1, 2021 at 8:00 AM Jiri Olsa wrote:
>
> On Fri, Jan 29, 2021 at 02:48:59PM +0900, Namhyung Kim wrote:
> > To save memory usage, it needs to reduce number of entries in the proc
> > filesystem. It's using /proc//task directory to traverse threads
> > in the process and then kernel
On Mon, Jan 25, 2021 at 09:42:21PM -0600, Frank Rowand wrote:
> Hi David,
>
> On 1/22/21 12:34 AM, David Gibson wrote:
> > On Wed, Jan 20, 2021 at 10:47:40AM +0530, Viresh Kumar wrote:
> >> +David.
> >>
> >> On 19-01-21, 11:12, Frank Rowand wrote:
> >>> On 1/12/21 2:28 AM, Viresh Kumar wrote:
>
On 2/1/21 2:04 AM, Paweł Chmiel wrote:
> This clock must be always enabled to allow access to any registers in
> fsys1 CMU. Until proper solution based on runtime PM is applied
> (similar to what was done for Exynos5433), fix this by calling
> clk_prepare_enable() directly from clock provider
Hi Jiri,
On Mon, Feb 1, 2021 at 7:35 AM Jiri Olsa wrote:
>
> On Fri, Jan 29, 2021 at 02:48:58PM +0900, Namhyung Kim wrote:
> > Hello,
> >
> > This is to optimize the event synthesis during perf record.
> >
> > The first patch is to reduce memory usage when many threads are used.
> > The second
On Sun, 31 Jan 2021 20:46:40 +0200
Max Gurtovoy wrote:
> On 1/28/2021 11:02 PM, Alex Williamson wrote:
> > On Thu, 28 Jan 2021 17:29:30 +0100
> > Cornelia Huck wrote:
> >
> >> On Tue, 26 Jan 2021 15:27:43 +0200
> >> Max Gurtovoy wrote:
> >>> On 1/26/2021 5:34 AM, Alex Williamson wrote:
>
From: Jie Li
Some devices use 255 as default value of Interrupt Line register, and this
maybe causes pdev->irq is set as IRQ_NOTCONNECTED in some scenarios. For
example, NVMe controller connects to Intel Volume Management Device (VMD).
In this situation, IRQ_NOTCONNECTED means INTx line is not
Hi Avri,
> + /*
> + * in host control mode, verify that the exiting region
> + * has less reads
> + */
> + if (ufshpb_mode == HPB_HOST_CONTROL &&
> + atomic64_read(>reads) > (EVICTION_THRSHLD >> 1))
Why we use shifted
On Friday, January 29, 2021 9:17 AM, Takashi Iwai wrote:
> On Fri, 29 Jan 2021 17:12:08 +0100,
> Michael Catanzaro wrote:
>
> > On Fri, Jan 29, 2021 at 9:30 am, Michael Catanzaro
> > mcatanz...@redhat.com wrote:
> >
> > > OK, I found "ALSA: hda/via: Apply the workaround generically for
> > >
Hi Avri,
Thanks for adding HCM support on HPB.
I have some opinion for this patch.
> +#define WORK_PENDING 0
> +#define ACTIVATION_THRSHLD 4 /* 4 IOs */
Rather than fixing it with macro, how about using sysfs and make it
configurable?
> @@ -306,12 +325,39 @@ void ufshpb_prep(struct ufs_hba
Not all devices that need to use OPP core need to have clocks, a missing
clock is fine in which case -ENOENT shall be returned by clk_get().
Anything else is an error and must be handled properly.
Reported-by: Dmitry Osipenko
Signed-off-by: Viresh Kumar
---
V2:
- s/ENODEV/ENOENT
- Use
On Sun, 2021-01-31 at 23:42 +0300, dev.dra...@bk.ru wrote:
> diff --git a/drivers/staging/wimax/i2400m/rx.c
> b/drivers/staging/wimax/i2400m/rx.c
[]
> @@ -764,9 +763,9 @@ unsigned __i2400m_roq_update_ws(struct i2400m *i2400m,
> struct i2400m_roq *roq,
> new_nws);
Hello,
syzbot found the following issue on:
HEAD commit:6642d600 Merge tag '5.11-rc5-smb3' of git://git.samba.org/..
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=17fd5978d0
kernel config: https://syzkaller.appspot.com/x/.config?x=ff2405705496bcf0
Use early_param() to define early_param_on_off().
Signed-off-by: Masahiro Yamada
---
include/linux/init.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/linux/init.h b/include/linux/init.h
index e668832ef66a..ae2c2aace0d0 100644
--- a/include/linux/init.h
+++
Hi Vitor,
First bad commit (maybe != root cause):
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 1048ba83fb1c00cd24172e23e8263972f6b5d9ac
commit: d2585f5164c298aaaed14c2c8d313cbe7bd5b253 lib: kunit: add bitfield test
conversion to KUnit
date: 4
> -Original Message-
> From: Thomas Gleixner [mailto:t...@linutronix.de]
> Sent: Friday, January 29, 2021 8:55 AM
> To: Song Bao Hua (Barry Song) ;
> dmitry.torok...@gmail.com; m...@kernel.org; gre...@linuxfoundation.org;
> linux-in...@vger.kernel.org; linux-kernel@vger.kernel.org
> Cc:
On Mon, Feb 1, 2021, at 9:12 AM, Jinyang He wrote:
> On 01/31/2021 06:38 PM, Jiaxun Yang wrote:
>
> >
> > On Sun, Jan 31, 2021, at 4:14 PM, Jinyang He wrote:
> >> CONFIG_64BIT is confusing. N32 also pass parameters by a0~a7.
> > Do we have NEW kernel build?
> > CONFIG_64BIT assumed N64 as
From: Ryan Wu
Add eFuse node to read Mediatek eFuse
Signed-off-by: Ryan Wu
---
This patch dependents on "arm64: dts: Add Mediatek SoC MT8192 and evaluation
board dts and Makefile"[1]
mt8192.dtsi file is needed for this patch.
Please also accept this patch together with [1].
From: Ryan Wu
This updates dt-binding documentation for MediaTek mt8192
Signed-off-by: Ryan Wu
---
This patch is based on v5.10-rc7.
---
Documentation/devicetree/bindings/nvmem/mtk-efuse.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Ryan Wu
This patch adds efuse to read via NVMEM.
Ryan Wu (2):
dt-bindings: nvmem: mediatek: add support for MediaTek mt8192 SoC
arm64: dts: mt8192: add eFuse support for MT8192 SoC
Documentation/devicetree/bindings/nvmem/mtk-efuse.txt | 1 +
arch/arm64/boot/dts/mediatek/mt8192.dtsi
From: Ryan Wu
This patch adds efuse to read via NVMEM.
Ryan Wu (2):
dt-bindings: nvmem: mediatek: add support for MediaTek mt8192 SoC
arm64: dts: mt8192: add eFuse support for MT8192 SoC
Documentation/devicetree/bindings/nvmem/mtk-efuse.txt | 1 +
arch/arm64/boot/dts/mediatek/mt8192.dtsi
On Sun, 31 Jan 2021 11:21:43 +
Jonathan Cameron wrote:
> On Mon, 25 Jan 2021 09:53:44 +0800
> Guoqing Chi wrote:
>
> > From: chiguoqing
> >
> > Adding mutex_lock, when read and write reg need to use this lock to
> > avoid race.
> >
> > Signed-off-by: Guoqing Chi
> > Reviewed-by: Tom
Some panels or bridges require customized hs_da_trail time.
So add a property in devicetree for this panels and bridges.
Signed-off-by: Jitao Shi
---
drivers/gpu/drm/mediatek/mtk_dsi.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git
On 1/29/21 3:37 PM, David Hildenbrand wrote:
> On 29.01.21 08:39, Anshuman Khandual wrote:
>> There are multiple instances of pfn_to_section_nr() and __pfn_to_section()
>> when CONFIG_SPARSEMEM is enabled. This can be just optimized if the memory
>> section is fetched earlier. Hence bifurcate
When the cpu is continuously idle, tick_irq_exit() will count next tick
expiry with maybe several periodic ticks, but if it enters softirq
before next tick, invoke_softirq() is called before tick_irq_exit(),
there will be no ticks during softirq. So with sched_clock_irqtime
closing, sirq is very
在 2021/1/28 13:03, Herbert Xu 写道:
On Fri, Jan 22, 2021 at 03:09:52PM +0800, Meng Yu wrote:
1. Add ecc curves(P224, P384, P521) for ECDH;
OK I think this is getting unwieldy.
In light of the fact that we already have hardware that supports
a specific subset of curves, I think perhaps it
As long as NUMA diameter > 2, building sched_domain by sibling's child
domain will definitely create a sched_domain with sched_group which will
span out of the sched_domain:
+--+ +--++---+ +--+
| node | 12 |node | 20 |
Hi all,
Today's linux-next merge of the irqchip tree got a conflict in:
Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml
between commit:
752b0aac99c7 ("dt-bindings: irq: sun7i-nmi: Add binding documentation for the
V3s NMI")
from the sunxi tree and
The outercache of some Hisilicon SOCs support physical addresses wider
than 32-bits. The unsigned long datatype is not sufficient for mapping
physical addresses >= 4GB. The commit ad6b9c9d78b9 ("ARM: 6671/1: LPAE:
use phys_addr_t instead of unsigned long in outercache functions") has
already
Add support for the Hisilicon Kunpeng L3 cache controller as used with
Kunpeng506 and Kunpeng509 SoCs.
These Hisilicon SoCs support LPAE, so the physical addresses is wider than
32-bits, but the actual bit width does not exceed 36 bits. When the cache
operation is performed based on the address
Enable support for the Hisilicon Kunpeng506 and Kunpeng509 SoC.
Signed-off-by: Zhen Lei
---
arch/arm/mach-hisi/Kconfig | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/mach-hisi/Kconfig b/arch/arm/mach-hisi/Kconfig
index 2e980f834a6aa1b..a004eac24b243af 100644
---
Add devicetree binding for Hisilicon Kunpeng L3 cache controller.
Signed-off-by: Zhen Lei
Reviewed-by: Arnd Bergmann
---
.../arm/hisilicon/kunpeng-l3cache.yaml| 40 +++
1 file changed, 40 insertions(+)
create mode 100644
On 2021/2/1 上午2:55, Eli Cohen wrote:
On Fri, Jan 29, 2021 at 11:49:45AM +0800, Jason Wang wrote:
On 2021/1/28 下午9:41, Eli Cohen wrote:
When a change of memory map occurs, the hardware resources are destroyed
and then re-created again with the new memory map. In such case, we need
to restore
v5 --> v6:
1. Use raw_spin_lock_irqsave() instead of spin_lock_irqsave()
2. Move the macros defined in cache-kunpeng-l3.h into cache-kunpeng-l3.c, and
delete that header file.
3. In some places, replace readl()/writel() with
readl_relaxed()/writel_relaxed() to improve performance without
Changes since v1:
- Seperate the line time as single patch.
Jitao Shi (2):
drm/mediatek: dsi: Fix EoTp flag
drm/mediatek: dsi: fine tune the line time cause by EOTp
drivers/gpu/drm/mediatek/mtk_dsi.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
--
2.12.5
SoC will transmit the EoTp (End of Transmission packet) when
MIPI_DSI_MODE_EOT_PACKET flag is set.
Signed-off-by: Jitao Shi
---
drivers/gpu/drm/mediatek/mtk_dsi.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c
Enabling EoTp will make the line time larger, so the hfp and
hbp should be reduced to keep line time.
Signed-off-by: Jitao Shi
---
drivers/gpu/drm/mediatek/mtk_dsi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c
b/drivers/gpu/drm/mediatek/mtk_dsi.c
This patch implements parts of UVC 1.5 Region of Interest (ROI)
control, using the uvcvideo selection API.
There are several things to mention here.
First, UVC 1.5 defines CT_DIGITAL_WINDOW_CONTROL; and ROI rectangle
coordinates "must be within the current Digital Window as specified
by the
On 29-01-21, 14:20, Flavio Suligoi wrote:
> Signed-off-by: Flavio Suligoi
> ---
> Documentation/driver-api/thermal/sysfs-api.rst | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/driver-api/thermal/sysfs-api.rst
>
This introduces mhp_range_allowed() which can be called in various memory
hotplug paths to prevalidate the address range which is being added, with
the platform. Then mhp_range_allowed() calls mhp_get_pluggable_range()
which provides applicable address range depending on whether linear mapping
is
> Hi Srujana,
>
> On Fri, Jan 29, 2021 at 6:53 AM Herbert Xu
> wrote:
> > On Mon, Jan 25, 2021 at 09:41:12AM -0800, Randy Dunlap wrote:
> > > on x86_64:
> > >
> > > ld: drivers/crypto/marvell/octeontx2/otx2_cptpf_main.o: in function
> `cptpf_flr_wq_handler':
> > > otx2_cptpf_main.c:(.text+0x2b):
From: David Hildenbrand
Right now, we only check against MAX_PHYSMEM_BITS - but turns out there
are more restrictions of which memory we can actually hotplug, especially
om arm64 or s390x once we support them: we might receive something like
-E2BIG or -ERANGE from add_memory_driver_managed(),
This overrides arch_get_mappabble_range() on s390 platform which will be
used with recently added generic framework. It modifies the existing range
check in vmem_add_mapping() using arch_get_mappable_range(). It also adds a
VM_BUG_ON() check that would ensure that mhp_range_allowed() has already
This series adds a mechanism allowing platforms to weigh in and prevalidate
incoming address range before proceeding further with the memory hotplug.
This helps prevent potential platform errors for the given address range,
down the hotplug call chain, which inevitably fails the hotplug itself.
This overrides arch_get_mappable_range() on arm64 platform which will be
used with recently added generic framework. It drops inside_linear_region()
and subsequent check in arch_add_memory() which are no longer required. It
also adds a VM_BUG_ON() check that would ensure that mhp_range_allowed()
On 2021/1/31 20:26, Liu Song via Linux-f2fs-devel wrote:
From: Liu Song
These variables will be explicitly assigned before use,
so there is no need to initialize.
Signed-off-by: Liu Song
Reviewed-by: Chao Yu
Thanks,
> On Fri, Jan 29, 2021 at 12:49:08PM +0900, Changheun Lee wrote:
> > bio size can grow up to 4GB when muli-page bvec is enabled.
> > but sometimes it would lead to inefficient behaviors.
> > in case of large chunk direct I/O, - 32MB chunk read in user space -
> > all pages for 32MB would be merged
On Thu, 2021-01-28 at 16:27 +0200, Mika Westerberg wrote:
> Hi,
>
> On Thu, Jan 28, 2021 at 06:05:31PM +0800, mingchuang.q...@mediatek.com wrote:
> > From: Mingchuang Qiao
> >
> > In bus scan flow, the "LTR Mechanism Enable" bit of DEVCTL2 register is
> > configured in pci_configure_ltr(). If
On 1/28/21 9:57 PM, Can Guo wrote:
> On 2021-01-29 11:15, Bart Van Assche wrote:
>> On 1/27/21 8:16 PM, Can Guo wrote:
>>> In __ufshcd_issue_tm_cmd(), it is not right to use hba->nutrs +
>>> req->tag as
>>> the Task Tag in one TMR UPIU. Directly use req->tag as the Task Tag.
>>
>> Why is the
On 2021/2/1 4:59, Hans de Goede wrote:
Hi,
On 1/31/21 3:04 PM, Limonciello, Mario wrote:
-Original Message-
From: Hans de Goede
Sent: Saturday, January 30, 2021 15:44
To: Limonciello, Mario; Mark Gross
Cc: LKML; platform-driver-...@vger.kernel.org
Subject: Re: [PATCH] platform/x86:
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 1048ba83fb1c00cd24172e23e8263972f6b5d9ac
commit: dee081bf8f824cabeb7c7495367d5dad0a444eb1 READ_ONCE: Drop pointer
qualifiers when reading from scalar types
date: 10 months ago
config:
On 1/28/21 10:29 PM, Can Guo wrote:
> On second thought, actually the 1st fix alone is enough to eliminate the
> race condition. Because blk_mq_tagset_busy_iter() only iterates over all
> requests which are not in IDLE state, if blk_mq_start_request() is called
> within the protection of host spin
On Mon, Feb 1, 2021 at 12:40 PM Andy Lutomirski wrote:
> I admit that PTRACE_SINGLESTEP seems like an odd way to spell "advance
> to the end of the syscall", but you're right, it should work.
We don't know of any better way to advance to the end of the syscall
without executing any userspace
On Sun, Jan 31, 2021 at 5:26 PM Fabio Estevam wrote:
>
> Hi Saravana,
>
> On Sun, Jan 31, 2021 at 5:56 PM Saravana Kannan wrote:
>
> > +static int __init imx_avic_init(struct device_node *node,
> > + struct device_node *parent)
> > +{
> > + void __iomem
On 2021/1/29 17:20, Hannes Reinecke wrote:
On 1/29/21 9:46 AM, Chao Leng wrote:
On 2021/1/29 16:33, Hannes Reinecke wrote:
On 1/29/21 8:45 AM, Chao Leng wrote:
On 2021/1/29 15:06, Hannes Reinecke wrote:
On 1/29/21 4:07 AM, Chao Leng wrote:
On 2021/1/29 9:42, Sagi Grimberg wrote:
On 1/31/21 3:30 PM, Scott Branden wrote:
> Correct compile issue if CONFIG_TTY is not set by
> only adding ttyVK devices if CONFIG_BCM_VK_TTY is set.
>
> Reported-by: Randy Dunlap
> Signed-off-by: Scott Branden
>
> ---
> Changes since v2:
> - add CONFIG_BCM_VK_TTY
> - add function and stub for
On 1/29/21 6:21 PM, mgr...@linux.intel.com wrote:
> diff --git a/drivers/misc/intel_tsens/Kconfig
> b/drivers/misc/intel_tsens/Kconfig
> index 8b263fdd80c3..be8d27e81864 100644
> --- a/drivers/misc/intel_tsens/Kconfig
> +++ b/drivers/misc/intel_tsens/Kconfig
> @@ -14,6 +14,20 @@ config
Hi all,
After merging the drm-misc tree, today's linux-next build (x86_64
allmodconfig) failed like this:
drivers/gpu/drm/v3d/v3d_sched.c:263:1: error: return type is an incomplete type
263 | v3d_gpu_reset_for_timeout(struct v3d_dev *v3d, struct drm_sched_job
*sched_job)
|
Sebastian,
On 12/27/20 12:46 PM, Sebastian Reichel wrote:
Hi,
Sorry, took me a lot longer than expected...
On Fri, Oct 09, 2020 at 09:41:12AM -0500, Dan Murphy wrote:
BQ25790 is a highly integrated switch-mode buck-boost charger
for 1-4 cell Li-ion battery and Li-polymer battery.
On 1/29/21 6:20 PM, mgr...@linux.intel.com wrote:
> diff --git a/drivers/misc/intel_tsens/Kconfig
> b/drivers/misc/intel_tsens/Kconfig
> index 8b263fdd80c3..9b2198ab28c3 100644
> --- a/drivers/misc/intel_tsens/Kconfig
> +++ b/drivers/misc/intel_tsens/Kconfig
> @@ -14,6 +14,21 @@ config
On Fri, 2021-01-29 at 11:27 +0100, Greg Kroah-Hartman wrote:
> On Fri, Jan 29, 2021 at 05:38:19PM +0800, Chunfeng Yun wrote:
> > From: Ikjoon Jang
> >
> > xhci-mtk needs XHCI_MTK_HOST quirk functions in add_endpoint() and
> > drop_endpoint() to handle its own sw bandwidth management.
> >
> > It
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