Re: [linux-sunxi] [PATCH v6 8/9] arm64: allwinner: a64: enable AXP803 regulators for Pine64

Hi, On 18/05/17 08:16, Icenowy Zheng wrote: > Add support of AXP803 regulators in the Pine64 device tree, in order to > enable many future functionalities, e.g. Wi-Fi. > > Signed-off-by: Icenowy Zheng > --- > Changes in v6: > - Rebased on next-20170517. > >

Re: [PATCH] pinctrl: use non-devm kmalloc versions for free functions

Hi Linus, On 11/05/17 15:01, Linus Walleij wrote: > On Thu, May 4, 2017 at 1:57 AM, Andre Przywara <andre.przyw...@arm.com> wrote: > >> When a pinctrl driver gets interrupted during its probe process >> (returning -EPROBE_DEFER), the devres system cleans up all alloca

Re: [PATCH] pinctrl: use non-devm kmalloc versions for free functions

Hi Linus, On 11/05/17 15:01, Linus Walleij wrote: > On Thu, May 4, 2017 at 1:57 AM, Andre Przywara wrote: > >> When a pinctrl driver gets interrupted during its probe process >> (returning -EPROBE_DEFER), the devres system cleans up all allocated >> resources. Duri

Re: Updating kernel.org cross compilers?

On 30/04/17 06:29, Segher Boessenkool wrote: Hi, > On Wed, Apr 26, 2017 at 03:14:16PM +0100, Andre Przywara wrote: >> It seems that many people (even outside the Linux kernel community) use >> the cross compilers provided at kernel.org/pub/tools/crosstool. >> The l

Re: Updating kernel.org cross compilers?

On 30/04/17 06:29, Segher Boessenkool wrote: Hi, > On Wed, Apr 26, 2017 at 03:14:16PM +0100, Andre Przywara wrote: >> It seems that many people (even outside the Linux kernel community) use >> the cross compilers provided at kernel.org/pub/tools/crosstool. >> The l

[PATCH] pinctrl: use non-devm kmalloc versions for free functions

* builds for the Pine64, where the pinctrl driver gets loaded early, but it missing resources, so gets deferred and is loaded again (successfully) later. kernelci caught this as well [1]. Signed-off-by: Andre Przywara <andre.przyw...@arm.com> [1] https://storage.kernelci.org/net-next/master/v4.

[PATCH] pinctrl: use non-devm kmalloc versions for free functions

* builds for the Pine64, where the pinctrl driver gets loaded early, but it missing resources, so gets deferred and is loaded again (successfully) later. kernelci caught this as well [1]. Signed-off-by: Andre Przywara [1] https://storage.kernelci.org/net-next/master/v4.11-rc8-2122-gc08bac03d289

[PATCH] Documentation: earlycon: fix Marvell Armada 3700 UART name

The Marvell Armada 3700 UART uses "ar3700_uart" for its earlycon name. Adjust documentation to match the code. Signed-off-by: Andre Przywara <andre.przyw...@arm.com> --- Documentation/admin-guide/kernel-parameters.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletio

[PATCH] Documentation: earlycon: fix Marvell Armada 3700 UART name

The Marvell Armada 3700 UART uses "ar3700_uart" for its earlycon name. Adjust documentation to match the code. Signed-off-by: Andre Przywara --- Documentation/admin-guide/kernel-parameters.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/admin-gu

Updating kernel.org cross compilers?

Hi! (Tony: I've seen you redirecting to "Chris" in an older email, but the web archive doesn't have his email address) It seems that many people (even outside the Linux kernel community) use the cross compilers provided at kernel.org/pub/tools/crosstool. The latest compiler I find there is

Updating kernel.org cross compilers?

Hi! (Tony: I've seen you redirecting to "Chris" in an older email, but the web archive doesn't have his email address) It seems that many people (even outside the Linux kernel community) use the cross compilers provided at kernel.org/pub/tools/crosstool. The latest compiler I find there is

Re: [linux-sunxi] [PATCH v4 09/10] arm64: allwinner: a64: enable AXP803 regulators for Pine64

Hi, On 24/04/17 17:01, Icenowy Zheng wrote: > Add support of AXP803 regulators in the Pine64 device tree, in order to > enable many future functionalities, e.g. Wi-Fi. In general that's quite some code to just achieve some device power plane switching, but that's another discussion, I guess ;-)

Re: [linux-sunxi] [PATCH v4 09/10] arm64: allwinner: a64: enable AXP803 regulators for Pine64

Hi, On 24/04/17 17:01, Icenowy Zheng wrote: > Add support of AXP803 regulators in the Pine64 device tree, in order to > enable many future functionalities, e.g. Wi-Fi. In general that's quite some code to just achieve some device power plane switching, but that's another discussion, I guess ;-)

Re: sun50i-a64-pinctrl WARN_ON drivers/base/dd.c:349

Hi, On 18/04/17 08:25, Tejun Heo wrote: > Hello, > > On Mon, Apr 03, 2017 at 12:48:16AM +0100, André Przywara wrote: >> So I see this problem easily now - on every boot - with an unpatched >> 4.11-rc3 kernel and the (arm64) defconfig on a Pine64 or BananaPi M64. >> I enabled devres.log and see

Re: sun50i-a64-pinctrl WARN_ON drivers/base/dd.c:349

Hi, On 18/04/17 08:25, Tejun Heo wrote: > Hello, > > On Mon, Apr 03, 2017 at 12:48:16AM +0100, André Przywara wrote: >> So I see this problem easily now - on every boot - with an unpatched >> 4.11-rc3 kernel and the (arm64) defconfig on a Pine64 or BananaPi M64. >> I enabled devres.log and see

[PATCH 1/2] irqchip/gic-v3-its: bail out on already enabled LPIs

first try to disable LPIs anyway, to check whether this actually works. If not, return an error. Signed-off-by: Andre Przywara <andre.przyw...@arm.com> --- drivers/irqchip/irq-gic-v3-its.c | 36 1 file changed, 28 insertions(+), 8 deletions(-) diff --git a/dri

[PATCH 1/2] irqchip/gic-v3-its: bail out on already enabled LPIs

first try to disable LPIs anyway, to check whether this actually works. If not, return an error. Signed-off-by: Andre Przywara --- drivers/irqchip/irq-gic-v3-its.c | 36 1 file changed, 28 insertions(+), 8 deletions(-) diff --git a/drivers/irqchip/irq-gic-v3-its.c

[PATCH 0/2] irqchip/gic-v3-its: LPI tables fixes

if this fails. Patch 2 makes sure we don't miss when the redistributors denies our cacheable mapping request. Please have a look and apply if that makes sense. Cheers, Andre. Andre Przywara (2): irqchip/gic-v3-its: bail out on already enabled LPIs irqchip/gic-v3-its: always check

[PATCH 0/2] irqchip/gic-v3-its: LPI tables fixes

if this fails. Patch 2 makes sure we don't miss when the redistributors denies our cacheable mapping request. Please have a look and apply if that makes sense. Cheers, Andre. Andre Przywara (2): irqchip/gic-v3-its: bail out on already enabled LPIs irqchip/gic-v3-its: always check

[PATCH 2/2] irqchip/gic-v3-its: always check for cacheability attributes

by the redistributor to make sure we flush properly if needed. Signed-off-by: Andre Przywara <andre.przyw...@arm.com> --- drivers/irqchip/irq-gic-v3-its.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c index b777c57..5cd4d58

[PATCH 2/2] irqchip/gic-v3-its: always check for cacheability attributes

by the redistributor to make sure we flush properly if needed. Signed-off-by: Andre Przywara --- drivers/irqchip/irq-gic-v3-its.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c index b777c57..5cd4d58 100644 --- a/drivers/irqchip

Re: [PATCH v1 6/7] arm64: dts: rockchip: add dts file for RK3328 evaluation board

Hi Chen, On 16/03/17 01:45, c...@rock-chips.com wrote: > From: Chen Liang > > This patch add rk3328-evb.dts for RK3328 evaluation board. > Tested on RK3328 evb. > > Signed-off-by: Chen Liang > --- > arch/arm64/boot/dts/rockchip/Makefile | 1 +

Re: [PATCH v1 6/7] arm64: dts: rockchip: add dts file for RK3328 evaluation board

Hi Chen, On 16/03/17 01:45, c...@rock-chips.com wrote: > From: Chen Liang > > This patch add rk3328-evb.dts for RK3328 evaluation board. > Tested on RK3328 evb. > > Signed-off-by: Chen Liang > --- > arch/arm64/boot/dts/rockchip/Makefile | 1 + >

Re: [PATCH v1 5/7] arm64: dts: rockchip: add core dtsi file for RK3328 SoCs

Hi Chen, thanks for posting this. And great to see those compatible strings used so nicely! On 16/03/17 01:44, c...@rock-chips.com wrote: > From: Chen Liang > > This patch adds core dtsi file for Rockchip RK3328 SoCs. > > Signed-off-by: Chen Liang >

Re: [PATCH v1 5/7] arm64: dts: rockchip: add core dtsi file for RK3328 SoCs

Hi Chen, thanks for posting this. And great to see those compatible strings used so nicely! On 16/03/17 01:44, c...@rock-chips.com wrote: > From: Chen Liang > > This patch adds core dtsi file for Rockchip RK3328 SoCs. > > Signed-off-by: Chen Liang > --- >

Re: [PATCH 1/2] reset: add reset-simple to unify socfpga, stm32, and sunxi

Hi, On 08/03/17 12:20, Philipp Zabel wrote: > On Wed, 2017-03-08 at 12:05 +0100, Alexandre Torgue wrote: >> Hi Philipp, >> >> On 03/08/2017 11:19 AM, Andre Przywara wrote: >>> Hi, >>> >>> On 08/03/17 09:54, Philipp Zabel wrote: >>>> Re

Re: [PATCH 1/2] reset: add reset-simple to unify socfpga, stm32, and sunxi

Hi, On 08/03/17 12:20, Philipp Zabel wrote: > On Wed, 2017-03-08 at 12:05 +0100, Alexandre Torgue wrote: >> Hi Philipp, >> >> On 03/08/2017 11:19 AM, Andre Przywara wrote: >>> Hi, >>> >>> On 08/03/17 09:54, Philipp Zabel wrote: >>>> Re

Re: [PATCH 2/2] reset: simple: read back to make sure changes are applied

Hi, On 08/03/17 09:54, Philipp Zabel wrote: > Read back the register after setting or clearing a reset bit to make > sure that the changes are applied to the reset controller hardware. > Theoretically, this avoids the write to stay stuck in a store buffer > during the delay of an

Re: [PATCH 2/2] reset: simple: read back to make sure changes are applied

Hi, On 08/03/17 09:54, Philipp Zabel wrote: > Read back the register after setting or clearing a reset bit to make > sure that the changes are applied to the reset controller hardware. > Theoretically, this avoids the write to stay stuck in a store buffer > during the delay of an

Re: [PATCH 1/2] reset: add reset-simple to unify socfpga, stm32, and sunxi

Hi, On 08/03/17 09:54, Philipp Zabel wrote: > Reset operations for simple reset controllers with reset lines that can > be controlled by toggling bits in (mostly) contiguous register ranges > using read-modify-write cycles under a spinlock. So far this covers the > socfpga, stm32, and sunxi

Re: [PATCH 1/2] reset: add reset-simple to unify socfpga, stm32, and sunxi

Hi, On 08/03/17 09:54, Philipp Zabel wrote: > Reset operations for simple reset controllers with reset lines that can > be controlled by toggling bits in (mostly) contiguous register ranges > using read-modify-write cycles under a spinlock. So far this covers the > socfpga, stm32, and sunxi

Re: [PATCH] reset: sunxi: fix for 64-bit compilation

Hi, On 08/03/17 04:28, Chen-Yu Tsai wrote: > On Mon, Mar 6, 2017 at 9:35 AM, Andre Przywara <andre.przyw...@arm.com> wrote: >> The Allwinner reset controller has 32-bit registers, so translating >> the reset cell number into a register and bit offset should not use >>

Re: [PATCH] reset: sunxi: fix for 64-bit compilation

Hi, On 08/03/17 04:28, Chen-Yu Tsai wrote: > On Mon, Mar 6, 2017 at 9:35 AM, Andre Przywara wrote: >> The Allwinner reset controller has 32-bit registers, so translating >> the reset cell number into a register and bit offset should not use >> any architecture dependent

[PATCH] reset: sunxi: fix for 64-bit compilation

which matters here in the calculation. Signed-off-by: Andre Przywara <andre.przyw...@arm.com> --- drivers/reset/reset-sunxi.c | 18 ++ 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/reset/reset-sunxi.c b/drivers/reset/reset-sunxi.c index b44f6b5..c

[PATCH] reset: sunxi: fix for 64-bit compilation

which matters here in the calculation. Signed-off-by: Andre Przywara --- drivers/reset/reset-sunxi.c | 18 ++ 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/reset/reset-sunxi.c b/drivers/reset/reset-sunxi.c index b44f6b5..cd585cd 100644 --- a/drivers/reset

Re: [linux-sunxi] [PATCH 5/5] pinctrl: sunxi: Add A64 R_PIO controller support

Hi, On 28/02/17 17:24, Icenowy Zheng wrote: > The A64 has a R_PIO pin controller, similar to the one found on the H3 SoC. > Add support for the pins controlled by the R_PIO controller. > > Signed-off-by: Icenowy Zheng > --- > drivers/pinctrl/sunxi/Kconfig| 5

Re: [linux-sunxi] [PATCH 5/5] pinctrl: sunxi: Add A64 R_PIO controller support

Hi, On 28/02/17 17:24, Icenowy Zheng wrote: > The A64 has a R_PIO pin controller, similar to the one found on the H3 SoC. > Add support for the pins controlled by the R_PIO controller. > > Signed-off-by: Icenowy Zheng > --- > drivers/pinctrl/sunxi/Kconfig| 5 + >

Re: [linux-sunxi] [PATCH 2/5] arm64: only select PINCTRL_SUNXI for Allwinner platforms

Hi, On 28/02/17 17:24, Icenowy Zheng wrote: > As the pinctrl driver selecting is refactored in Kconfig file of > pinctrl-sunxi, now we can select only PINCTRL_SUNXI for Allwinner > platform, and the default value of several pinctrl drivers useful on > ARM64 Allwinner SoCs will become Y. > > Drop

Re: [linux-sunxi] [PATCH 2/5] arm64: only select PINCTRL_SUNXI for Allwinner platforms

Hi, On 28/02/17 17:24, Icenowy Zheng wrote: > As the pinctrl driver selecting is refactored in Kconfig file of > pinctrl-sunxi, now we can select only PINCTRL_SUNXI for Allwinner > platform, and the default value of several pinctrl drivers useful on > ARM64 Allwinner SoCs will become Y. > > Drop

Re: [linux-sunxi] [PATCH 1/5] pinctrl: sunxi: refactor pinctrl choice selecting for ARM64

tes us already in arm64, where ARCH_HAS_RESET_CONTROLLER is not enabled for ARCH_SUNXI. But as the rest of the patch is fine, if you remove this line: Reviewed-by: Andre Przywara <andre.przyw...@arm.com> Cheers, Andre. > + select PINCTRL_SUNXI > > config PINCTRL_SUN8I_V3S

Re: [linux-sunxi] [PATCH 1/5] pinctrl: sunxi: refactor pinctrl choice selecting for ARM64

ere ARCH_HAS_RESET_CONTROLLER is not enabled for ARCH_SUNXI. But as the rest of the patch is fine, if you remove this line: Reviewed-by: Andre Przywara Cheers, Andre. > + select PINCTRL_SUNXI > > config PINCTRL_SUN8I_V3S > def_bool MACH_SUN8I > @@ -65,11 +66,11 @@ conf

Re: [PATCH v3 3/13] mmc: sunxi: Always set signal delay to 0 for A64

ince the code wasn't actually used before. Cheers, Andre. > >> >> Reviewed-by: Andre Przywara <andre.przyw...@arm.com> >> Signed-off-by: Maxime Ripard <maxime.rip...@free-electrons.com> >> --- >> drivers/mmc/host/sunxi-mmc.c | 50 -

Re: [PATCH v3 3/13] mmc: sunxi: Always set signal delay to 0 for A64

ich was introduced lately (e1b8dfd1b1c6) to be used by the Allwinner's enhanced MMC controller. This is only used by devices using the sun50i-a64-mmc compatible, of which this series introduces the first user. So there is no way this can regress in any way, since the code wasn't actually used before. C

Re: [linux-sunxi] [PATCH 1/2] drivers: pinctrl: add driver for Allwinner H5 SoC

Hi, On 16/01/17 16:31, Maxime Ripard wrote: > On Mon, Jan 09, 2017 at 12:16:00AM +, André Przywara wrote: >> On 05/01/17 22:42, Maxime Ripard wrote: >>> On Fri, Dec 30, 2016 at 01:55:44PM +0100, Linus Walleij wrote: On Mon, Dec 26, 2016 at 3:33 PM, André Przywara

Re: [linux-sunxi] [PATCH 1/2] drivers: pinctrl: add driver for Allwinner H5 SoC

Hi, On 16/01/17 16:31, Maxime Ripard wrote: > On Mon, Jan 09, 2017 at 12:16:00AM +, André Przywara wrote: >> On 05/01/17 22:42, Maxime Ripard wrote: >>> On Fri, Dec 30, 2016 at 01:55:44PM +0100, Linus Walleij wrote: On Mon, Dec 26, 2016 at 3:33 PM, André Przywara wrote: >

Re: kvm: deadlock in kvm_vgic_map_resources

Hi, On 12/01/17 10:42, Christoffer Dall wrote: > On Thu, Jan 12, 2017 at 10:30:39AM +, Marc Zyngier wrote: >> On 12/01/17 09:55, Andre Przywara wrote: >>> Hi, >>> >>> On 12/01/17 09:32, Marc Zyngier wrote: >>>> Hi Dmitry, >>>&

Re: kvm: deadlock in kvm_vgic_map_resources

Hi, On 12/01/17 10:42, Christoffer Dall wrote: > On Thu, Jan 12, 2017 at 10:30:39AM +, Marc Zyngier wrote: >> On 12/01/17 09:55, Andre Przywara wrote: >>> Hi, >>> >>> On 12/01/17 09:32, Marc Zyngier wrote: >>>> Hi Dmitry, >>>&

Re: kvm: deadlock in kvm_vgic_map_resources

Hi, On 12/01/17 09:32, Marc Zyngier wrote: > Hi Dmitry, > > On 11/01/17 19:01, Dmitry Vyukov wrote: >> Hello, >> >> While running syzkaller fuzzer I've got the following deadlock. >> On commit 9c763584b7c8911106bb77af7e648bef09af9d80. >> >> >> = >> [

Re: kvm: deadlock in kvm_vgic_map_resources

Hi, On 12/01/17 09:32, Marc Zyngier wrote: > Hi Dmitry, > > On 11/01/17 19:01, Dmitry Vyukov wrote: >> Hello, >> >> While running syzkaller fuzzer I've got the following deadlock. >> On commit 9c763584b7c8911106bb77af7e648bef09af9d80. >> >> >> = >> [

Re: [PATCH 0/3] arm64: dts: A64 board MMC support

Hi, On 11/01/17 13:51, Maxime Ripard wrote: > Hi, > > On Tue, Jan 10, 2017 at 01:22:30AM +0000, Andre Przywara wrote: >> These patches here go on top of Maxime's latest A64 MMC series and >> enable the MMC controllers on the boards using the A64 SoC. >> As the BananaPi

Re: [PATCH 0/3] arm64: dts: A64 board MMC support

Hi, On 11/01/17 13:51, Maxime Ripard wrote: > Hi, > > On Tue, Jan 10, 2017 at 01:22:30AM +0000, Andre Przywara wrote: >> These patches here go on top of Maxime's latest A64 MMC series and >> enable the MMC controllers on the boards using the A64 SoC. >> As the BananaPi

[PATCH 2/3] arm64: dts: sun50i: add UART1 pin nodes

On many boards UART1 connects to a Bluetooth chip, so add the pinctrl nodes for the only pins providing access to that UART. That includes those pins for hardware flow control (RTS/CTS). Signed-off-by: Andre Przywara <andre.przyw...@arm.com> --- arch/arm64/boot/dts/allwinner/sun50i-a64.dts

[PATCH 2/3] arm64: dts: sun50i: add UART1 pin nodes

On many boards UART1 connects to a Bluetooth chip, so add the pinctrl nodes for the only pins providing access to that UART. That includes those pins for hardware flow control (RTS/CTS). Signed-off-by: Andre Przywara --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 10 ++ 1 file

[PATCH 3/3] arm64: dts: add BananaPi-M64 support

interfaces are connected to it. Signed-off-by: Andre Przywara <andre.przyw...@arm.com> --- arch/arm64/boot/dts/allwinner/Makefile | 1 + .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 120 + 2 files changed, 121 insertions(+) create mode 100644 arch/arm6

[PATCH 1/3] arm64: dts: Pine64: add MMC support

All Pine64 boards connect an micro-SD card slot to the first MMC controller. Enable the respective DT node and specify the (always-on) regulator and card-detect pin. As a micro-SD slot does not feature a write-protect switch, we disable this feature. Signed-off-by: Andre Przywara <andre.pr

[PATCH 0/3] arm64: dts: A64 board MMC support

f9ca9b952ee1 Maxime mentioned in his cover letter, so I applied his patches on top of sunxi/for-next and cherry-picked b4b8664d29 to fix the arm64 build. Cheers, Andre. Andre Przywara (3): arm64: dts: Pine64: add MMC support arm64: dts: sun50i: add UART1 pin nodes arm64: dts: add BananaPi-M64

[PATCH 3/3] arm64: dts: add BananaPi-M64 support

interfaces are connected to it. Signed-off-by: Andre Przywara --- arch/arm64/boot/dts/allwinner/Makefile | 1 + .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 120 + 2 files changed, 121 insertions(+) create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64

[PATCH 1/3] arm64: dts: Pine64: add MMC support

All Pine64 boards connect an micro-SD card slot to the first MMC controller. Enable the respective DT node and specify the (always-on) regulator and card-detect pin. As a micro-SD slot does not feature a write-protect switch, we disable this feature. Signed-off-by: Andre Przywara --- arch/arm64

[PATCH 0/3] arm64: dts: A64 board MMC support

f9ca9b952ee1 Maxime mentioned in his cover letter, so I applied his patches on top of sunxi/for-next and cherry-picked b4b8664d29 to fix the arm64 build. Cheers, Andre. Andre Przywara (3): arm64: dts: Pine64: add MMC support arm64: dts: sun50i: add UART1 pin nodes arm64: dts: add BananaPi-M64

[PATCH 0/5] arm64: sunxi: A64: enable MMC support

of yours, please holler if there's something wrong with that (patch 2/5). I send the BananaPi M64 .dts patch along with that series, as the eMMC on that board now makes some difference. Cheers, Andre. Andre Przywara (4): drivers: mmc: sunxi: fix A64 calibration routine arm64: dts: sun50i: add MMC

[PATCH 0/5] arm64: sunxi: A64: enable MMC support

of yours, please holler if there's something wrong with that (patch 2/5). I send the BananaPi M64 .dts patch along with that series, as the eMMC on that board now makes some difference. Cheers, Andre. Andre Przywara (4): drivers: mmc: sunxi: fix A64 calibration routine arm64: dts: sun50i: add MMC

[PATCH 5/5] arm64: dts: add BananaPi-M64 support

interfaces are connected to it. Signed-off-by: Andre Przywara <andre.przyw...@arm.com> --- arch/arm64/boot/dts/allwinner/Makefile | 1 + .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 125 + arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 10 ++ 3

[PATCH 5/5] arm64: dts: add BananaPi-M64 support

interfaces are connected to it. Signed-off-by: Andre Przywara --- arch/arm64/boot/dts/allwinner/Makefile | 1 + .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 125 + arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 10 ++ 3 files changed, 136 insertions

[PATCH 4/5] arm64: dts: Pine64: add MMC support

Signed-off-by: Andre Przywara <andre.przyw...@arm.com> --- arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 18 ++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts

[PATCH 4/5] arm64: dts: Pine64: add MMC support

Signed-off-by: Andre Przywara --- arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 18 ++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts index 4709590..c18ab03 100644

[PATCH 3/5] arm64: dts: sun50i: add MMC nodes

Signed-off-by: Andre Przywara <andre.przyw...@arm.com> --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 67 +++ 1 file changed, 67 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index e

[PATCH 3/5] arm64: dts: sun50i: add MMC nodes

Signed-off-by: Andre Przywara --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 67 +++ 1 file changed, 67 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index e0dcab8..c680566 100644 --- a/arch

[PATCH 2/5] drivers: mmc: sunxi: limit A64 MMC2 to 8K DMA buffer

er two controllers, so introduce a new DT compatible string to let the driver use different settings for that particular device. This will also help to enable the high-speed transfer modes of that controller later. Signed-off-by: Maxime Ripard <maxime.rip...@free-electrons.com> Signed-off-by: An

[PATCH 2/5] drivers: mmc: sunxi: limit A64 MMC2 to 8K DMA buffer

compatible string to let the driver use different settings for that particular device. This will also help to enable the high-speed transfer modes of that controller later. Signed-off-by: Maxime Ripard Signed-off-by: Andre Przywara --- Documentation/devicetree/bindings/mmc/sunxi-mmc.txt | 1

[PATCH 1/5] drivers: mmc: sunxi: fix A64 calibration routine

the driver supports HS200 and faster modes, we can enter confirmed working values in there. Signed-off-by: Andre Przywara <andre.przyw...@arm.com> --- drivers/mmc/host/sunxi-mmc.c | 30 ++ 1 file changed, 18 insertions(+), 12 deletions(-) diff --git a/drivers/mmc/host

[PATCH 1/5] drivers: mmc: sunxi: fix A64 calibration routine

the driver supports HS200 and faster modes, we can enter confirmed working values in there. Signed-off-by: Andre Przywara --- drivers/mmc/host/sunxi-mmc.c | 30 ++ 1 file changed, 18 insertions(+), 12 deletions(-) diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc

Re: [PATCH v2 2/3] ARM: dts: sunxi: add support for Orange Pi Zero board

Hi, On 02/12/16 14:32, Icenowy Zheng wrote: > > > 02.12.2016, 22:30, "Hans de Goede" : >> Hi, >> >> On 02-12-16 15:22, Icenowy Zheng wrote: >>> 01.12.2016, 17:36, "Maxime Ripard" : On Mon, Nov 28, 2016 at 12:29:07AM +, André

Re: [PATCH v2 2/3] ARM: dts: sunxi: add support for Orange Pi Zero board

Hi, On 02/12/16 14:32, Icenowy Zheng wrote: > > > 02.12.2016, 22:30, "Hans de Goede" : >> Hi, >> >> On 02-12-16 15:22, Icenowy Zheng wrote: >>> 01.12.2016, 17:36, "Maxime Ripard" : On Mon, Nov 28, 2016 at 12:29:07AM +, André Przywara wrote: > > Something more interesting

Re: [PATCH 3/3] ARM: dts: sunxi: enable SDIO Wi-Fi on Orange Pi Zero

Hi, On 29/11/16 10:19, Icenowy Zheng wrote: > > 2016年11月29日 15:16于 Alexey Kardashevskiy 写道： >> >> >> >> On Wed, Nov 23, 2016 at 6:59 PM, Maxime Ripard > wrote: >>> >>> Hi, >>> >>> On Tue, Nov 22, 2016 at 12:24:21AM +0800, Icenowy Zheng wrote:

Re: [PATCH 3/3] ARM: dts: sunxi: enable SDIO Wi-Fi on Orange Pi Zero

Hi, On 29/11/16 10:19, Icenowy Zheng wrote: > > 2016年11月29日 15:16于 Alexey Kardashevskiy 写道： >> >> >> >> On Wed, Nov 23, 2016 at 6:59 PM, Maxime Ripard > wrote: >>> >>> Hi, >>> >>> On Tue, Nov 22, 2016 at 12:24:21AM +0800, Icenowy Zheng wrote: >>> > There's a Allwinner's XR819 SDIO Wi-Fi module

Re: [PATCH v2 2/3] ARM: dts: sunxi: add support for Orange Pi Zero board

Hi Maxime, On 23/11/16 07:57, Maxime Ripard wrote: > On Tue, Nov 22, 2016 at 12:24:20AM +0800, Icenowy Zheng wrote: >> Orange Pi Zero is a board that came with the new Allwinner H2+ SoC. >> >> Add a device tree file for it. >> >> Signed-off-by: Icenowy Zheng >> --- >> Changes

Re: [PATCH v2 2/3] ARM: dts: sunxi: add support for Orange Pi Zero board

Hi Maxime, On 23/11/16 07:57, Maxime Ripard wrote: > On Tue, Nov 22, 2016 at 12:24:20AM +0800, Icenowy Zheng wrote: >> Orange Pi Zero is a board that came with the new Allwinner H2+ SoC. >> >> Add a device tree file for it. >> >> Signed-off-by: Icenowy Zheng >> --- >> Changes since v2: >> - Use

Re: [PATCH] arm64: Cortex-A53 errata workaround: check for kernel addresses

Hi Mark, On 18/10/16 14:00, Mark Rutland wrote: > On Tue, Oct 18, 2016 at 12:16:27PM +0100, Andre Przywara wrote: >> Commit 7dd01aef0557 ("arm64: trap userspace "dc cvau" cache operation on >> errata-affected core") adds code to execute cache maintenance inst

Re: [PATCH] arm64: Cortex-A53 errata workaround: check for kernel addresses

Hi Mark, On 18/10/16 14:00, Mark Rutland wrote: > On Tue, Oct 18, 2016 at 12:16:27PM +0100, Andre Przywara wrote: >> Commit 7dd01aef0557 ("arm64: trap userspace "dc cvau" cache operation on >> errata-affected core") adds code to execute cache maintenance inst

[PATCH v2] arm64: Cortex-A53 errata workaround: check for kernel addresses

tag to be 0). Fixes: 7dd01aef0557 ("arm64: trap userspace "dc cvau" cache operation on errata-affected core") Reported-by: Kristina Martsenko <kristina.martse...@arm.com> Signed-off-by: Andre Przywara <andre.przyw...@arm.com> --- Changelog v1 .. v2: - use PAG

[PATCH v2] arm64: Cortex-A53 errata workaround: check for kernel addresses

tag to be 0). Fixes: 7dd01aef0557 ("arm64: trap userspace "dc cvau" cache operation on errata-affected core") Reported-by: Kristina Martsenko Signed-off-by: Andre Przywara --- Changelog v1 .. v2: - use PAGE_SIZE instead of cache_line_size() for access check - merge extr

[PATCH] arm64: Cortex-A53 errata workaround: check for kernel addresses

e a valid user space address, allowing userland to clean cache lines in kernel space. Fix this by introducing an access_ok() check before executing the instructions on behalf of userland, taking care of tagged pointers on the way. Reported-by: Kristina Martsenko <kristina.martse...@arm.com> Sig

[PATCH] arm64: Cortex-A53 errata workaround: check for kernel addresses

e a valid user space address, allowing userland to clean cache lines in kernel space. Fix this by introducing an access_ok() check before executing the instructions on behalf of userland, taking care of tagged pointers on the way. Reported-by: Kristina Martsenko Signed-off-by: Andre Przywara Cc

Re: [PATCH v3 9/9] arm64: dts: add Pine64 support

Hi Maxime, thanks for the respin! On 03/10/16 09:09, Maxime Ripard wrote: > From: Andre Przywara <andre.przyw...@arm.com> > > The Pine64 is a cost-efficient development board based on the > Allwinner A64 SoC. > There are three models: the basic version with Fast Ethernet

Re: [PATCH v3 9/9] arm64: dts: add Pine64 support

Hi Maxime, thanks for the respin! On 03/10/16 09:09, Maxime Ripard wrote: > From: Andre Przywara > > The Pine64 is a cost-efficient development board based on the > Allwinner A64 SoC. > There are three models: the basic version with Fast Ethernet and > 512 MB of DRAM (Pine

Re: [PATCH v2 4/4] arm64: dts: add Pine64 support

Hi, On 10/09/16 03:33, Chen-Yu Tsai wrote: > Hi, > > On Sat, Sep 10, 2016 at 4:10 AM, Maxime Ripard > <maxime.rip...@free-electrons.com> wrote: >> From: Andre Przywara <andre.przyw...@arm.com> >> >> The Pine64 is a cost-efficient developme

Re: [PATCH v2 4/4] arm64: dts: add Pine64 support

Hi, On 10/09/16 03:33, Chen-Yu Tsai wrote: > Hi, > > On Sat, Sep 10, 2016 at 4:10 AM, Maxime Ripard > wrote: >> From: Andre Przywara >> >> The Pine64 is a cost-efficient development board based on the >> Allwinner A64 SoC. >> There are three mo

Re: [PATCH 12/13] arm64: dts: add Allwinner A64 SoC .dtsi

Hi Maxime, On 26/07/16 21:30, Maxime Ripard wrote: > From: Andre Przywara <andre.przyw...@arm.com> > > The Allwinner A64 SoC is a low-cost chip with 4 ARM Cortex-A53 cores > and the typical tablet / TV box peripherals. > The SoC is based on the (32-bit) Allwinner

Re: [PATCH 12/13] arm64: dts: add Allwinner A64 SoC .dtsi

Hi Maxime, On 26/07/16 21:30, Maxime Ripard wrote: > From: Andre Przywara > > The Allwinner A64 SoC is a low-cost chip with 4 ARM Cortex-A53 cores > and the typical tablet / TV box peripherals. > The SoC is based on the (32-bit) Allwinner H3 chip, sharing most of &g

Re: [PATCH v3 8/9] arm64: Refactor sysinstr exception handling

che maintenance instructions trapping still works as expected. Acked-by: Andre Przywara <andre.przyw...@arm.com> Cheers, Andre. > > Cc: Andre Przywara <andre.przyw...@arm.com> > Cc: Mark Rutland <mark.rutl...@arm.com> > Cc: Will Deacon <will.dea...@arm.com> >

Re: [PATCH v3 8/9] arm64: Refactor sysinstr exception handling

che maintenance instructions trapping still works as expected. Acked-by: Andre Przywara Cheers, Andre. > > Cc: Andre Przywara > Cc: Mark Rutland > Cc: Will Deacon > Cc: Catalin Marinas > Signed-off-by: Suzuki K Poulose > ---

Re: [PATCH v3 2/9] arm64: Use consistent naming for errata handling

tead of _errata. Yes, this makes sense. Acked-by: Andre Przywara <andre.przyw...@arm.com> Thanks! Andre. > Cc: Mark Rutland <mark.rutl...@arm.com> > Cc: Andre Przywara <andre.przyw...@arm.com> > Cc: Catalin Marinas <catalin.mari...@arm.com> > Signed-off-by: Suzu

Re: [PATCH v3 2/9] arm64: Use consistent naming for errata handling

tead of _errata. Yes, this makes sense. Acked-by: Andre Przywara Thanks! Andre. > Cc: Mark Rutland > Cc: Andre Przywara > Cc: Catalin Marinas > Signed-off-by: Suzuki K Poulose > --- > arch/arm64/include/asm/cpufeature.h | 4 ++-- > arch/arm64/kernel/cpu_errata.c

[RFC PATCH 2/5] DT: mailbox: add binding doc for the ARM SMC mailbox

Signed-off-by: Andre Przywara <andre.przyw...@arm.com> --- .../devicetree/bindings/mailbox/arm-smc.txt| 53 ++ 1 file changed, 53 insertions(+) create mode 100644 Documentation/devicetree/bindings/mailbox/arm-smc.txt diff --git a/Documentation/devicetree/bi

[RFC PATCH 1/5] mailbox: introduce ARM SMC based mailbox

is not implemented. This allows the usage of a mailbox to trigger firmware actions on SoCs which either don't have a separate management processor or on which such a core is not available. A user of this mailbox could be the SCP interface. Signed-off-by: Andre Przywara <andre.przyw...@arm.com> --- d

[RFC PATCH 2/5] DT: mailbox: add binding doc for the ARM SMC mailbox

Signed-off-by: Andre Przywara --- .../devicetree/bindings/mailbox/arm-smc.txt| 53 ++ 1 file changed, 53 insertions(+) create mode 100644 Documentation/devicetree/bindings/mailbox/arm-smc.txt diff --git a/Documentation/devicetree/bindings/mailbox/arm-smc.txt b

[RFC PATCH 1/5] mailbox: introduce ARM SMC based mailbox

is not implemented. This allows the usage of a mailbox to trigger firmware actions on SoCs which either don't have a separate management processor or on which such a core is not available. A user of this mailbox could be the SCP interface. Signed-off-by: Andre Przywara --- drivers/mailbox/Kconfig

[RFC PATCH 5/5] arm64: dts: sunxi: add MMC nodes to Pine64 and BPi-M64 .dts

this one disabled for now. Signed-off-by: Andre Przywara <andre.przyw...@arm.com> --- .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 29 ++ .../arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 20 +++ 2 files changed, 49 insertions(+) diff --git a/arch/arm6

[RFC PATCH 5/5] arm64: dts: sunxi: add MMC nodes to Pine64 and BPi-M64 .dts

this one disabled for now. Signed-off-by: Andre Przywara --- .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 29 ++ .../arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 20 +++ 2 files changed, 49 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64

[RFC PATCH 3/5] arm64: dts: sunxi: add SCPI node to sun50i-a64.dtsi

Support for variable frequency clocks is implemented in ARM Trusted Firmware, which sits in SRAM and waits for SCPI requests. Add the respective SMC mailbox node and a 512-byte chunk of SRAM to allow SCPI calls to be handled by the firmware. Signed-off-by: Andre Przywara <andre.przyw...@arm.

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