on that particular cpu, but with all the online cpus (which are protected by
the get_online_cpus lock). Remove the restriction and the BUG_ON goes away.
Reported-and-Tested-by: Peter Wu
Acked-by: Michal Hocko
Signed-off-by: Don Zickus
---
kernel/watchdog.c |2 --
1 files changed, 0 insertions
agressive as we are not doing anything
on that particular cpu, but with all the online cpus (which are protected by
the get_online_cpus lock). Remove the restriction and the BUG_ON goes away.
Reported-and-Tested-by: Peter Wu pe...@lekensteyn.nl
Acked-by: Michal Hocko mho...@suse.cz
Signed-off-by: Don
On Mon, Jun 16, 2014 at 04:12:44PM +0200, Peter Wu wrote:
> Hi,
>
> Writing to /proc/sys/kernel/watchdog_thresh causes the following BUG in
> at least v3.13-rc2-625-g06151db, v3.15 and v3.16-rc1. Kernel config is
> attached.
>
> It was originally found on bare metal, since then reproduced in
On Thu, Jun 12, 2014 at 09:37:16AM +0200, Peter Zijlstra wrote:
> On Thu, Jun 12, 2014 at 04:00:11PM +0900, HATAYAMA Daisuke wrote:
> > Also, I checked cpuid on the system with Neharlem processor where I
> > have never seen CondChg bit is set.
> >
> > [root@localhost ~]# ./cpuid -r
> > CPU 0:
> >
talk with Intel why this bit is
set to begin with. Our customer says their BIOS doesn't use the PMU
during boot so it wasn't clear why this is now set on IVBs (though I don't
see them on Intel whitebox IVBs).
I am for this patch as it solves our problem too. But it makes me wonder
if this is
On Thu, Jun 12, 2014 at 09:37:16AM +0200, Peter Zijlstra wrote:
> On Thu, Jun 12, 2014 at 04:00:11PM +0900, HATAYAMA Daisuke wrote:
> > Also, I checked cpuid on the system with Neharlem processor where I
> > have never seen CondChg bit is set.
> >
> > [root@localhost ~]# ./cpuid -r
> > CPU 0:
> >
On Thu, Jun 12, 2014 at 09:37:16AM +0200, Peter Zijlstra wrote:
On Thu, Jun 12, 2014 at 04:00:11PM +0900, HATAYAMA Daisuke wrote:
Also, I checked cpuid on the system with Neharlem processor where I
have never seen CondChg bit is set.
[root@localhost ~]# ./cpuid -r
CPU 0:
as it solves our problem too. But it makes me wonder
if this is just yet another workaround for something broken deeper.
Acked-by: Don Zickus dzic...@redhat.com
Signed-off-by: HATAYAMA Daisuke d.hatay...@jp.fujitsu.com
---
arch/x86/kernel/cpu/perf_event_intel.c |9 +
1 file
On Thu, Jun 12, 2014 at 09:37:16AM +0200, Peter Zijlstra wrote:
On Thu, Jun 12, 2014 at 04:00:11PM +0900, HATAYAMA Daisuke wrote:
Also, I checked cpuid on the system with Neharlem processor where I
have never seen CondChg bit is set.
[root@localhost ~]# ./cpuid -r
CPU 0:
On Mon, Jun 16, 2014 at 04:12:44PM +0200, Peter Wu wrote:
Hi,
Writing to /proc/sys/kernel/watchdog_thresh causes the following BUG in
at least v3.13-rc2-625-g06151db, v3.15 and v3.16-rc1. Kernel config is
attached.
It was originally found on bare metal, since then reproduced in QEMU in
Commit-ID: a5a5ba72843dd05f991184d6cb9a4471acce1005
Gitweb: http://git.kernel.org/tip/a5a5ba72843dd05f991184d6cb9a4471acce1005
Author: Don Zickus
AuthorDate: Fri, 30 May 2014 10:49:42 -0400
Committer: Jiri Olsa
CommitDate: Mon, 9 Jun 2014 13:34:46 +0200
Revert "perf: Di
Commit-ID: 2b1b71003ea809e619bd73e74dfc2a73069de66f
Gitweb: http://git.kernel.org/tip/2b1b71003ea809e619bd73e74dfc2a73069de66f
Author: Don Zickus
AuthorDate: Fri, 30 May 2014 16:10:05 -0400
Committer: Jiri Olsa
CommitDate: Mon, 9 Jun 2014 13:34:48 +0200
perf tools: Add support
Commit-ID: 7365be55eee37ddb4f487263b4ba5bc8beb9638f
Gitweb: http://git.kernel.org/tip/7365be55eee37ddb4f487263b4ba5bc8beb9638f
Author: Don Zickus
AuthorDate: Tue, 27 May 2014 12:28:05 -0400
Committer: Jiri Olsa
CommitDate: Mon, 9 Jun 2014 13:34:48 +0200
perf tools: Add cpumode
Commit-ID: 9b32ba71ba905b90610fc2aad77cb98a373c5624
Gitweb: http://git.kernel.org/tip/9b32ba71ba905b90610fc2aad77cb98a373c5624
Author: Don Zickus
AuthorDate: Sun, 1 Jun 2014 15:38:29 +0200
Committer: Jiri Olsa
CommitDate: Mon, 9 Jun 2014 13:34:49 +0200
perf tools: Add dcacheline sort
Commit-ID: 75e906c9601aee73b88d6e6dc02371f8c3ca24d7
Gitweb: http://git.kernel.org/tip/75e906c9601aee73b88d6e6dc02371f8c3ca24d7
Author: Don Zickus
AuthorDate: Fri, 23 May 2014 18:41:23 +0200
Committer: Jiri Olsa
CommitDate: Mon, 9 Jun 2014 13:34:47 +0200
perf report: Add mem-mode
Commit-ID: 7ef807034ef33f8afe33fa7957c73954e8e4f89c
Gitweb: http://git.kernel.org/tip/7ef807034ef33f8afe33fa7957c73954e8e4f89c
Author: Don Zickus
AuthorDate: Mon, 19 May 2014 15:13:49 -0400
Committer: Jiri Olsa
CommitDate: Mon, 9 Jun 2014 13:34:45 +0200
perf tools: Update mmap2
Commit-ID: 7ef807034ef33f8afe33fa7957c73954e8e4f89c
Gitweb: http://git.kernel.org/tip/7ef807034ef33f8afe33fa7957c73954e8e4f89c
Author: Don Zickus dzic...@redhat.com
AuthorDate: Mon, 19 May 2014 15:13:49 -0400
Committer: Jiri Olsa jo...@kernel.org
CommitDate: Mon, 9 Jun 2014 13:34:45
Commit-ID: 75e906c9601aee73b88d6e6dc02371f8c3ca24d7
Gitweb: http://git.kernel.org/tip/75e906c9601aee73b88d6e6dc02371f8c3ca24d7
Author: Don Zickus dzic...@redhat.com
AuthorDate: Fri, 23 May 2014 18:41:23 +0200
Committer: Jiri Olsa jo...@kernel.org
CommitDate: Mon, 9 Jun 2014 13:34:47
Commit-ID: 9b32ba71ba905b90610fc2aad77cb98a373c5624
Gitweb: http://git.kernel.org/tip/9b32ba71ba905b90610fc2aad77cb98a373c5624
Author: Don Zickus dzic...@redhat.com
AuthorDate: Sun, 1 Jun 2014 15:38:29 +0200
Committer: Jiri Olsa jo...@kernel.org
CommitDate: Mon, 9 Jun 2014 13:34:49 +0200
Commit-ID: a5a5ba72843dd05f991184d6cb9a4471acce1005
Gitweb: http://git.kernel.org/tip/a5a5ba72843dd05f991184d6cb9a4471acce1005
Author: Don Zickus dzic...@redhat.com
AuthorDate: Fri, 30 May 2014 10:49:42 -0400
Committer: Jiri Olsa jo...@kernel.org
CommitDate: Mon, 9 Jun 2014 13:34:46
Commit-ID: 2b1b71003ea809e619bd73e74dfc2a73069de66f
Gitweb: http://git.kernel.org/tip/2b1b71003ea809e619bd73e74dfc2a73069de66f
Author: Don Zickus dzic...@redhat.com
AuthorDate: Fri, 30 May 2014 16:10:05 -0400
Committer: Jiri Olsa jo...@kernel.org
CommitDate: Mon, 9 Jun 2014 13:34:48
Commit-ID: 7365be55eee37ddb4f487263b4ba5bc8beb9638f
Gitweb: http://git.kernel.org/tip/7365be55eee37ddb4f487263b4ba5bc8beb9638f
Author: Don Zickus dzic...@redhat.com
AuthorDate: Tue, 27 May 2014 12:28:05 -0400
Committer: Jiri Olsa jo...@kernel.org
CommitDate: Mon, 9 Jun 2014 13:34:48
Hi Arnaldo,
I am hijacking your thread for another Makefile problem. It seems like
you were doing some cleanups here, so I wanted to throw another problem at
you. :-)
It seems the fedora-kernel guys found a multilib packaging problem and
posted a patch to clean it up. It is from Kyle McMartin
Hi Arnaldo,
I am hijacking your thread for another Makefile problem. It seems like
you were doing some cleanups here, so I wanted to throw another problem at
you. :-)
It seems the fedora-kernel guys found a multilib packaging problem and
posted a patch to clean it up. It is from Kyle McMartin
Different arches may have different cacheline sizes. Look it up and set
a global variable for reference.
Signed-off-by: Don Zickus
---
V4: make it super simple using a sysconf (Arnaldo)
V3: remove unneeded cpumap.h (Namhyung Kim)
V2: change to be global and setup in perf.c
use
On Fri, May 30, 2014 at 12:28:30PM -0300, Arnaldo Carvalho de Melo wrote:
> Em Fri, May 30, 2014 at 10:50:25AM -0400, Don Zickus escreveu:
> > Different arches may have different cacheline sizes. Look it up and set
> > a global variable for reference.
>
> [acme@zoo linux]$ s
Different arches may have different cacheline sizes. Look it up and set
a global variable for reference.
Signed-off-by: Don Zickus
---
V3: remove unneeded cpumap.h (Namhyung Kim)
V2: change to be global and setup in perf.c
use filename__read_int for setup
---
tools/perf/perf.c| 5
ded updating to use mmap2 interface
Signed-off-by: Don Zickus
---
v3: restore comment (Namhyung Kim)
move ino assignment (Namhyung Kim)
v2: added a better changelog
fix a unwind test (thanks Jiri)
---
kernel/events/core.c| 4
tools/perf/tests/dwarf-unwind.c | 2 +-
to
updating to use mmap2 interface
Signed-off-by: Don Zickus dzic...@redhat.com
---
v3: restore comment (Namhyung Kim)
move ino assignment (Namhyung Kim)
v2: added a better changelog
fix a unwind test (thanks Jiri)
---
kernel/events/core.c| 4
tools/perf/tests/dwarf-unwind.c
Different arches may have different cacheline sizes. Look it up and set
a global variable for reference.
Signed-off-by: Don Zickus dzic...@redhat.com
---
V3: remove unneeded cpumap.h (Namhyung Kim)
V2: change to be global and setup in perf.c
use filename__read_int for setup
---
tools/perf
On Fri, May 30, 2014 at 12:28:30PM -0300, Arnaldo Carvalho de Melo wrote:
Em Fri, May 30, 2014 at 10:50:25AM -0400, Don Zickus escreveu:
Different arches may have different cacheline sizes. Look it up and set
a global variable for reference.
[acme@zoo linux]$ strings `which getconf
Different arches may have different cacheline sizes. Look it up and set
a global variable for reference.
Signed-off-by: Don Zickus dzic...@redhat.com
---
V4: make it super simple using a sysconf (Arnaldo)
V3: remove unneeded cpumap.h (Namhyung Kim)
V2: change to be global and setup in perf.c
The kernel piece passes more info now. Update the perf tool to reflect
that and adjust the synthesized maps to play along.
Signed-off-by: Don Zickus
---
tools/perf/util/event.c | 23 +--
tools/perf/util/event.h | 2 ++
tools/perf/util/machine.c | 4 +++-
tools/perf
Add mem-mode sorting types and mem-mode itself to perf-report documentation.
Signed-off-by: Don Zickus
---
tools/perf/Documentation/perf-report.txt | 22 ++
1 file changed, 22 insertions(+)
diff --git a/tools/perf/Documentation/perf-report.txt
b/tools/perf/Documentation
ded updating to use mmap2 interface
Signed-off-by: Don Zickus
---
v2: added a better changelog
fix a unwind test (thanks Jiri)
---
kernel/events/core.c| 4
tools/perf/tests/dwarf-unwind.c | 2 +-
tools/perf/util/event.c | 36 +++-
to
prematurely tabbing over and mis-aligning. Not sure what the problem is.
Signed-off-by: Don Zickus
---
V4: call cacheline_size directly
v3: fix header column length
V2: update using cpu__cacheline_size()
---
tools/perf/Documentation/perf-report.txt | 3 +-
tools/perf/builtin-report.c
The next patch needs to sort on cpumode, so add it to hist_entry to be tracked.
Signed-off-by: Don Zickus
---
tools/perf/util/hist.c | 7 ---
tools/perf/util/sort.h | 1 +
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/tools/perf/util/hist.c b/tools/perf/util/hist.c
index
(Andi Kleen)
Don Zickus (7):
events, perf: Pass protection and flags bits through mmap2 interface
Revert "perf: Disable PERF_RECORD_MMAP2 support"
perf: Update mmap2 interface with protection and flag bits
perf report: Add mem-mode documentation to report command
perf: Add cpumode
From: Peter Zijlstra
The mmap2 interface was missing the protection and flags bits needed to
accurately determine if a mmap memory area was shared or private and
if it was readable or not.
Signed-off-by: Peter Zijlstra
[tweaked patch to compile and wrote changelog]
Signed-off-by: Don Zickus
Different arches may have different cacheline sizes. Look it up and set
a global variable for reference.
Signed-off-by: Don Zickus
---
V2: change to be global and setup in perf.c
use filename__read_int for setup
---
tools/perf/perf.c| 5 +
tools/perf/util/cpumap.c | 27
Different arches may have different cacheline sizes. Look it up and set
a global variable for reference.
Signed-off-by: Don Zickus dzic...@redhat.com
---
V2: change to be global and setup in perf.c
use filename__read_int for setup
---
tools/perf/perf.c| 5 +
tools/perf/util
The next patch needs to sort on cpumode, so add it to hist_entry to be tracked.
Signed-off-by: Don Zickus dzic...@redhat.com
---
tools/perf/util/hist.c | 7 ---
tools/perf/util/sort.h | 1 +
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/tools/perf/util/hist.c b/tools/perf
prematurely tabbing over and mis-aligning. Not sure what the problem is.
Signed-off-by: Don Zickus dzic...@redhat.com
---
V4: call cacheline_size directly
v3: fix header column length
V2: update using cpu__cacheline_size()
---
tools/perf/Documentation/perf-report.txt | 3 +-
tools/perf/builtin
(Andi Kleen)
Don Zickus (7):
events, perf: Pass protection and flags bits through mmap2 interface
Revert perf: Disable PERF_RECORD_MMAP2 support
perf: Update mmap2 interface with protection and flag bits
perf report: Add mem-mode documentation to report command
perf: Add cpumode to struct
and wrote changelog]
Signed-off-by: Don Zickus dzic...@redhat.com
---
include/uapi/linux/perf_event.h | 1 +
kernel/events/core.c| 33 +
2 files changed, 34 insertions(+)
diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h
index
updating to use mmap2 interface
Signed-off-by: Don Zickus dzic...@redhat.com
---
v2: added a better changelog
fix a unwind test (thanks Jiri)
---
kernel/events/core.c| 4
tools/perf/tests/dwarf-unwind.c | 2 +-
tools/perf/util/event.c | 36
Add mem-mode sorting types and mem-mode itself to perf-report documentation.
Signed-off-by: Don Zickus dzic...@redhat.com
---
tools/perf/Documentation/perf-report.txt | 22 ++
1 file changed, 22 insertions(+)
diff --git a/tools/perf/Documentation/perf-report.txt
b/tools
The kernel piece passes more info now. Update the perf tool to reflect
that and adjust the synthesized maps to play along.
Signed-off-by: Don Zickus dzic...@redhat.com
---
tools/perf/util/event.c | 23 +--
tools/perf/util/event.h | 2 ++
tools/perf/util/machine.c | 4
On Fri, May 23, 2014 at 07:09:01PM +0200, Jiri Olsa wrote:
> On Mon, May 19, 2014 at 03:13:52PM -0400, Don Zickus wrote:
>
> SNIP
>
> > diff --git a/tools/perf/util/cpumap.h b/tools/perf/util/cpumap.h
> > index 61a6548..b3e7b22 100644
> > --- a/tools/perf/util/cpum
On Fri, May 23, 2014 at 06:54:06PM +0200, Jiri Olsa wrote:
> On Mon, May 19, 2014 at 03:13:52PM -0400, Don Zickus wrote:
> > Different arches may have different cacheline sizes. Look it up and set
> > a global variable for reference.
> >
> > Signed-off-by: Don Zick
On Fri, May 23, 2014 at 06:54:06PM +0200, Jiri Olsa wrote:
On Mon, May 19, 2014 at 03:13:52PM -0400, Don Zickus wrote:
Different arches may have different cacheline sizes. Look it up and set
a global variable for reference.
Signed-off-by: Don Zickus dzic...@redhat.com
---
tools
On Fri, May 23, 2014 at 07:09:01PM +0200, Jiri Olsa wrote:
On Mon, May 19, 2014 at 03:13:52PM -0400, Don Zickus wrote:
SNIP
diff --git a/tools/perf/util/cpumap.h b/tools/perf/util/cpumap.h
index 61a6548..b3e7b22 100644
--- a/tools/perf/util/cpumap.h
+++ b/tools/perf/util/cpumap.h
On Wed, May 21, 2014 at 08:17:56PM +0200, Peter Zijlstra wrote:
> On Wed, May 21, 2014 at 12:48:48PM -0400, Don Zickus wrote:
> > On Wed, May 21, 2014 at 12:38:46PM +0200, Peter Zijlstra wrote:
> > > On Thu, May 15, 2014 at 03:25:48PM -0400, Don Zickus wrote:
> > > >
On Wed, May 21, 2014 at 07:51:49PM +0200, Peter Zijlstra wrote:
> On Wed, May 21, 2014 at 12:45:25PM -0400, Don Zickus wrote:
> > > > + /*
> > > > +* Can't use send_IPI_self here because it will
> > > > +* send an NMI in IRQ context
On Wed, May 21, 2014 at 12:38:46PM +0200, Peter Zijlstra wrote:
> On Thu, May 15, 2014 at 03:25:48PM -0400, Don Zickus wrote:
> > Now that we have setup an NMI subtye called NMI_EXT, there is really
> > no need to hard code the default external NMI handler in the main
> >
On Wed, May 21, 2014 at 12:29:34PM +0200, Peter Zijlstra wrote:
> On Thu, May 15, 2014 at 03:25:44PM -0400, Don Zickus wrote:
> > +DEFINE_PER_CPU(bool, nmi_delayed_work_pending);
> > +
> > +static void nmi_delayed_work_func(struct irq_work *irq_work)
> > +{
> > +
On Wed, May 21, 2014 at 12:29:34PM +0200, Peter Zijlstra wrote:
On Thu, May 15, 2014 at 03:25:44PM -0400, Don Zickus wrote:
+DEFINE_PER_CPU(bool, nmi_delayed_work_pending);
+
+static void nmi_delayed_work_func(struct irq_work *irq_work)
+{
+ DECLARE_BITMAP(nmi_mask, NR_CPUS
On Wed, May 21, 2014 at 12:38:46PM +0200, Peter Zijlstra wrote:
On Thu, May 15, 2014 at 03:25:48PM -0400, Don Zickus wrote:
Now that we have setup an NMI subtye called NMI_EXT, there is really
no need to hard code the default external NMI handler in the main
nmi handler routine.
Move
On Wed, May 21, 2014 at 07:51:49PM +0200, Peter Zijlstra wrote:
On Wed, May 21, 2014 at 12:45:25PM -0400, Don Zickus wrote:
+ /*
+* Can't use send_IPI_self here because it will
+* send an NMI in IRQ context which is not what
+* we want. Create
On Wed, May 21, 2014 at 08:17:56PM +0200, Peter Zijlstra wrote:
On Wed, May 21, 2014 at 12:48:48PM -0400, Don Zickus wrote:
On Wed, May 21, 2014 at 12:38:46PM +0200, Peter Zijlstra wrote:
On Thu, May 15, 2014 at 03:25:48PM -0400, Don Zickus wrote:
Now that we have setup an NMI subtye
From: Peter Zijlstra
The mmap2 interface was missing the protection and flags bits needed to
accurately determine if a mmap memory area was shared or private and
if it was readable or not.
Signed-off-by: Peter Zijlstra
[tweaked patch to compile and wrote changelog]
Signed-off-by: Don Zickus
ded updating to use mmap2 interface
Signed-off-by: Don Zickus
---
v2: added a better changelog
fix a unwind test (thanks Jiri)
---
kernel/events/core.c| 4
tools/perf/tests/dwarf-unwind.c | 2 +-
tools/perf/util/event.c | 36 +++-
to
header column length
V2: adding irq_work items to handled possible lost NMIs (new patch 1)
modified output of /proc/interrupts based on feedback (patch 6)
Don Zickus (5):
x86, nmi: Add new nmi type 'external'
x86, nmi: Add boot line option 'panic_on_unrecovered_nmi' and
'panic_on_io_nmi
prematurely tabbing over and mis-aligning. Not sure what the problem is.
Signed-off-by: Don Zickus
---
v3: fix header column length
V2: update using cpu__cacheline_size()
---
tools/perf/Documentation/perf-report.txt | 3 +-
tools/perf/builtin-report.c | 2 +-
tools/perf/util/hist.c
The next patch needs to sort on cpumode, so add it to hist_entry to be tracked.
Signed-off-by: Don Zickus
---
tools/perf/util/hist.c | 7 ---
tools/perf/util/sort.h | 1 +
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/tools/perf/util/hist.c b/tools/perf/util/hist.c
index
Different arches may have different cacheline sizes. Look it up and set
a global variable for reference.
Signed-off-by: Don Zickus
---
tools/perf/util/cpumap.c | 31 +++
tools/perf/util/cpumap.h | 12
tools/perf/util/sort.c | 3 +++
3 files changed
The kernel piece passes more info now. Update the perf tool to reflect
that and adjust the synthesized maps to play along.
Signed-off-by: Don Zickus
---
tools/perf/util/event.c | 23 +--
tools/perf/util/event.h | 2 ++
tools/perf/util/machine.c | 4 +++-
tools/perf
Add mem-mode sorting types and mem-mode itself to perf-report documentation.
Signed-off-by: Don Zickus
---
tools/perf/Documentation/perf-report.txt | 22 ++
1 file changed, 22 insertions(+)
diff --git a/tools/perf/Documentation/perf-report.txt
b/tools/perf/Documentation
On Mon, May 19, 2014 at 03:34:14PM +0200, Jiri Olsa wrote:
> On Fri, May 16, 2014 at 10:30:02AM -0400, Don Zickus wrote:
> > On Fri, May 16, 2014 at 04:05:51PM +0200, Jiri Olsa wrote:
> > > On Fri, May 16, 2014 at 09:30:58AM -0400, Don Zickus wrote:
> > > > On Fri, Ma
On Mon, May 19, 2014 at 01:25:45PM +0200, Jiri Olsa wrote:
> On Fri, May 16, 2014 at 12:24:41PM -0400, Don Zickus wrote:
> > On Fri, May 16, 2014 at 06:02:43PM +0200, Stephane Eranian wrote:
> > > On Fri, May 16, 2014 at 5:59 PM, Peter Zijlstra
> > > wrote:
> >
On Mon, May 19, 2014 at 01:25:45PM +0200, Jiri Olsa wrote:
On Fri, May 16, 2014 at 12:24:41PM -0400, Don Zickus wrote:
On Fri, May 16, 2014 at 06:02:43PM +0200, Stephane Eranian wrote:
On Fri, May 16, 2014 at 5:59 PM, Peter Zijlstra pet...@infradead.org
wrote:
On Fri, May 16, 2014
On Mon, May 19, 2014 at 03:34:14PM +0200, Jiri Olsa wrote:
On Fri, May 16, 2014 at 10:30:02AM -0400, Don Zickus wrote:
On Fri, May 16, 2014 at 04:05:51PM +0200, Jiri Olsa wrote:
On Fri, May 16, 2014 at 09:30:58AM -0400, Don Zickus wrote:
On Fri, May 16, 2014 at 01:47:57PM +0200, Jiri
The kernel piece passes more info now. Update the perf tool to reflect
that and adjust the synthesized maps to play along.
Signed-off-by: Don Zickus dzic...@redhat.com
---
tools/perf/util/event.c | 23 +--
tools/perf/util/event.h | 2 ++
tools/perf/util/machine.c | 4
Add mem-mode sorting types and mem-mode itself to perf-report documentation.
Signed-off-by: Don Zickus dzic...@redhat.com
---
tools/perf/Documentation/perf-report.txt | 22 ++
1 file changed, 22 insertions(+)
diff --git a/tools/perf/Documentation/perf-report.txt
b/tools
Different arches may have different cacheline sizes. Look it up and set
a global variable for reference.
Signed-off-by: Don Zickus dzic...@redhat.com
---
tools/perf/util/cpumap.c | 31 +++
tools/perf/util/cpumap.h | 12
tools/perf/util/sort.c | 3
and wrote changelog]
Signed-off-by: Don Zickus dzic...@redhat.com
---
include/uapi/linux/perf_event.h | 1 +
kernel/events/core.c| 33 +
2 files changed, 34 insertions(+)
diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h
index
updating to use mmap2 interface
Signed-off-by: Don Zickus dzic...@redhat.com
---
v2: added a better changelog
fix a unwind test (thanks Jiri)
---
kernel/events/core.c| 4
tools/perf/tests/dwarf-unwind.c | 2 +-
tools/perf/util/event.c | 36
header column length
V2: adding irq_work items to handled possible lost NMIs (new patch 1)
modified output of /proc/interrupts based on feedback (patch 6)
Don Zickus (5):
x86, nmi: Add new nmi type 'external'
x86, nmi: Add boot line option 'panic_on_unrecovered_nmi' and
'panic_on_io_nmi
prematurely tabbing over and mis-aligning. Not sure what the problem is.
Signed-off-by: Don Zickus dzic...@redhat.com
---
v3: fix header column length
V2: update using cpu__cacheline_size()
---
tools/perf/Documentation/perf-report.txt | 3 +-
tools/perf/builtin-report.c | 2 +-
tools
The next patch needs to sort on cpumode, so add it to hist_entry to be tracked.
Signed-off-by: Don Zickus dzic...@redhat.com
---
tools/perf/util/hist.c | 7 ---
tools/perf/util/sort.h | 1 +
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/tools/perf/util/hist.c b/tools/perf
On Fri, May 16, 2014 at 06:02:43PM +0200, Stephane Eranian wrote:
> On Fri, May 16, 2014 at 5:59 PM, Peter Zijlstra wrote:
> > On Fri, May 16, 2014 at 04:09:59PM +0200, Stephane Eranian wrote:
> >> > +#define CACHE_LINESIZE 64
> >> I had something similar to your patch here in my original
On Fri, May 16, 2014 at 05:45:38PM +0200, Peter Zijlstra wrote:
> On Fri, May 16, 2014 at 09:33:00AM -0400, Don Zickus wrote:
> > On Fri, May 16, 2014 at 02:22:19PM +0200, Peter Zijlstra wrote:
> > > On Tue, May 13, 2014 at 12:48:12PM -0400, Don Zickus wrote:
> >
On Fri, May 16, 2014 at 04:05:51PM +0200, Jiri Olsa wrote:
> On Fri, May 16, 2014 at 09:30:58AM -0400, Don Zickus wrote:
> > On Fri, May 16, 2014 at 01:47:57PM +0200, Jiri Olsa wrote:
> > > On Tue, May 13, 2014 at 12:48:17PM -0400, Don Zickus wrote:
> > > > In perf's
On Fri, May 16, 2014 at 04:09:59PM +0200, Stephane Eranian wrote:
> > diff --git a/tools/perf/util/sort.c b/tools/perf/util/sort.c
> > index 635cd8f..0e91ba9 100644
> > --- a/tools/perf/util/sort.c
> > +++ b/tools/perf/util/sort.c
> > @@ -1,3 +1,4 @@
> > +#include
> > #include "sort.h"
> >
On Thu, Apr 17, 2014 at 05:03:44PM -0700, Andi Kleen wrote:
> From: Andi Kleen
>
> - We were allowing some sub events in c4 that are not in the event list.
> Tighten the check slightly.
> - We were missing some valid subevents in d1-d3. Allow all subevents.
>
> Signed-off-by: Andi Kleen
> ---
On Fri, May 16, 2014 at 02:22:19PM +0200, Peter Zijlstra wrote:
> On Tue, May 13, 2014 at 12:48:12PM -0400, Don Zickus wrote:
> > From: Peter Zijlstra
> >
> > The mmap2 interface was missing the protection and flags bits needed to
> > accurately determine if a
On Fri, May 16, 2014 at 01:47:57PM +0200, Jiri Olsa wrote:
> On Tue, May 13, 2014 at 12:48:17PM -0400, Don Zickus wrote:
> > In perf's 'mem-mode', one can get access to a whole bunch of details
> > specific to a
> > particular sample instruction. A bunch of those detai
On Fri, May 16, 2014 at 01:25:14PM +0200, Jiri Olsa wrote:
> On Tue, May 13, 2014 at 12:48:13PM -0400, Don Zickus wrote:
>
> SNIP
>
> > - /*
> > -* Anon maps don't have the execname.
> > -*/
> > - if (n < 4)
&
On Fri, May 16, 2014 at 01:25:14PM +0200, Jiri Olsa wrote:
On Tue, May 13, 2014 at 12:48:13PM -0400, Don Zickus wrote:
SNIP
- /*
-* Anon maps don't have the execname.
-*/
- if (n 4)
+ n = sscanf(bf, %PRIx64-%PRIx64 %s %PRIx64
On Fri, May 16, 2014 at 01:47:57PM +0200, Jiri Olsa wrote:
On Tue, May 13, 2014 at 12:48:17PM -0400, Don Zickus wrote:
In perf's 'mem-mode', one can get access to a whole bunch of details
specific to a
particular sample instruction. A bunch of those details relate to the data
address
On Fri, May 16, 2014 at 02:22:19PM +0200, Peter Zijlstra wrote:
On Tue, May 13, 2014 at 12:48:12PM -0400, Don Zickus wrote:
From: Peter Zijlstra a.p.zijls...@chello.nl
The mmap2 interface was missing the protection and flags bits needed to
accurately determine if a mmap memory area
On Thu, Apr 17, 2014 at 05:03:44PM -0700, Andi Kleen wrote:
From: Andi Kleen a...@linux.intel.com
- We were allowing some sub events in c4 that are not in the event list.
Tighten the check slightly.
- We were missing some valid subevents in d1-d3. Allow all subevents.
Signed-off-by: Andi
On Fri, May 16, 2014 at 04:09:59PM +0200, Stephane Eranian wrote:
diff --git a/tools/perf/util/sort.c b/tools/perf/util/sort.c
index 635cd8f..0e91ba9 100644
--- a/tools/perf/util/sort.c
+++ b/tools/perf/util/sort.c
@@ -1,3 +1,4 @@
+#include sys/mman.h
#include sort.h
#include
On Fri, May 16, 2014 at 04:05:51PM +0200, Jiri Olsa wrote:
On Fri, May 16, 2014 at 09:30:58AM -0400, Don Zickus wrote:
On Fri, May 16, 2014 at 01:47:57PM +0200, Jiri Olsa wrote:
On Tue, May 13, 2014 at 12:48:17PM -0400, Don Zickus wrote:
In perf's 'mem-mode', one can get access
On Fri, May 16, 2014 at 05:45:38PM +0200, Peter Zijlstra wrote:
On Fri, May 16, 2014 at 09:33:00AM -0400, Don Zickus wrote:
On Fri, May 16, 2014 at 02:22:19PM +0200, Peter Zijlstra wrote:
On Tue, May 13, 2014 at 12:48:12PM -0400, Don Zickus wrote:
From: Peter Zijlstra a.p.zijls
On Fri, May 16, 2014 at 06:02:43PM +0200, Stephane Eranian wrote:
On Fri, May 16, 2014 at 5:59 PM, Peter Zijlstra pet...@infradead.org wrote:
On Fri, May 16, 2014 at 04:09:59PM +0200, Stephane Eranian wrote:
+#define CACHE_LINESIZE 64
I had something similar to your patch here in my
On Thu, May 15, 2014 at 03:25:43PM -0400, Don Zickus wrote:
> I started this patch by fixing a performance problem with the GHES
> NMI handler and then things evolved to more patches as I was poking
> around in the code.
>
> The main focus was moving the GHES NMI driver to its
On Thu, May 15, 2014 at 10:08:51PM +0200, Stephane Eranian wrote:
> On Thu, May 15, 2014 at 9:56 PM, Don Zickus wrote:
> > On Thu, May 15, 2014 at 05:56:44PM +0200, Stephane Eranian wrote:
> >>
> >> This patch fixes a bug in precise_store_data_hsw() whereby
> &
ed to make sure we are not
missing one more case.
Thanks for the quick patch Stephane!
Tested-and-Reviewed-by: Don Zickus
>
> Signed-off-by: Stephane Eranian
>
> diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c
> b/arch/x86/kernel/cpu/perf_event_intel_d
boxes to test performance results.
V2: adding irq_work items to handled possible lost NMIs (new patch 1)
modified output of /proc/interrupts based on feedback (patch 6)
Don Zickus (5):
x86, nmi: Add new nmi type 'external'
x86, nmi: Add boot line option 'panic_on_unrecovered_nmi
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