The SuperH/J2 DT platform code is not a clock provider, and just needs
to call of_clk_init().
Hence it can include instead of .
Signed-off-by: Geert Uytterhoeven
Reviewed-by: Stephen Boyd
---
v2:
- Add Reviewed-by.
---
arch/sh/boards/of-generic.c | 2 +-
1 file changed, 1 insertion(+), 1
Restore alignment of the continuation of the devm_ioremap() call in
register_intc_controller().
Fixes: 4bdc0d676a643140 ("remove ioremap_nocache and devm_ioremap_nocache")
Signed-off-by: Geert Uytterhoeven
---
drivers/sh/intc/core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletio
request_queue.rpm_status is assigned values of the rpm_status enum only,
so reflect that in its type.
Note that including is (currently) a no-op, as it is
already included through and , but it is
better to play it safe.
Signed-off-by: Geert Uytterhoeven
Acked-by: Rafael J. Wysocki
---
v3
The Xtensa time code is not a clock provider, and just needs to call
of_clk_init().
Hence it can include instead of .
Signed-off-by: Geert Uytterhoeven
Reviewed-by: Stephen Boyd
Acked-by: Max Filippov
---
v2:
- Add Reviewed-by, Acked-by.
---
arch/xtensa/kernel/time.c | 2 +-
1 file
The MicroBlaze platform code is not a clock provider, and just needs to
call of_clk_init().
Hence it can include instead of .
Signed-off-by: Geert Uytterhoeven
Reviewed-by: Stephen Boyd
---
v2:
- Add Reviewed-by.
---
arch/microblaze/kernel/setup.c | 2 +-
1 file changed, 1 insertion(+), 1
The H8/300 platform code is not a clock provider, and just needs to call
of_clk_init().
Hence it can include instead of .
Signed-off-by: Geert Uytterhoeven
Reviewed-by: Stephen Boyd
---
v2:
- Add Reviewed-by.
---
arch/h8300/kernel/setup.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion
similar fix was already applied to arch/h8300/boot/dts/edosk2674.dts
in commit 780ffcd51cb28717 ("h8300: register address fix").
Fixes: 38d6bded13084d50 ("h8300: devicetree source")
Signed-off-by: Geert Uytterhoeven
Reviewed-by: Masahiro Yamada
---
v2:
- Add Reviewed-by.
Fixes: f516fb704d02fff2 ("dt-bindings: Whitespace clean-ups in schema files")
Signed-off-by: Geert Uytterhoeven
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/vendor-prefix
case 4:
> - return __cmpxchg_u32(ptr, old, new);
> + case 4: return __cmpxchg_u32((int *)ptr, old, new);
> + case 2: return __cmpxchg_u16((u16 *)ptr, old, new);
> + case 1: return __cmpxchg_u8((u8 *)ptr, old, new);
> }
> __cmpxchg_called_with_bad_pointer();
> return old
On Tue, Aug 18, 2020 at 7:37 PM Christian Brauner
wrote:
> The old _do_fork() helper is removed in favor of the new kernel_clone()
> helper.
> The latter adheres to naming conventions for kernel internal syscall helpers.
>
> Cc: Kars de Jong
> Cc: Geert Uytterhoe
d be to use the .suspend_late() and .resume_early() PM
> operations for the DU, to turn the DU clock off late and turn it back on
> early. Integrating it with the DRM suspend/resume helpers will likely be
> complicated though. I wonder if we could find a more elegant solution.
>
&
s/media/platform/fsl-viu.c:17:
>arch/m68k/include/asm/raw_io.h:23: note: this is the location of the
> previous definition
> 23 | #define in_be32(addr) \
> |
Fix available for +2 years
[PATCH] media: fsl-viu: Use proper check for presence of {out,in}_be32()
https://l
On Mon, Aug 17, 2020 at 3:18 PM Geert Uytterhoeven wrote:
> Below is the list of build error/warning regressions/improvements in
> v5.9-rc1[1] compared to v5.8[2].
>
> Summarized:
> - build errors: +1/-12
> - build warnings: +68/-124
>
> Happy fixing! ;-)
>
> Tha
83:2, 50:2 =>
- modpost: WARNING: modpost: EXPORT symbol "___rw_read_enter" [vmlinux]
version generation failed, symbol will not be versioned.: N/A =>
- modpost: WARNING: modpost: EXPORT symbol "___rw_read_exit" [vmlinux]
version generation failed, symbol will n
On Wed, Apr 15, 2020 at 2:36 PM Geert Uytterhoeven wrote:
> On Thu, Apr 2, 2020 at 5:24 PM Geert Uytterhoeven
> wrote:
> > On Thu, Apr 2, 2020 at 1:28 PM Lad, Prabhakar
> > wrote:
> > > On Wed, Apr 1, 2020 at 1:43 PM Geert Uytterhoeven
> > > wrote:
>
On Wed, Aug 12, 2020 at 5:02 PM Lad Prabhakar
wrote:
> Add QSPI DT node to R8A7742 SoC dtsi.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Chris Paterson
Reviewed-by: Geert Uytterhoeven
i.e. will queue in renesas-devel for v5.10.
Gr{oetje,eeting}s,
Geer
f-by: Lad Prabhakar
> Reviewed-by: Chris Paterson
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker
On Wed, Aug 12, 2020 at 4:03 PM Lad Prabhakar
wrote:
> Setup up the required clocks for the DU to be functional.
>
> Signed-off-by: Lad Prabhakar
Reviewed-by: Geert Uytterhoeven
i.e. will queue in renesas-devel for v5.10 (after resolving the port numbering).
Gr{oetje
On Wed, Aug 12, 2020 at 4:03 PM Lad Prabhakar
wrote:
> From: Marian-Cristian Rotariu
>
> Add the LVDS device node to R8A774E1 to SoC dtsi and connect it with
> the DU node.
>
> Signed-off-by: Marian-Cristian Rotariu
>
> Signed-off-by: Lad Prabhakar
Reviewed-by: Geert
On Wed, Aug 12, 2020 at 4:03 PM Lad Prabhakar
wrote:
> From: Marian-Cristian Rotariu
>
> Populate HDMI node properties in R8A774E1 SoC dtsi.
>
> Signed-off-by: Marian-Cristian Rotariu
>
> Signed-off-by: Lad Prabhakar
Reviewed-by: Geert Uytterhoeven
i.e. will queue in re
On Wed, Aug 12, 2020 at 4:03 PM Lad Prabhakar
wrote:
> From: Marian-Cristian Rotariu
>
> Document RZ/G2H (R8A774E1) SoC bindings.
>
> Signed-off-by: Marian-Cristian Rotariu
>
> Signed-off-by: Lad Prabhakar
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
On Wed, Aug 12, 2020 at 4:03 PM Lad Prabhakar
wrote:
> From: Marian-Cristian Rotariu
>
> Document the RZ/G2H (R8A774E1) LVDS bindings.
>
> Signed-off-by: Marian-Cristian Rotariu
>
> Signed-off-by: Lad Prabhakar
For the logical change (ported to .yaml):
Reviewed-by: Ge
On Wed, Aug 12, 2020 at 4:03 PM Lad Prabhakar
wrote:
> From: Marian-Cristian Rotariu
>
> Populate the DU device node properties in R8A774E1 SoC dtsi.
>
> Signed-off-by: Marian-Cristian Rotariu
>
> Signed-off-by: Lad Prabhakar
Reviewed-by: Geert Uytterhoeven
> -
know we did it the same for R-Car M3-N and RZ/G2N.
But my main worry is adding support for R-Car H3-N later.
> R8A7779 (R-Car H1) DPAD 0 DPAD 1 - -
> R8A7790 (R-Car H2) DPAD 0 LVDS 0 LVDS 1 -
> R8A7791 (R-Car M2-W) DPAD
re about)
If you don't update commit e0fe7fc6f2ca0781 ("dt-bindings: Whitespace
clean-ups in schema files"), I can send a patch after v5.9-rc1.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
I
On Mon, Aug 10, 2020 at 7:42 PM Lad Prabhakar
wrote:
> Add a device node for the PCIe controller on the Renesas
> RZ/G1H (r8a7742) SoC.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Chris Paterson
Reviewed-by: Geert Uytterhoeven
i.e. will queue in renesas-devel for v5.10.
Gr
OINT_TEST required to use and test
> the driver.
>
> Signed-off-by: Lad Prabhakar
> ---
> v1->v2
> * Made CONFIG_PCI_EPF_TEST and CONFIG_PCI_ENDPOINT_TEST as modules
Thanks for the update!
Reviewed-by: Geert Uytterhoeven
i.e. will queue in renesas-devel for v5.10.
However, as no
On Mon, Aug 10, 2020 at 7:42 PM Lad Prabhakar
wrote:
> Add support for r8a7742. The Renesas RZ/G1H (R8A7742) PCIe controller
> is identical to the R-Car Gen2 family.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Chris Paterson
Reviewed-by: Geert Uytterhoeven
Gr
On Mon, Aug 10, 2020 at 7:12 PM Lad Prabhakar
wrote:
> Enable sata interface on HiHope RZ/G2N board.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Biju Das
Reviewed-by: Geert Uytterhoeven
i.e. will queue in renesas-devel for v5.10.
Gr{oetje,eeting}s,
bit 0 set, so
any typical end value, which is odd, will trigger the check.
Fix this by increasing the DMA boundary value by 1.
Fixes: 8bfbeed58665dbbf ("sata_rcar: correct 'sata_rcar_sht'")
Fixes: 9495b7e92f716ab2 ("driver core: platform: Initialize dma_parms for
pl
u don't have it merged already.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
On Mon, Aug 10, 2020 at 11:22 AM Lad Prabhakar
wrote:
> From: Marian-Cristian Rotariu
>
> Add FCPF and FCPV instances to the r8a774e1 dtsi.
>
> Signed-off-by: Marian-Cristian Rotariu
>
> Signed-off-by: Lad Prabhakar
Reviewed-by: Geert Uytterhoeven
i.e. will queue in re
p;cpg 626>;
> +
> + renesas,fcp = <&fcpvb1>;
According to "FCPVB0 (for VSPBD): H' FE96_F000", this should be
renesas,fcp = <&fcpvb0>;
? If you agree, I can fix that while applying.
Reviewed-by: Geert Uytterhoeven
i.e. will queu
quot;DU" on a single line? :-)
> >
> Argh my bad.
No worries, I can replace the former one by "Display Unit (DU)" while
applying.
> > > need to specify the output topology.
> > >
> > > Signed-off-by: Lad Prabhakar
> > > Reviewed-by:
> > dt-bindings: display: renesas,du: Document the r8a7742 bindings
> > > drm: rcar-du: Add r8a7742 support
> > > dt-bindings: display: renesas,lvds: Document r8a7742 bindings
> > > drm: rcar-du: lvds: Add r8a7742 support
> > > ARM: dts: r8a7
t hurt though. Same comment
> > below.
I can fix that while applying.
> Agreed, 0x1c comes from Gen-3 manuals.
All R-Car Gen3 and RZ/G2 .dtsi use 0x14 or 0x20.
All R-Car Gen2 and RZ/G1 .dtsi use 0x1c, but their manual suggests 0x14, too?
Doesn't matter much, as the hardware addr
On Sun, Aug 9, 2020 at 9:35 PM Lad Prabhakar
wrote:
> Sort the items in the compatible string list in increasing number of SoC.
>
> Signed-off-by: Lad Prabhakar
As my previous tag was conditional on fixing the sort order:
Reviewed-by: Geert Uytterhoeven
Gr{oetje
dev, dev_fmt(fmt), ##__VA_ARGS__); \
> | ^~~
Fix available since last Tuesday:
https://lore.kernel.org/linux-crypto/20200804092927.7417-1-ge...@linux-m68k.org/
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -
umentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml
Fix this by adding a proper type definition for the vendor-specific
fsl,spi-only-use-cs1-sel property.
Fixes: 7ac9bbf6ab3085c2 ("dt-bindings: lpspi: New property in document DT
bindings for LPSPI")
Suggested-by: Rob Herring
Hi Niklas,
On Fri, Aug 7, 2020 at 1:27 PM Niklas Söderlund
wrote:
> On 2020-08-06 13:47:58 +0200, Geert Uytterhoeven wrote:
> > On Thu, Aug 6, 2020 at 1:17 PM Lad, Prabhakar
> > wrote:
> > > On Wed, Aug 5, 2020 at 12:19 PM Geert Uytterhoeven
> > > wrote:
>
On Thu, Aug 6, 2020 at 8:32 PM Lad Prabhakar
wrote:
> Enable cmt0 support on r8a7742-iwg21d-q7 board.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
Reviewed-by: Geert Uytterhoeven
i.e. will queue in renesas-devel for v5.10.
Gr
On Thu, Aug 6, 2020 at 8:32 PM Lad Prabhakar
wrote:
> Add TPU support to R8A7742 SoC DT.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
Reviewed-by: Geert Uytterhoeven
i.e. will queue in renesas-devel for v5.10.
Gr{oetje,eeting}s,
On Thu, Aug 6, 2020 at 8:32 PM Lad Prabhakar
wrote:
> Add the definitions for pwm[0123456] to the SoC .dtsi.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
Reviewed-by: Geert Uytterhoeven
i.e. will queue in renesas-devel for v5.10.
Gr
-by: Marian-Cristian Rotariu
>
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I
On Thu, Aug 6, 2020 at 8:32 PM Lad Prabhakar
wrote:
> Document RZ/G1H (R8A7742) SoC bindings.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven
Hi Prabhakar,
On Thu, Aug 6, 2020 at 1:17 PM Lad, Prabhakar
wrote:
> On Wed, Aug 5, 2020 at 12:19 PM Geert Uytterhoeven
> wrote:
> > On Thu, Jul 16, 2020 at 7:20 PM Lad Prabhakar
> > wrote:
> > > Add VIN and CSI-2 nodes to RZ/G2H (R8A774E1) SoC dtsi.
> > >
On Thu, Jul 16, 2020 at 7:20 PM Lad Prabhakar
wrote:
> Add sound support for the RZ/G2H SoC (a.k.a. R8A774E1).
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
Reviewed-by: Geert Uytterhoeven
i.e. will queue in renesas-devel for v5.10.
Gr
On Thu, Jul 16, 2020 at 7:18 PM Lad Prabhakar
wrote:
> Add PCIe{0,1} device nodes for R8A774E1 SoC.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
Reviewed-by: Geert Uytterhoeven
i.e. will queue in renesas-devel for v5.10.
Gr
rse_own_gpio(hog, chip, i, &name, &lflags,
> &dflags);
> if (IS_ERR(desc))
> break;
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with tech
click on "missy".
You mean your complete hardware collection doesn't boot v5.8? ;-)
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a
On Thu, Jul 16, 2020 at 7:19 PM Lad Prabhakar
wrote:
> Add USB2.0 phy and host (EHCI/OHCI) device nodes on RZ/G2H SoC dtsi.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
Reviewed-by: Geert Uytterhoeven
i.e. will queue in renesas-devel for v5.10.
Gr
Hi Prabhakar,
On Thu, Jul 16, 2020 at 7:20 PM Lad Prabhakar
wrote:
> Add VIN and CSI-2 nodes to RZ/G2H (R8A774E1) SoC dtsi.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
Reviewed-by: Geert Uytterhoeven
However, before I queue this in renesas-devel
On Thu, Jul 16, 2020 at 7:19 PM Lad Prabhakar
wrote:
> Add usb3.0 phy, host and function device nodes on RZ/G2H SoC dtsi.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
Reviewed-by: Geert Uytterhoeven
i.e. will queue in renesas-devel for v5.10.
Gr
On Thu, Jul 16, 2020 at 7:19 PM Lad Prabhakar
wrote:
> Add the SATA controller node to the RZ/G2H SoC specific dtsi.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
Reviewed-by: Geert Uytterhoeven
i.e. will queue in renesas-devel for v5.10.
Gr
On Thu, Jul 16, 2020 at 7:19 PM Lad Prabhakar
wrote:
> Add usb dmac and hsusb device nodes to the RZ/G2H SoC dtsi.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
Reviewed-by: Geert Uytterhoeven
i.e. will queue in renesas-devel for v5.10.
Gr
On Fri, Jul 17, 2020 at 7:00 PM Lad Prabhakar
wrote:
>
> Add USB1 PWEN pin and group for USB1 interface.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Biju Das
Reviewed-by: Geert Uytterhoeven
i.e. will queue in sh-pfc-for-v5.10.
Gr{oetje,eeting}s,
G
On Fri, Jul 17, 2020 at 7:00 PM Lad Prabhakar
wrote:
> Enable support for HSUSB, USB2.0 and xHCI on iWave RZ/G1H carrier board.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
> Reviewed-by: Biju Das
Reviewed-by: Geert Uytterhoeven
i.e. will queu
On Thu, Jul 16, 2020 at 7:20 PM Lad Prabhakar
wrote:
> Document SoC specific bindings for RZ/G2H (r8a774e1) SoC.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
G
On Thu, Jul 16, 2020 at 7:19 PM Lad Prabhakar
wrote:
> Add binding for R8A774E1 SoC (RZ/G2H).
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven
On Thu, Jul 16, 2020 at 7:19 PM Lad Prabhakar
wrote:
> Document RZ/G2H (R8A774E1) SoC bindings.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven
On Thu, Jul 16, 2020 at 7:19 PM Lad Prabhakar
wrote:
> Document RZ/G2H (R8A774E1) SoC bindings.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven
- "renesas,xhci-r8a774e1" for r8a774e1 SoC
> - "renesas,xhci-r8a7790" for r8a7790 SoC
> - "renesas,xhci-r8a7791" for r8a7791 SoC
> - "renesas,xhci-r8a7793" for r8a7793 SoC
For the logical change:
Reviewed-by: Geert Uytterhoeven
Gr{oe
On Thu, Jul 16, 2020 at 7:19 PM Lad Prabhakar
wrote:
> Document RZ/G2H (R8A774E1) SoC bindings.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven
On Thu, Jul 16, 2020 at 7:18 PM Lad Prabhakar
wrote:
> Add PCIe support for the RZ/G2H (a.k.a. R8A774E1).
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Gee
On Thu, Jul 16, 2020 at 7:19 PM Lad Prabhakar
wrote:
> Document SoC specific bindings for RZ/G2H (r8a774e1) SoC.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
G
On Thu, Jul 16, 2020 at 7:19 PM Lad Prabhakar
wrote:
> Document SATA support for the RZ/G2H, no driver change required.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
G
Hi Prabhakar,
On Wed, Aug 5, 2020 at 10:01 AM Lad, Prabhakar
wrote:
> On Tue, Aug 4, 2020 at 4:32 PM Geert Uytterhoeven
> wrote:
> > On Tue, Aug 4, 2020 at 5:12 PM Lad, Prabhakar
> > wrote:
> > > On Tue, Aug 4, 2020 at 11:17 AM Geert Uytterhoeven
> > > w
Hi Prabhakar,
On Tue, Aug 4, 2020 at 5:12 PM Lad, Prabhakar
wrote:
> On Tue, Aug 4, 2020 at 11:17 AM Geert Uytterhoeven
> wrote:
> > On Tue, Aug 4, 2020 at 12:05 PM Niklas
> > wrote:
> > > On 2020-08-04 09:04:25 +0100, Lad, Prabhakar wrote:
> > > >
probe functions")
Signed-off-by: Geert Uytterhoeven
---
drivers/pci/controller/pci-rcar-gen2.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/pci/controller/pci-rcar-gen2.c
b/drivers/pci/controller/pci-rcar-gen2.c
index 046965d284a6d54e..c9530038ca9a53fc 100644
--- a/drivers/pci/
8 and bus-shift = 2 to
> be wired.
>
> >
> > So in this case for 8-bit YCbCr422 format should YDS be set I am not
> > sure. Or is this not a valid case at all ?
>
> That is my question :-)
>
> I can't find anything int the documentation that would allow is to do
> anythi
context pointer to "unsigned long" (which is
either 32-bit or 64-bit, just like pointers) instead of "u64", and
update the format specifier accordingly.
While at it, use "%u" to format unsigned int.
Fixes: 2dc53d0047458e28 ("crypto: sa2ul - add sha1/sha256/sh
depends on BLK_DEV_INITRD
> + select DECOMPRESS_ZSTD
> + help
> + Support loading of a ZSTD encoded initial ramdisk or cpio buffer.
> + If unsure, say N.
I'm aware you copied this from the other entries, but IMHO "default y",
and "If u
as well).
>
> If it gets fixed upstream, I'll fix it here :)
And else you'll release a known-broken v5.7.13?
Perhaps backporting should be a bit less aggressive?
This breakage was introduced in between v5.8-rc7 and v5.8, and backported
before people had the time to properly look in
tively used, valid for the
parallel busses.
- data-shift: on the parallel data busses, if bus-width is used to specify the
number of data lines, data-shift can be used to specify which data lines are
used, e.g. "bus-width=<8>; data-shift=<2>;" means, that lines 9:2
Hi Michael,
On Mon, Aug 3, 2020 at 1:09 PM Michael Ellerman wrote:
> Geert Uytterhoeven writes:
> > On Mon, Jul 20, 2020 at 11:03 PM Segher Boessenkool
> > wrote:
> >> On Sat, Jul 18, 2020 at 09:50:50AM +0200, Geert Uytterhoeven wrote:
> >> > On Wed, Jun 2
: mac: Fix IOP status/control register writes
m68k: mac: Don't send uninitialized data in IOP message reply
m68k: mac: Improve IOP debug messages
Geert Uytterhoeven (1):
m68k: defconfig: Update defconfigs for v5.8-rc3
Gustavo A. R. Silva (1):
m68k: Use sizeof_fiel
Hi Segher,
On Mon, Jul 20, 2020 at 11:03 PM Segher Boessenkool
wrote:
> On Sat, Jul 18, 2020 at 09:50:50AM +0200, Geert Uytterhoeven wrote:
> > On Wed, Jun 24, 2020 at 6:02 AM Nathan Chancellor
> > wrote:
> > > /* If we have an image attached to u
; "git log --oneline v5.7.. arch/sh/lib/delay.c" on top of next-20200721
> reports:
>
> ee0e4f15dfd4 (origin/akpm) sh: add missing EXPORT_SYMBOL() for __delay
> d1f56f318d23 sh: add missing EXPORT_SYMBOL() for __delay
>
> Maybe it just needs to be dropped from the akpm tr
On Mon, Aug 3, 2020 at 11:53 AM Geert Uytterhoeven wrote:
> JFYI, when comparing v5.8[1] to v5.8-rc7[3], the summaries are:
> - build errors: +2/-3
+ /kisskb/src/arch/powerpc/include/asm/mmu.h: error: unknown type
name 'next_tlbcam_idx': => 139:22
as no
CRC!: N/A =>
- modpost: WARNING: modpost: "clear_page" [fs/btrfs/btrfs.ko] has no CRC!:
N/A =>
- modpost: WARNING: modpost: "clear_page" [fs/fuse/fuse.ko] has no CRC!: N/A
=>
- modpost: WARNING: modpost: "clear_page" [fs/gfs2/gfs2.ko] has no CRC!:
dpost: "clear_page" [drivers/scsi/sd_mod.ko] has no
CRC!: N/A =>
- modpost: WARNING: modpost: "clear_page" [fs/btrfs/btrfs.ko] has no CRC!:
N/A =>
- modpost: WARNING: modpost: "clear_page" [fs/fuse/fuse.ko] has no CRC!: N/A
=>
- modpost: WARNING:
multi sensor part until it's needed and just learn
> the VIN driver about data-shift. From the documentation,
>
> - data-shift: on the parallel data busses, if bus-width is used to
> specify the number of data lines, data-shift can be used to specify
CONFIG_IOMEM does not exist. The correct symbol to depend on is
CONFIG_HAS_IOMEM.
Fixes: 1e7468bd9d30a21e ("clk: Specify IOMEM dependency for HSDK pll driver")
Signed-off-by: Geert Uytterhoeven
---
drivers/clk/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
The following commit has been merged into the timers/core branch of tip:
Commit-ID: ad7794d4dd0c3f03a81a0dbec3e9e3906edb9893
Gitweb:
https://git.kernel.org/tip/ad7794d4dd0c3f03a81a0dbec3e9e3906edb9893
Author:Geert Uytterhoeven
AuthorDate:Thu, 18 Jun 2020 10:02:12 +02:00
On Mon, Jul 20, 2020 at 3:12 PM Geert Uytterhoeven wrote:
> JFYI, when comparing v5.8-rc6[1] to v5.8-rc5[3], the summaries are:
> - build errors: +6/-3
+ error: modpost: "devm_ioremap"
[drivers/net/ethernet/xilinx/ll_temac.ko] undefined!: => N/A
+ error: modpost: &qu
ity.ko] has no
CRC!: N/A =>
- modpost: WARNING: modpost: "clear_page" [drivers/md/raid456.ko] has no
CRC!: N/A =>
- modpost: WARNING: modpost: "clear_page" [drivers/scsi/sd_mod.ko] has no
CRC!: N/A =>
- modpost: WARNING: modpost: "clear_page"
the result of their comparison is a constant, as the addresses
are constant. If clangs warns about it, perhaps that warning should be moved
to W=1?
But adding "&" is not correct, according to C.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's
tural issues (the latter still support clusters of
platforms in a single kernel).
Thank you, and have a nice weekend!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technic
e.
Which unnecessary marking is being removed?
I don't see any.
>
> [1]
> https://www.kernel.org/doc/html/latest/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through
>
> Signed-off-by: Gustavo A. R. Silva
For the actual patch contents:
Reviewed-by:
On Wed, Jul 15, 2020 at 1:10 PM Lad Prabhakar
wrote:
> Add the device nodes for RZ/G2H SCIF and HSCIF serial ports,
> including clocks, power domains and DMAs.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
Reviewed-by: Geert Uytterhoeven
i.e. wil
On Wed, Jul 15, 2020 at 1:11 PM Lad Prabhakar
wrote:
> Add CAN[01] and CANFD support to RZ/G2H (R8A774E1) SoC specific dtsi.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
Reviewed-by: Geert Uytterhoeven
i.e. will queue in renesas-devel for v5.9.
Gr
On Wed, Jul 15, 2020 at 1:10 PM Lad Prabhakar
wrote:
> Add the DT nodes needed by MSIOF[0123] interfaces to the SoC dtsi.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
Reviewed-by: Geert Uytterhoeven
i.e. will queue in renesas-devel for v5.9.
Gr
On Wed, Jul 15, 2020 at 1:10 PM Lad Prabhakar
wrote:
> Add the I2C[0-6] and IIC Bus Interface for DVFS (IIC for DVFS)
> devices nodes to the r8a774e1 device tree.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
Reviewed-by: Geert Uytterhoeven
On Wed, Jul 15, 2020 at 1:10 PM Lad Prabhakar
wrote:
> Add SDHI[0-2] device nodes to R8A774E1 SoC.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
Reviewed-by: Geert Uytterhoeven
i.e. will queue in renesas-devel for v5.9.
Gr
On Wed, Jul 15, 2020 at 1:10 PM Lad Prabhakar
wrote:
> Add a device node for the Watchdog Timer (RWDT) controller on the Renesas
> RZ/G2H (r8a774e1) SoC.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
Reviewed-by: Geert Uytterhoeven
i.e. will queu
On Wed, Jul 15, 2020 at 1:09 PM Lad Prabhakar
wrote:
> From: Marian-Cristian Rotariu
>
> This patch adds the CMT[0123] device tree nodes to the
> r8a774e1 SoC specific DT.
>
> Signed-off-by: Marian-Cristian Rotariu
>
> Signed-off-by: Lad Prabhakar
Reviewed-by: Geert
On Wed, Jul 15, 2020 at 1:10 PM Lad Prabhakar
wrote:
> From: Marian-Cristian Rotariu
>
> This patch adds TMU[01234] device tree nodes to the r8a774e1
> SoC specific DT.
>
> Signed-off-by: Marian-Cristian Rotariu
>
> Signed-off-by: Lad Prabhakar
Reviewed-by: Geert
> 800 MHz | 0.82V
> 1.0 GHz | 0.82V
> 1.2 GHz | 0.82V
I trust you on the actual values...
>
> This patch adds the definitions for the operating points to the SoC
> specific DT.
>
> Signed-off-by: Marian-Cristian Rotariu
>
> Signed-off-by: Lad Prabhakar
R
On Wed, Jul 15, 2020 at 1:09 PM Lad Prabhakar
wrote:
> From: Marian-Cristian Rotariu
>
> Add thermal support for R8A774E1 (RZ/G2H) SoC.
>
> Based on the work done for r8a774a1 SoC.
>
> Signed-off-by: Marian-Cristian Rotariu
>
> Signed-off-by: Lad Prabhakar
Revi
I haven't sent a PR for arm-soc yet, I'll fix it up in renesas-devel.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I c
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