Hi Vinod,
> -Original Message-
> From: Vinod Koul [mailto:vk...@kernel.org]
> Sent: Monday, May 4, 2020 10:46 AM
> To: Rafał Hibner
> Cc: Appana Durga Kedareswara Rao ; Radhey Shyam
> Pandey ; Harini Katakam ; Dan
> Williams ; Michal Simek ; open
> list:DM
Hi Andrew,
On Tue, Aug 13, 2019 at 9:40 PM Andrew Lunn wrote:
>
> > > The kernel does have a few helper, spi_get_drvdata, pci_get_drvdata,
> > > hci_get_drvdata. So maybe had add phydev_get_drvdata(struct phy_device
> > > *phydev)?
> >
> > Maybe phydev_mdio_get_drvdata? Because the driver data
Use set/get drv data in phydev's mdio device instead. Phy device priv
field maybe used by the external phy driver and should not be
overwritten.
Signed-off-by: Harini Katakam
---
v2:
Use mdio driver data helper.
drivers/net/phy/xilinx_gmii2rgmii.c | 4 ++--
1 file changed, 2 insertions(+), 2
Add set/get drv_data helpers for mdio device.
Signed-off-by: Harini Katakam
---
v2:
Added this patch driver data helpers in mdio instead of priv field.
include/linux/mdio.h | 11 +++
1 file changed, 11 insertions(+)
diff --git a/include/linux/mdio.h b/include/linux/mdio.h
index
Fix the usage of external phy's priv field by gmii2rgmii driver.
Based on net-next.
Harini Katakam (2):
include: mdio: Add driver data helpers
net: phy: gmii2rgmii: Dont use priv field in phy device
drivers/net/phy/xilinx_gmii2rgmii.c | 4 ++--
include/linux/mdio.h| 11
Hi Andrew,
On Tue, Aug 13, 2019 at 6:54 PM Andrew Lunn wrote:
>
> On Tue, Aug 13, 2019 at 04:46:40PM +0530, Harini Katakam wrote:
> > Hi Andrew,
> >
> > On Thu, Aug 1, 2019 at 9:36 AM Andrew Lunn wrote:
> > >
> > > On Wed, Jul 31, 2019 at 03:06:19P
Hi Andrew,
On Thu, Aug 1, 2019 at 9:36 AM Andrew Lunn wrote:
>
> On Wed, Jul 31, 2019 at 03:06:19PM +0530, Harini Katakam wrote:
> > Use the priv field in mdio device structure instead of the one in
> > phy device structure. The phy device priv field may be used by the
>
Hi Andrew,
On Mon, Aug 5, 2019 at 10:47 PM Andrew Lunn wrote:
>
> > Even with the use of this interrupt, the link status actions (link print and
> > netif ops) will still be required. And also the need for macb_open to
> > proceed without phydev. Could you please let me know if that is
Hi Andrew,
On Mon, Aug 5, 2019 at 7:00 PM Andrew Lunn wrote:
>
> On Mon, Aug 05, 2019 at 11:45:05AM +0530, Harini Katakam wrote:
> > Hi Andrew,
> >
> > On Sun, Aug 4, 2019 at 8:26 PM Andrew Lunn wrote:
> > >
> > > On Wed, Jul 31, 2019 at 03:10:32PM +053
Hi Andrew,
On Sun, Aug 4, 2019 at 8:26 PM Andrew Lunn wrote:
>
> On Wed, Jul 31, 2019 at 03:10:32PM +0530, Harini Katakam wrote:
> > Add a new property to indicate when PS SGMII is used with NO
> > external PHY on board.
>
> Hi Harini
>
> What exactly is yo
Add a new property to indicate when PS SGMII is used with NO
external PHY on board.
Signed-off-by: Harini Katakam
---
Documentation/devicetree/bindings/net/macb.txt | 4
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/macb.txt
b/Documentation/devicetree
The internal SGMII mode in PS GEM on ZynqMP can be used without any
external PHY on board. In this case, the phy framework doesn't kick
in to monitor the link status. Hence do the same in macb driver.
Signed-off-by: Harini Katakam
Signed-off-by: Kester Aernoudt
---
drivers/net/ethernet/cadence
When PS GEM is used with SGMII mode without an external PHY
on board, add a link status reporting mechanism.
Harini Katakam (2):
dt-bindings: net: macb: Add new property for PS SGMII only
net: macb: Add SGMII poll thread
Documentation/devicetree/bindings/net/macb.txt | 4 ++
drivers/net
Fix the usage of external phy's priv field by gmii2rgmii driver.
Based on net-next.
Harini Katakam (2):
include: mdio: Add private field to mdio structure
net: gmii2rgmii: Switch priv field in mdio device structure
drivers/net/phy/xilinx_gmii2rgmii.c | 4 ++--
include/linux/mdio.h
device "priv" can be used by external phy drivers,
it is not appropriate. Hence this addition to mdio device. This is
a temporary solution before the IP can be improved. The need for
this priv field can be re-evaluated later based on other mdio devices.
Signed-off-by: Harini Katakam
Use the priv field in mdio device structure instead of the one in
phy device structure. The phy device priv field may be used by the
external phy driver and should not be overwritten.
Signed-off-by: Harini Katakam
Reviewed-by: Radhey Shyam Pandey
---
drivers/net/phy/xilinx_gmii2rgmii.c | 4
The subns increment register has 24 bits as follows:
RegBit[15:0] = Subns[23:8]; RegBit[31:24] = Subns[7:0]
Fix the same in the driver and increase sub ns resolution to the
best capable, 24 bits. This should be the case on all GEM versions
that this PTP driver supports.
Signed-off-by: Harini
The scaled ppm parameter passed to _adjfine() contains a 16 bit
fraction. This just happens to be the same as SUBNSINCR_SIZE now.
Hence define this separately.
Signed-off-by: Harini Katakam
---
drivers/net/ethernet/cadence/macb.h | 3 +++
drivers/net/ethernet/cadence/macb_ptp.c | 2 +-
2
to that version or above. So, I have
increased the resolution unconditionally. Please let me know if there
is any IP versions incompatible with this - there is no register to
obtain this information from.
Changes from RFC:
None
Harini Katakam (2):
net: macb: Add separate definition for PPM
On Tue, Jun 25, 2019 at 4:17 AM wrote:
>
> On 24/06/2019 at 11:57, Palmer Dabbelt wrote:
> > External E-Mail
> >
> >
> > On Mon, 24 Jun 2019 02:40:21 PDT (-0700), nicolas.fe...@microchip.com wrote:
> >> On 24/06/2019 at 08:16, Palmer Dabbelt wrote:
> >>> External E-Mail
> >>>
> >>>
> >>> The
Hi Andrew,
On Thu, Feb 28, 2019 at 1:03 PM Harini Katakam wrote:
>
> Hi,
> On Wed, Feb 27, 2019 at 2:35 PM Harini Katakam wrote:
> >
> > Hi Andrew, Paul,
> >
> > On Wed, Feb 27, 2019 at 2:15 PM Michal Simek
> > wrote:
> > >
> > > On 21
Add TI PHY strap ctrl quirk for all the HW where applicable.
Signed-off-by: Harini Katakam
---
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts | 1 +
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts | 1 +
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dts | 1 +
arch/arm64
Add runtime pm functions and move clock handling there.
Add runtime PM calls to mdio functions to allow for active mdio bus.
Signed-off-by: Shubhrajyoti Datta
Signed-off-by: Harini Katakam
---
v3 changes:
Fix exit path using goto
v2 changes:
Allow for mdio bus to be active
Changes from RFC
TSU clock needs to be enabled/disabled as per support in devicetree
and it should also be controlled during suspend/resume (WOL has no
dependency on this clock).
Signed-off-by: Harini Katakam
---
v3 and v2:
No changes
drivers/net/ethernet/cadence/macb.h | 3 ++-
drivers/net/ethernet
Replace the while loop in MDIO read/write functions with a timeout.
In addition, add a check for MDIO bus busy before initiating a new
operation as well to make sure there is no ongoing MDIO operation.
Signed-off-by: Shubhrajyoti Datta
Signed-off-by: Sai Pavan Boddu
Signed-off-by: Harini
This series adds support for macb suspend/resume with system power down.
In relation to the above, this series also updates mdio_read/write
function for PM and adds tsu clock management.
Harini Katakam (4):
net: macb: Check MDIO state before read/write and use timeouts
net: macb: Support
-by: Kedareswara rao Appana
Signed-off-by: Harini Katakam
---
v3:
Fix >80 char lines
v2 changes:
Fixed parameter passed to phy calls.
drivers/net/ethernet/cadence/macb_main.c | 40 ++--
1 file changed, 38 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ether
Hi,
On Wed, Feb 27, 2019 at 2:35 PM Harini Katakam wrote:
>
> Hi Andrew, Paul,
>
> On Wed, Feb 27, 2019 at 2:15 PM Michal Simek wrote:
> >
> > On 21. 02. 19 12:03, Michal Simek wrote:
> > > On 21. 02. 19 11:24, Paul Kocialkowski wrote:
> > >> Hi,
&g
On Thu, Feb 28, 2019 at 12:10 AM Stephen Hemminger
wrote:
>
> On Wed, 27 Feb 2019 17:24:03 +0530
> Harini Katakam wrote:
>
>
> Device naming is a hard problem, and there is no perfect solution.
>
> Device tree should be providing hints to userspace policy for na
Hi,
We've had some users requesting control over net device name order
when multiple ethernet devices are present on a system. I've tried a
few solutions to this and looked it up on forums. But I apologize if
I have missed something.
I know that the current system allocates eth as per probe
Hi Andrew, Paul,
On Wed, Feb 27, 2019 at 2:15 PM Michal Simek wrote:
>
> On 21. 02. 19 12:03, Michal Simek wrote:
> > On 21. 02. 19 11:24, Paul Kocialkowski wrote:
> >> Hi,
> >>
> >> On Wed, 2019-02-20 at 07:58 +0100, Michal Simek wrote:
> >>> Hi,
> >>>
> >>> On 19. 02. 19 18:25, Andrew Lunn
on RX UBR interrupt. Hence introduce a
CAPS mask; enable this interrupt and workaround only on affected
versions.
Signed-off-by: Harini Katakam
---
v2 changes:
- Added caps mask in correct AT91RM9200 config
- Disabled RXUBR for devices other than AT91RM9200 and Zynq and
kept the interrupt
Hi Nicolas,
On Fri, Jan 25, 2019 at 3:58 PM wrote:
>
> On 24/01/2019 at 14:38, Harini Katakam wrote:
> > The interrupt handler contains a workaround for RX hang applicable
> > to Zynq and AT91 only. Subsequent versions do not need this
>
> AT91RM9200 only. It's not the
to enable this workaround.
Signed-off-by: Harini Katakam
---
Changes from RFC:
- Use CAPS mask instead introducing and errata field.
- Use check only on RX reset part; ISR should still be cleared.
drivers/net/ethernet/cadence/macb.h | 1 +
drivers/net/ethernet/cadence/macb_main.c | 16
-by: Kedareswara rao Appana
Signed-off-by: Harini Katakam
---
v2 changes:
Fixed parameter passed to phy calls.
drivers/net/ethernet/cadence/macb_main.c | 38 ++--
1 file changed, 36 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb_main.c
b
-by: Kedareswara rao Appana
Signed-off-by: Harini Katakam
---
v2 changes:
Fixed parameter passed to phy calls.
drivers/net/ethernet/cadence/macb_main.c | 38 ++--
1 file changed, 36 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb_main.c
b
to enable this workaround.
Signed-off-by: Harini Katakam
---
Note: Enabled the errata in zynq and at91 configs only.
Please advise if any other versions are affected by this errata.
drivers/net/ethernet/cadence/macb.h | 6 ++
drivers/net/ethernet/cadence/macb_main.c | 9 +++--
2
to enable this workaround.
Signed-off-by: Harini Katakam
---
Note: Enabled the errata in zynq and at91 configs only.
Please advise if any other versions are affected by this errata.
drivers/net/ethernet/cadence/macb.h | 6 ++
drivers/net/ethernet/cadence/macb_main.c | 9 +++--
2
Hi Claudiu,
On Fri, May 4, 2018 at 5:47 PM, Claudiu Beznea
<claudiu.bez...@microchip.com> wrote:
>
>
> On 22.03.2018 15:51, harinikatakamli...@gmail.com wrote:
>> From: Harini Katakam <hari...@xilinx.com>
>>
>> This patch enables ARP wake event support in
Hi Claudiu,
On Fri, May 4, 2018 at 5:47 PM, Claudiu Beznea
wrote:
>
>
> On 22.03.2018 15:51, harinikatakamli...@gmail.com wrote:
>> From: Harini Katakam
>>
>> This patch enables ARP wake event support in GEM through the following:
>>
>> -> WOL capabili
Hi Claudiu,
On Thu, May 3, 2018 at 3:39 PM, Claudiu Beznea
<claudiu.bez...@microchip.com> wrote:
>
>
> On 22.03.2018 15:51, harinikatakamli...@gmail.com wrote:
>> From: Harini Katakam <hari...@xilinx.com>
>>
>> When macb device is suspended and system is
Hi Claudiu,
On Thu, May 3, 2018 at 3:39 PM, Claudiu Beznea
wrote:
>
>
> On 22.03.2018 15:51, harinikatakamli...@gmail.com wrote:
>> From: Harini Katakam
>>
>> When macb device is suspended and system is powered down, the clocks
>> are removed and hence
Hi Claudiu,
On Thu, May 3, 2018 at 3:39 PM, Claudiu Beznea
<claudiu.bez...@microchip.com> wrote:
>
>
> On 22.03.2018 15:51, harinikatakamli...@gmail.com wrote:
>> From: Harini Katakam <hari...@xilinx.com>
> I would use a "goto" instruction, e.
Hi Claudiu,
On Thu, May 3, 2018 at 3:39 PM, Claudiu Beznea
wrote:
>
>
> On 22.03.2018 15:51, harinikatakamli...@gmail.com wrote:
>> From: Harini Katakam
> I would use a "goto" instruction, e.g.:
> value = -ETIMEDOUT;
>
Hi Claudiu,
On Thu, May 3, 2018 at 3:38 PM, Claudiu Beznea
<claudiu.bez...@microchip.com> wrote:
>
>
> On 22.03.2018 15:51, harinikatakamli...@gmail.com wrote:
>> From: Harini Katakam <hari...@xilinx.com>
>>
>> + ulong timeout;
>> +
>&
Hi Claudiu,
On Thu, May 3, 2018 at 3:38 PM, Claudiu Beznea
wrote:
>
>
> On 22.03.2018 15:51, harinikatakamli...@gmail.com wrote:
>> From: Harini Katakam
>>
>> + ulong timeout;
>> +
>> + timeout = jiffies + msecs_to_jiffies(1000);
>> +
Hi David,
On Sat, Jan 27, 2018 at 12:09 PM, <harinikatakamli...@gmail.com> wrote:
> From: Harini Katakam <harini.kata...@xilinx.com>
>
> Handle HRESP error by doing a SW reset of RX and TX and
> re-initializing the descriptors, RX and TX queue pointers.
>
> Signe
Hi David,
On Sat, Jan 27, 2018 at 12:09 PM, wrote:
> From: Harini Katakam
>
> Handle HRESP error by doing a SW reset of RX and TX and
> re-initializing the descriptors, RX and TX queue pointers.
>
> Signed-off-by: Harini Katakam
> Signed-off-by: Michal Simek
>
Hi David,
On Fri, Jan 26, 2018 at 9:25 PM, David Miller <da...@davemloft.net> wrote:
> From: Harini Katakam <harini.kata...@xilinx.com>
> Date: Fri, 26 Jan 2018 16:12:11 +0530
>
>> From: Harini Katakam <harini.kata...@xilinx.com>
>>
>> Handle HRESP err
Hi David,
On Fri, Jan 26, 2018 at 9:25 PM, David Miller wrote:
> From: Harini Katakam
> Date: Fri, 26 Jan 2018 16:12:11 +0530
>
>> From: Harini Katakam
>>
>> Handle HRESP error by doing a SW reset of RX and TX and
>> re-initializing the descriptors, RX and TX
From: Harini Katakam <harini.kata...@xilinx.com>
Handle HRESP error by doing a SW reset of RX and TX and
re-initializing the descriptors, RX and TX queue pointers.
Signed-off-by: Harini Katakam <hari...@xilinx.com>
Signed-off-by: Michal Simek <michal.si...@xilinx.com>
---
From: Harini Katakam
Handle HRESP error by doing a SW reset of RX and TX and
re-initializing the descriptors, RX and TX queue pointers.
Signed-off-by: Harini Katakam
Signed-off-by: Michal Simek
---
v2:
Rebased on top of latest net-next and reinitialized
all rx queues.
drivers/net/ethernet
dgar E. Iglesias <edgar.igles...@xilinx.com>
Signed-off-by: Harini Katakam <hari...@xilinx.com>
Signed-off-by: Michal Simek <michal.si...@xilinx.com>
---
drivers/net/ethernet/cadence/macb.h | 2 ++
drivers/net/ethernet/cadence/macb_main.c | 42
2 fil
From: "Edgar E. Iglesias"
Currently, we only use the first receive queue and leave the
remaining DMA descriptor pointers pointing at 0.
Disable unused queues by connecting them to a looped descriptor
chain without free slots.
Signed-off-by: Edgar E. Iglesias
Signed-off-by: Hari
From: "Edgar E. Iglesias" <edgar.igles...@xilinx.com>
Add RX queue pointer to macb queues to make it accessible for the
multiple queues available. Currently the first RX queue is used.
Signed-off-by: Edgar E. Iglesias <edgar.igles...@xilinx.com>
Signed-off-by: Harini Katak
From: Harini Katakam <harini.kata...@xilinx.com>
Handle HRESP error by doing a SW reset of RX and TX and
re-initializing the descriptors, RX and TX queue pointers.
Signed-off-by: Harini Katakam <hari...@xilinx.com>
Signed-off-by: Michal Simek <michal.si...@xilinx.com>
---
dr
From: "Edgar E. Iglesias"
Add RX queue pointer to macb queues to make it accessible for the
multiple queues available. Currently the first RX queue is used.
Signed-off-by: Edgar E. Iglesias
Signed-off-by: Harini Katakam
Signed-off-by: Michal Simek
---
drivers/net/ethernet/cade
From: Harini Katakam
Handle HRESP error by doing a SW reset of RX and TX and
re-initializing the descriptors, RX and TX queue pointers.
Signed-off-by: Harini Katakam
Signed-off-by: Michal Simek
---
drivers/net/ethernet/cadence/macb.h | 2 +
drivers/net/ethernet/cadence/macb_main.c | 65
This series fixes the following:
-> Ties off unused RX queues
-> Handles RX HRESP error
Edgar E. Iglesias (2):
net: macb: Add RBQP to the macb queues
net: macb: Tie-off unused RX queues
Harini Katakam (1):
net: macb: Handle HRESP error
drivers/net/ethernet/cadence/macb.h
This series fixes the following:
-> Ties off unused RX queues
-> Handles RX HRESP error
Edgar E. Iglesias (2):
net: macb: Add RBQP to the macb queues
net: macb: Tie-off unused RX queues
Harini Katakam (1):
net: macb: Handle HRESP error
drivers/net/ethernet/cadence/macb.h
Hi,
Please ignore this series.
I'm sending another updated one.
Sorry for the inconvenience.
Regards,
Harini
On Mon, Nov 27, 2017 at 12:33 PM, Harini Katakam
<harini.kata...@xilinx.com> wrote:
> From: "Edgar E. Iglesias" <edgar.igles...@xilinx.com>
>
> Add
Hi,
Please ignore this series.
I'm sending another updated one.
Sorry for the inconvenience.
Regards,
Harini
On Mon, Nov 27, 2017 at 12:33 PM, Harini Katakam
wrote:
> From: "Edgar E. Iglesias"
>
> Add RX queue pointer to macb queues to make it accessible for the
> mul
dgar E. Iglesias <edgar.igles...@xilinx.com>
Signed-off-by: Harini Katakam <hari...@xilinx.com>
Signed-off-by: Michal Simek <michal.si...@xilinx.com>
---
drivers/net/ethernet/cadence/macb.h | 2 ++
drivers/net/ethernet/cadence/macb_main.c | 42
2 fil
From: "Edgar E. Iglesias"
Currently, we only use the first receive queue and leave the
remaining DMA descriptor pointers pointing at 0.
Disable unused queues by connecting them to a looped descriptor
chain without free slots.
Signed-off-by: Edgar E. Iglesias
Signed-off-by: Hari
From: "Edgar E. Iglesias" <edgar.igles...@xilinx.com>
Add RX queue pointer to macb queues to make it accessible for the
multiple queues available. Currently the first RX queue is used.
Signed-off-by: Edgar E. Iglesias <edgar.igles...@xilinx.com>
Signed-off-by: Harini Katak
From: "Edgar E. Iglesias"
Add RX queue pointer to macb queues to make it accessible for the
multiple queues available. Currently the first RX queue is used.
Signed-off-by: Edgar E. Iglesias
Signed-off-by: Harini Katakam
Signed-off-by: Michal Simek
---
drivers/net/ethernet/cade
Hi Rafal,
On Thu, Jan 26, 2017 at 8:45 PM, Rafal Ozieblo wrote:
>> -Original Message-
>> From: Andrei Pistirica [mailto:andrei.pistir...@microchip.com]
>> Sent: 19 stycznia 2017 16:56
>> Subject: [PATCH net-next v2] macb: Common code to enable ptp support for
>>
Hi Rafal,
On Thu, Jan 26, 2017 at 8:45 PM, Rafal Ozieblo wrote:
>> -Original Message-
>> From: Andrei Pistirica [mailto:andrei.pistir...@microchip.com]
>> Sent: 19 stycznia 2017 16:56
>> Subject: [PATCH net-next v2] macb: Common code to enable ptp support for
>> MACB/GEM
>>
>>
>>
>> - registers and bitfields for TSU
>>> - capability flags to enable PTP per platform basis
>>>
>>> Signed-off-by: Andrei Pistirica <andrei.pistir...@microchip.com>
>>
>> Acked-by: Nicolas Ferre <nicolas.fe...@atmel.com>
Reviewed-by: Harini Katakam <har
>>> - capability flags to enable PTP per platform basis
>>>
>>> Signed-off-by: Andrei Pistirica
>>
>> Acked-by: Nicolas Ferre
Reviewed-by: Harini Katakam
>
> Harini or Rafal, do you plan to review this patch and add your
> "Reviewed-
On Wed, Jan 18, 2017 at 11:02 PM, Nicolas Ferre wrote:
> Le 18/01/2017 à 09:57, Andrei Pistirica a écrit :
>> This patch does the following:
>> - add GEM-PTP interface
>> - registers and bitfields for TSU are named according to SAMA5Dx data sheet
>> - PTP support based on
On Wed, Jan 18, 2017 at 11:02 PM, Nicolas Ferre wrote:
> Le 18/01/2017 à 09:57, Andrei Pistirica a écrit :
>> This patch does the following:
>> - add GEM-PTP interface
>> - registers and bitfields for TSU are named according to SAMA5Dx data sheet
>> - PTP support based on platform capability
>
>
Hi Richard,
On Tue, Jan 3, 2017 at 3:59 PM, Richard Cochran
<richardcoch...@gmail.com> wrote:
> On Tue, Jan 03, 2017 at 10:36:11AM +0530, Harini Katakam wrote:
>> I understand that it is not accurate - it is an initial version.
>
> Why do you say, "it is an initial vers
Hi Richard,
On Tue, Jan 3, 2017 at 3:59 PM, Richard Cochran
wrote:
> On Tue, Jan 03, 2017 at 10:36:11AM +0530, Harini Katakam wrote:
>> I understand that it is not accurate - it is an initial version.
>
> Why do you say, "it is an initial version?"
>
> The Atmel
Hi Richard,
On Mon, Jan 2, 2017 at 9:43 PM, Richard Cochran
wrote:
> On Mon, Jan 02, 2017 at 03:47:07PM +0100, Nicolas Ferre wrote:
>> Le 02/01/2017 à 12:31, Richard Cochran a écrit :
>> > This Cadence IP core is a complete disaster.
>>
>> Well, it evolved and propose
Hi Richard,
On Mon, Jan 2, 2017 at 9:43 PM, Richard Cochran
wrote:
> On Mon, Jan 02, 2017 at 03:47:07PM +0100, Nicolas Ferre wrote:
>> Le 02/01/2017 à 12:31, Richard Cochran a écrit :
>> > This Cadence IP core is a complete disaster.
>>
>> Well, it evolved and propose several options to
Hi Richard,
On Mon, Jan 2, 2017 at 5:01 PM, Richard Cochran
wrote:
> On Mon, Jan 02, 2017 at 09:36:10AM +, Rafal Ozieblo wrote:
>> According Cadence Hardware team:
>> "It is just that some customers prefer to have the time in the descriptors
>> as that is provided
Hi Richard,
On Mon, Jan 2, 2017 at 5:01 PM, Richard Cochran
wrote:
> On Mon, Jan 02, 2017 at 09:36:10AM +, Rafal Ozieblo wrote:
>> According Cadence Hardware team:
>> "It is just that some customers prefer to have the time in the descriptors
>> as that is provided per frame.
>> The
Hi Andrei,
On Mon, Dec 12, 2016 at 3:52 PM, wrote:
>
>
>> -Original Message-
>> From: Rafal Ozieblo [mailto:raf...@cadence.com]
>> Sent: Friday, December 09, 2016 11:20 AM
>> To: Andrei Pistirica - M16132; richardcoch...@gmail.com
>> Cc:
Hi Andrei,
On Mon, Dec 12, 2016 at 3:52 PM, wrote:
>
>
>> -Original Message-
>> From: Rafal Ozieblo [mailto:raf...@cadence.com]
>> Sent: Friday, December 09, 2016 11:20 AM
>> To: Andrei Pistirica - M16132; richardcoch...@gmail.com
>> Cc: net...@vger.kernel.org;
Hi,
On Thu, Dec 8, 2016 at 8:11 PM, wrote:
>
>
>> -Original Message-
>> From: Richard Cochran [mailto:richardcoch...@gmail.com]
>> Sent: Wednesday, December 07, 2016 11:04 PM
>> To: Andrei Pistirica - M16132
>> Cc: net...@vger.kernel.org;
Hi,
On Thu, Dec 8, 2016 at 8:11 PM, wrote:
>
>
>> -Original Message-
>> From: Richard Cochran [mailto:richardcoch...@gmail.com]
>> Sent: Wednesday, December 07, 2016 11:04 PM
>> To: Andrei Pistirica - M16132
>> Cc: net...@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm-
>>
Hi Florian,
On Sun, Dec 4, 2016 at 4:10 AM, Florian Fainelli <f.faine...@gmail.com> wrote:
> Le 12/03/16 à 13:35, Rob Herring a écrit :
>> On Mon, Nov 28, 2016 at 03:19:27PM +0530, Harini Katakam wrote:
>>> +- reg: Address and length of the register set of MAC to be used
&
Hi Florian,
On Sun, Dec 4, 2016 at 4:10 AM, Florian Fainelli wrote:
> Le 12/03/16 à 13:35, Rob Herring a écrit :
>> On Mon, Nov 28, 2016 at 03:19:27PM +0530, Harini Katakam wrote:
>>> +- reg: Address and length of the register set of MAC to be used
>>> +- clock-names
Hi Rob,
Thanks for the review.
On Sun, Dec 4, 2016 at 3:05 AM, Rob Herring <r...@kernel.org> wrote:
> On Mon, Nov 28, 2016 at 03:19:27PM +0530, Harini Katakam wrote:
>> +Required properties:
>> +- compatible: Should be "cdns,macb-mdio"
>
> Only one v
Hi Rob,
Thanks for the review.
On Sun, Dec 4, 2016 at 3:05 AM, Rob Herring wrote:
> On Mon, Nov 28, 2016 at 03:19:27PM +0530, Harini Katakam wrote:
>> +Required properties:
>> +- compatible: Should be "cdns,macb-mdio"
>
> Only one version ever? This needs m
Hi David,
On Wed, Nov 30, 2016 at 5:35 AM, David Miller <da...@davemloft.net> wrote:
> From: Harini Katakam <harini.kata...@xilinx.com>
> Date: Mon, 28 Nov 2016 14:53:49 +0530
>
>> In macb_reset_hw, use read-modify-write to disable RX and TX.
>> This way exitin
Hi David,
On Wed, Nov 30, 2016 at 5:35 AM, David Miller wrote:
> From: Harini Katakam
> Date: Mon, 28 Nov 2016 14:53:49 +0530
>
>> In macb_reset_hw, use read-modify-write to disable RX and TX.
>> This way exiting settings and reserved bits wont be disturbed.
>> Use t
as well.
Signed-off-by: Harini Katakam <hari...@xilinx.com>
---
v2:
Make ctrl type as u32
Improve commit description
---
drivers/net/ethernet/cadence/macb.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb.c
b/drivers/net/ethernet/c
as well.
Signed-off-by: Harini Katakam
---
v2:
Make ctrl type as u32
Improve commit description
---
drivers/net/ethernet/cadence/macb.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb.c
b/drivers/net/ethernet/cadence/macb.c
index 0e489bb
Hi Andrew,
On Mon, Nov 28, 2016 at 10:03 PM, Andrew Lunn <and...@lunn.ch> wrote:
> On Mon, Nov 28, 2016 at 03:19:14PM +0530, Harini Katakam wrote:
>> This patch is to add support for the hardware with multiple ethernet
>> MAC controllers and a single MDIO bus connected to
Hi Andrew,
On Mon, Nov 28, 2016 at 10:03 PM, Andrew Lunn wrote:
> On Mon, Nov 28, 2016 at 03:19:14PM +0530, Harini Katakam wrote:
>> This patch is to add support for the hardware with multiple ethernet
>> MAC controllers and a single MDIO bus connected to multiple PHY devices
In macb_reset_hw, use read-modify-write to disable RX and TX.
This way exiting settings and reserved bits wont be disturbed.
Use the same method for clearing statistics as well.
Signed-off-by: Harini Katakam <hari...@xilinx.com>
---
drivers/net/ethernet/cadence/macb.c | 9 ++---
In macb_reset_hw, use read-modify-write to disable RX and TX.
This way exiting settings and reserved bits wont be disturbed.
Use the same method for clearing statistics as well.
Signed-off-by: Harini Katakam
---
drivers/net/ethernet/cadence/macb.c | 9 ++---
1 file changed, 6 insertions
in that MAC controller.
This handling along with PHY functionality is moved to macb_mdio.c
within the macb driver space.
This is because of the phy maintenance register is within the MAC.
Please advise on how to proceed with handling such a requirement.
Harini Katakam (2):
net: macb: Add MDIO driver
in that MAC controller.
This handling along with PHY functionality is moved to macb_mdio.c
within the macb driver space.
This is because of the phy maintenance register is within the MAC.
Please advise on how to proceed with handling such a requirement.
Harini Katakam (2):
net: macb: Add MDIO driver
Add documentations for macb mdio driver.
Signed-off-by: Harini Katakam <hari...@xilinx.com>
---
.../devicetree/bindings/net/macb-mdio.txt | 31 ++
1 file changed, 31 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/macb-mdio.txt
diff
controller. This handling along with PHY functionality is
moved to macb_mdio.c
Signed-off-by: Punnaiah Choudary Kalluri <punn...@xilinx.com>
Signed-off-by: Harini Katakam <hari...@xilinx.com>
---
drivers/net/ethernet/cadence/Makefile| 2 +-
drivers/net/ethernet/cadence/macb.
Add documentations for macb mdio driver.
Signed-off-by: Harini Katakam
---
.../devicetree/bindings/net/macb-mdio.txt | 31 ++
1 file changed, 31 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/macb-mdio.txt
diff --git a/Documentation
controller. This handling along with PHY functionality is
moved to macb_mdio.c
Signed-off-by: Punnaiah Choudary Kalluri
Signed-off-by: Harini Katakam
---
drivers/net/ethernet/cadence/Makefile| 2 +-
drivers/net/ethernet/cadence/macb.c | 169 +++-
drivers/net/ethernet
1 - 100 of 410 matches
Mail list logo