Hi James,
On Tue, Oct 3, 2017 at 1:37 PM, James Morse <james.mo...@arm.com> wrote:
> Hi Jintack,
>
> On 03/10/17 04:11, Jintack Lim wrote:
>> This design overview will help to digest the subsequent patches that
>> implement AT instruction emulation.
>
>> diff
Hi James,
On Tue, Oct 3, 2017 at 1:37 PM, James Morse wrote:
> Hi Jintack,
>
> On 03/10/17 04:11, Jintack Lim wrote:
>> This design overview will help to digest the subsequent patches that
>> implement AT instruction emulation.
>
>> diff --git a/arch/arm64/k
ed-off-by: Christoffer Dall <christoffer.d...@linaro.org>
Signed-off-by: Jintack Lim <jint...@cs.columbia.edu>
---
arch/arm64/kvm/context.c | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/kvm/context.c b/arch/arm64/kvm/context.c
index a7811e1..afd1702 100644
--
-by: Jintack Lim
---
arch/arm64/kvm/context.c | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/kvm/context.c b/arch/arm64/kvm/context.c
index a7811e1..afd1702 100644
--- a/arch/arm64/kvm/context.c
+++ b/arch/arm64/kvm/context.c
@@ -18,6 +18,7 @@
#include
#include
#include
From: Christoffer Dall <christoffer.d...@linaro.org>
Make mmu functions non-static so that we can reuse those functions
to support mmu for the nested VMs.
Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org>
Signed-off-by: Jintack Lim <jintack@linaro.org>
---
arch
ed-off-by: Christoffer Dall <christoffer.d...@linaro.org>
Signed-off-by: Jintack Lim <jintack@linaro.org>
---
arch/arm/include/asm/kvm_asm.h| 7 +-
arch/arm/include/asm/kvm_host.h | 26 +---
arch/arm/kvm/hyp/switch.c | 5 +-
arch/arm/kvm/hyp/tlb.c| 18
;
Signed-off-by: Jintack Lim <jintack@linaro.org>
---
virt/kvm/arm/arm.c | 5 +
virt/kvm/arm/mmu.c | 23 ++-
2 files changed, 27 insertions(+), 1 deletion(-)
diff --git a/virt/kvm/arm/arm.c b/virt/kvm/arm/arm.c
index 41e0654..63dd897 100644
--- a/virt/kvm/arm/arm.c
From: Christoffer Dall
Make mmu functions non-static so that we can reuse those functions
to support mmu for the nested VMs.
Signed-off-by: Christoffer Dall
Signed-off-by: Jintack Lim
---
arch/arm64/include/asm/kvm_mmu.h | 9
virt/kvm/arm/mmu.c | 94
-by: Jintack Lim
---
arch/arm/include/asm/kvm_asm.h| 7 +-
arch/arm/include/asm/kvm_host.h | 26 +---
arch/arm/kvm/hyp/switch.c | 5 +-
arch/arm/kvm/hyp/tlb.c| 18 ++---
arch/arm64/include/asm/kvm_asm.h | 7 +-
arch/arm64/include/asm/kvm_host.h | 10 ++-
arch
From: Christoffer Dall
Sometimes when we are invalidating the TLB for a certain S2 MMU
context, this context can also have EL2 context associated with it and
we have to invalidate this too.
Signed-off-by: Christoffer Dall
Signed-off-by: Jintack Lim
---
virt/kvm/arm/arm.c | 5 +
virt/kvm
riable
names so that fault_ipa is used for the former and ipa is used for the
latter.
Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org>
Signed-off-by: Jintack Lim <jintack@linaro.org>
---
Notes:
v1-->v2:
- Added a common function to inject s2 faults.
-
is used for the former and ipa is used for the
latter.
Signed-off-by: Christoffer Dall
Signed-off-by: Jintack Lim
---
Notes:
v1-->v2:
- Added a common function to inject s2 faults.
- Align L1 IPA as well as L2 IPA in transparent_hugepage_adjust(). This will
come in handy when creat
From: Christoffer Dall
Move this little function to the header files for arm/arm64 so other
code can make use of it directly.
Signed-off-by: Christoffer Dall
---
arch/arm/include/asm/kvm_emulate.h | 8
From: Christoffer Dall
Move this little function to the header files for arm/arm64 so other
code can make use of it directly.
Signed-off-by: Christoffer Dall
---
arch/arm/include/asm/kvm_emulate.h | 8
arch/arm64/include/asm/kvm_emulate.h | 8
virt/kvm/arm/mmu.c
From: Christoffer Dall <christoffer.d...@linaro.org>
Based on the pseudo-code in the ARM ARM, implement a stage 2 software
page table walker.
Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org>
Signed-off-by: Jintack Lim <jintack@linaro.org>
---
Notes:
v1--
about the fault.
Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org>
Signed-off-by: Jintack Lim <jintack@linaro.org>
---
arch/arm/include/asm/kvm_mmu.h | 7 +++
arch/arm64/include/asm/kvm_mmu.h | 2 ++
arch/arm64/kvm/mmu-nested.c | 22 ++
From: Christoffer Dall
Based on the pseudo-code in the ARM ARM, implement a stage 2 software
page table walker.
Signed-off-by: Christoffer Dall
Signed-off-by: Jintack Lim
---
Notes:
v1-->v2:
- Handled different endianness between the host and the guest hypervisor
- Decoup
-by: Christoffer Dall
Signed-off-by: Jintack Lim
---
arch/arm/include/asm/kvm_mmu.h | 7 +++
arch/arm64/include/asm/kvm_mmu.h | 2 ++
arch/arm64/kvm/mmu-nested.c | 22 ++
virt/kvm/arm/mmu.c | 7 +++
4 files changed, 38 insertions(+)
diff --git a/arch/arm
xample by clearing
out an entire shadow stage-2 table. This will be handled in a more
efficient way using the reverse mapping feature in a later version of
the patch series.
Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org>
Signed-off-by: Jintack Lim <jintack@linaro.org>
shadow stage-2 table. This will be handled in a more
efficient way using the reverse mapping feature in a later version of
the patch series.
Signed-off-by: Christoffer Dall
Signed-off-by: Jintack Lim
---
Notes:
v1-->v2:
- Removed an unnecessary iteration for each v
From: Jintack Lim <jint...@cs.columbia.edu>
We are about to add a framework to handle system instruction traps. To
reuse existing helper functions, let's move them around.
No functional change.
Signed-off-by: Jintack Lim <jintack@linaro.org>
---
arch/arm64/kvm/sys
From: Jintack Lim
We are about to add a framework to handle system instruction traps. To
reuse existing helper functions, let's move them around.
No functional change.
Signed-off-by: Jintack Lim
---
arch/arm64/kvm/sys_regs.c | 89 ---
1 file
This introduces a function prototype to determine if we need to forward
system instruction traps to the virtual EL2. The implementation of
forward_trap functions for each system instruction will be added in
later patches.
Signed-off-by: Jintack Lim <jintack@linaro.org>
---
arch/arm
This introduces a function prototype to determine if we need to forward
system instruction traps to the virtual EL2. The implementation of
forward_trap functions for each system instruction will be added in
later patches.
Signed-off-by: Jintack Lim
---
arch/arm64/kvm/sys_regs.c | 8
Emulate AT S1E[01] instructions by issuing the same instructions in EL2. We
set the physical EL1 registers, NV and NV1 bits as described in the AT
instruction emulation overview.
Signed-off-by: Jintack Lim <jintack@linaro.org>
---
arch/arm64/include/asm/kvm_emulate.h | 11 +++
ings in the stage 2 page tables maintained by the guest
hypervisor. We then need to invalidate all EL1&0 regime stage 1 and 2
TLB entries of all VMIDs, which are assigned by the host hypervisor, for
this VM.
Signed-off-by: Jintack Lim <jintack@linaro.org>
---
arch/arm64/kvm/s
Emulate AT S1E[01] instructions by issuing the same instructions in EL2. We
set the physical EL1 registers, NV and NV1 bits as described in the AT
instruction emulation overview.
Signed-off-by: Jintack Lim
---
arch/arm64/include/asm/kvm_emulate.h | 11 +++
arch/arm64/kvm/sys_regs.c
ings in the stage 2 page tables maintained by the guest
hypervisor. We then need to invalidate all EL1&0 regime stage 1 and 2
TLB entries of all VMIDs, which are assigned by the host hypervisor, for
this VM.
Signed-off-by: Jintack Lim
---
arch/arm64/kvm/sys_regs.c | 29
registers and executing AT instructions. Note
that ctxt->hw_sys_regs is expected to have the proper processor context
before calling the handling function(__kvm_at_insn) implemented in this
patch.
Signed-off-by: Jintack Lim <jintack@linaro.org>
---
arch/arm64/include/asm/kvm_asm.h |
registers and executing AT instructions. Note
that ctxt->hw_sys_regs is expected to have the proper processor context
before calling the handling function(__kvm_at_insn) implemented in this
patch.
Signed-off-by: Jintack Lim
---
arch/arm64/include/asm/kvm_asm.h | 3 +
arch/arm64/kvm/hyp/Makef
Emulate TLBI VAE2* instruction executed in the virtual EL2. Based on the
same principle as TLBI ALLE2 instruction, we can simply emulate those
instructions by executing corresponding VAE1* instructions with the
virtual EL2's VMID assigned by the host hypervisor.
Signed-off-by: Jintack Lim
Emulate TLBI VAE2* instruction executed in the virtual EL2. Based on the
same principle as TLBI ALLE2 instruction, we can simply emulate those
instructions by executing corresponding VAE1* instructions with the
virtual EL2's VMID assigned by the host hypervisor.
Signed-off-by: Jintack Lim
tage 1 TLB entries via TLBI VMALL1IS instruction, but to
make it simeple, we reuse the existing function, __kvm_tlb_flush_vmid(),
which invalidates both of stage 1 and 2 TLB entries.
Signed-off-by: Jintack Lim <jintack@linaro.org>
---
arch/arm64/kvm/sys_r
tage 1 TLB entries via TLBI VMALL1IS instruction, but to
make it simeple, we reuse the existing function, __kvm_tlb_flush_vmid(),
which invalidates both of stage 1 and 2 TLB entries.
Signed-off-by: Jintack Lim
---
arch/arm64/kvm/sys_regs.c | 35 +--
1 file changed
Based on the same principle as TLBI ALLE1(IS) and TLBI VMALLS12E1(IS)
emulation, we clear the mappings in the shadow stage-2 page tables and
invalidate TLB entries. We do it only for one mapping for the current
VMID from the guest hypervisor's view.
Signed-off-by: Jintack Lim <jint
Emulate AT S1E2 instructions by issuing the corresponding S1E1
instructions in EL2. We set the physical EL1 registers and the HCR_EL2
register as described in the AT instruction emulation overview.
Signed-off-by: Jintack Lim <jintack@linaro.org>
---
arch/arm64/kvm/sys_regs.
Based on the same principle as TLBI ALLE1(IS) and TLBI VMALLS12E1(IS)
emulation, we clear the mappings in the shadow stage-2 page tables and
invalidate TLB entries. We do it only for one mapping for the current
VMID from the guest hypervisor's view.
Signed-off-by: Jintack Lim
---
arch/arm64/kvm
Emulate AT S1E2 instructions by issuing the corresponding S1E1
instructions in EL2. We set the physical EL1 registers and the HCR_EL2
register as described in the AT instruction emulation overview.
Signed-off-by: Jintack Lim
---
arch/arm64/kvm/sys_regs.c | 19 +--
1 file changed
-by: Jintack Lim <jintack@linaro.org>
---
arch/arm64/include/asm/kvm_arm.h | 1 +
arch/arm64/kvm/sys_regs.c| 99 ++--
2 files changed, 96 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h
-by: Jintack Lim
---
arch/arm64/include/asm/kvm_arm.h | 1 +
arch/arm64/kvm/sys_regs.c| 99 ++--
2 files changed, 96 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h
index 3993703..e160895 100644
Forward system instruction traps to the virtual EL2 if a corresponding
bit in the virtual HCR_EL2 is set.
Signed-off-by: Jintack Lim <jintack@linaro.org>
---
Notes:
v1-->v2:
This is a new commit. We can rework existing forward_nv_traps() and
forward_nv1_traps() defined
Forward system instruction traps to the virtual EL2 if a corresponding
bit in the virtual HCR_EL2 is set.
Signed-off-by: Jintack Lim
---
Notes:
v1-->v2:
This is a new commit. We can rework existing forward_nv_traps() and
forward_nv1_traps() defined in rfc-v2 cpu patches to re
Based on the same principle as TLBI ALLE1(IS) emulation, we clear the
mappings in the shadow stage-2 page tables and invalidate TLB entries.
But this time we do it only for the current VMID from the guest
hypervisor's perspective, not for all VMIDs.
Signed-off-by: Jintack Lim <jint
Based on the same principle as TLBI ALLE1(IS) emulation, we clear the
mappings in the shadow stage-2 page tables and invalidate TLB entries.
But this time we do it only for the current VMID from the guest
hypervisor's perspective, not for all VMIDs.
Signed-off-by: Jintack Lim
---
arch/arm64
This design overview will help to digest the subsequent patches that
implement AT instruction emulation.
Signed-off-by: Jintack Lim <jintack@linaro.org>
---
arch/arm64/kvm/sys_regs.c | 66 +++
1 file changed, 66 insertions(+)
diff --git
This design overview will help to digest the subsequent patches that
implement AT instruction emulation.
Signed-off-by: Jintack Lim
---
arch/arm64/kvm/sys_regs.c | 66 +++
1 file changed, 66 insertions(+)
diff --git a/arch/arm64/kvm/sys_regs.c b/arch
, then execute the same instruction in EL2.
We don't set HCR_EL2.TTLB bit yet.
Signed-off-by: Jintack Lim <jintack@linaro.org>
---
arch/arm64/include/asm/kvm_asm.h | 1 +
arch/arm64/include/asm/kvm_mmu.h | 1 +
arch/arm64/include/asm/sysreg.h | 15
arch/arm64/kvm/hyp
, then execute the same instruction in EL2.
We don't set HCR_EL2.TTLB bit yet.
Signed-off-by: Jintack Lim
---
arch/arm64/include/asm/kvm_asm.h | 1 +
arch/arm64/include/asm/kvm_mmu.h | 1 +
arch/arm64/include/asm/sysreg.h | 15
arch/arm64/kvm/hyp/tlb.c | 52
List all system instructions to emulate. This patch only introduces the
definitions, emulation handlers will be added in subsequent patches.
Signed-off-by: Jintack Lim <jintack@linaro.org>
---
arch/arm64/include/asm/sysreg.h | 38 ++
arch/arm
List all system instructions to emulate. This patch only introduces the
definitions, emulation handlers will be added in subsequent patches.
Signed-off-by: Jintack Lim
---
arch/arm64/include/asm/sysreg.h | 38 ++
arch/arm64/kvm/sys_regs.c | 26
Rework the system instruction emulation framework to handle potentially
all system instruction traps other than MSR/MRS instructions. Those
system instructions would be AT and TLBI instructions controlled by
HCR_EL2.NV, AT, and TTLB bits.
Signed-off-by: Jintack Lim <jintack@linaro.
re EL1 register).
Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org>
Signed-off-by: Jintack Lim <jintack@linaro.org>
---
arch/arm64/include/asm/kvm_mmu.h | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm/kvm_mmu.h b/arch/arm64/inc
Rework the system instruction emulation framework to handle potentially
all system instruction traps other than MSR/MRS instructions. Those
system instructions would be AT and TLBI instructions controlled by
HCR_EL2.NV, AT, and TTLB bits.
Signed-off-by: Jintack Lim
---
arch/arm64/kvm/sys_regs.c
-by: Christoffer Dall
Signed-off-by: Jintack Lim
---
arch/arm64/include/asm/kvm_mmu.h | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm/kvm_mmu.h b/arch/arm64/include/asm/kvm_mmu.h
index 601f431..7a1c581 100644
--- a/arch/arm64/include/asm/kvm_mmu.h
+++ b/arch
a set of shadow stage-2 page tables for each shadow
VMID. All this information is stored in kvm_nested_s2_mmu struct.
A host hypervisor manages a list of kvm_nested_s2_mmu objects per VM. On
a VM entry it searches an object in the list using a virtual VMID as a
key.
Signed-off-by: Jintack Lim
a set of shadow stage-2 page tables for each shadow
VMID. All this information is stored in kvm_nested_s2_mmu struct.
A host hypervisor manages a list of kvm_nested_s2_mmu objects per VM. On
a VM entry it searches an object in the list using a virtual VMID as a
key.
Signed-off-by: Jintack Lim
inaro.org>
Signed-off-by: Jintack Lim <jintack@linaro.org>
---
virt/kvm/arm/mmu.c | 15 ++-
1 file changed, 6 insertions(+), 9 deletions(-)
diff --git a/virt/kvm/arm/mmu.c b/virt/kvm/arm/mmu.c
index f2d5b6c..0a5f5ca 100644
--- a/virt/kvm/arm/mmu.c
+++ b/virt/kvm/arm/mmu.
ucture does not have vttbr any more.
Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org>
Signed-off-by: Jintack Lim <jintack@linaro.org>
---
Notes:
v1-->v2:
Fixed a bug that hw_vttbr was not initialized correctly in
kvm_arch_vcpu_init()
where vmid
.
Signed-off-by: Christoffer Dall
Signed-off-by: Jintack Lim
---
Notes:
v1-->v2:
Fixed a bug that hw_vttbr was not initialized correctly in
kvm_arch_vcpu_init()
where vmid is not allocated yet. This prevented the guest from booting on
32bit
arm; hw_vttbr is set on each en
From: Christoffer Dall
stage2_flush_xxx functions take a pointer to the kvm struct as the first
parameter but they are never used. Clean this up before modifying mmu
code for nested virtualization support.
Signed-off-by: Christoffer Dall
Signed-off-by: Jintack Lim
---
virt/kvm/arm/mmu.c | 15
ing
Dave Martin (1):
arm64: KVM: Hide unsupported AArch64 CPU features from guests
Jintack Lim (18):
KVM: arm64: Expose limited memory management support to the virtual
EL2
KVM: arm/arm64: Manage mmus for nested VMs
KVM: arm64: Move system register helper functions around
KVM: ar
ing
Dave Martin (1):
arm64: KVM: Hide unsupported AArch64 CPU features from guests
Jintack Lim (18):
KVM: arm64: Expose limited memory management support to the virtual
EL2
KVM: arm/arm64: Manage mmus for nested VMs
KVM: arm64: Move system register helper functions around
KVM: ar
.
Signed-off-by: Jintack Lim <jintack@linaro.org>
---
arch/arm64/kvm/sys_regs.c | 47 ++-
1 file changed, 46 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 65f4c20..395b964 100644
--- a/arch/arm
.
Signed-off-by: Jintack Lim
---
arch/arm64/kvm/sys_regs.c | 47 ++-
1 file changed, 46 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 65f4c20..395b964 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch
From: Dave Martin
Currently, a guest kernel sees the true CPU feature registers
(ID_*_EL1) when it reads them using MRS instructions. This means
that the guest will observe features that are present in the
hardware but the host doesn't understand or doesn't provide support
From: Dave Martin
Currently, a guest kernel sees the true CPU feature registers
(ID_*_EL1) when it reads them using MRS instructions. This means
that the guest will observe features that are present in the
hardware but the host doesn't understand or doesn't provide support
for. A guest may
On Sun, Jul 30, 2017 at 4:00 PM, Christoffer Dall <cd...@linaro.org> wrote:
> On Tue, Jul 18, 2017 at 11:58:46AM -0500, Jintack Lim wrote:
>> When HCR.NV bit is set, eret instructions trap to EL2 with EC code 0x1A.
>> Emulate eret instructions by setting pc and pstate.
>
On Sun, Jul 30, 2017 at 4:00 PM, Christoffer Dall wrote:
> On Tue, Jul 18, 2017 at 11:58:46AM -0500, Jintack Lim wrote:
>> When HCR.NV bit is set, eret instructions trap to EL2 with EC code 0x1A.
>> Emulate eret instructions by setting pc and pstate.
>
> It may be worth
On Sun, Jul 30, 2017 at 3:59 PM, Christoffer Dall <cd...@linaro.org> wrote:
> On Tue, Jul 18, 2017 at 11:58:34AM -0500, Jintack Lim wrote:
>> To support the virtual EL2 execution, we need to maintain the EL2
>> special registers such as SPSR_EL2, ELR_EL2 and SP_EL2 in vcp
On Sun, Jul 30, 2017 at 3:59 PM, Christoffer Dall wrote:
> On Tue, Jul 18, 2017 at 11:58:34AM -0500, Jintack Lim wrote:
>> To support the virtual EL2 execution, we need to maintain the EL2
>> special registers such as SPSR_EL2, ELR_EL2 and SP_EL2 in vcpu context.
>>
On Sun, Jul 30, 2017 at 3:59 PM, Christoffer Dall <cd...@linaro.org> wrote:
> On Tue, Jul 18, 2017 at 11:58:30AM -0500, Jintack Lim wrote:
>> Nested virtualizaion is in use only if all three conditions are met:
>> - The architecture supports nested virtualization.
>> -
On Sun, Jul 30, 2017 at 3:59 PM, Christoffer Dall wrote:
> On Tue, Jul 18, 2017 at 11:58:30AM -0500, Jintack Lim wrote:
>> Nested virtualizaion is in use only if all three conditions are met:
>> - The architecture supports nested virtualization.
>> - The ke
On Sun, Jul 30, 2017 at 3:59 PM, Christoffer Dall <cd...@linaro.org> wrote:
> On Tue, Jul 18, 2017 at 11:58:30AM -0500, Jintack Lim wrote:
>> Nested virtualizaion is in use only if all three conditions are met:
>> - The architecture supports nested virtualization.
>> -
On Sun, Jul 30, 2017 at 3:59 PM, Christoffer Dall wrote:
> On Tue, Jul 18, 2017 at 11:58:30AM -0500, Jintack Lim wrote:
>> Nested virtualizaion is in use only if all three conditions are met:
>> - The architecture supports nested virtualization.
>> - The ke
On Sun, Jul 30, 2017 at 3:59 PM, Christoffer Dall <cd...@linaro.org> wrote:
> On Tue, Jul 18, 2017 at 11:58:28AM -0500, Jintack Lim wrote:
>> Add a new kernel parameter(kvm-arm.nested) to enable KVM/ARM nested
>> virtualization support. This kernel parameter on arm architectur
On Sun, Jul 30, 2017 at 3:59 PM, Christoffer Dall wrote:
> On Tue, Jul 18, 2017 at 11:58:28AM -0500, Jintack Lim wrote:
>> Add a new kernel parameter(kvm-arm.nested) to enable KVM/ARM nested
>> virtualization support. This kernel parameter on arm architecture is
>>
Hi Christoffer,
On Mon, Jul 31, 2017 at 8:59 AM, Christoffer Dall <cd...@linaro.org> wrote:
> On Tue, Jul 18, 2017 at 11:59:04AM -0500, Jintack Lim wrote:
>> Forward CPACR_EL1 traps to the virtual EL2 if virtual CPTR_EL2 is
>> configured to trap CPACR_
Hi Christoffer,
On Mon, Jul 31, 2017 at 8:59 AM, Christoffer Dall wrote:
> On Tue, Jul 18, 2017 at 11:59:04AM -0500, Jintack Lim wrote:
>> Forward CPACR_EL1 traps to the virtual EL2 if virtual CPTR_EL2 is
>> configured to trap CPACR_EL1 accesses from EL1.
>>
>> T
Hi Christoffer,
On Mon, Jul 31, 2017 at 9:00 AM, Christoffer Dall <cd...@linaro.org> wrote:
> Hi Jintack,
>
> On Tue, Jul 18, 2017 at 11:58:26AM -0500, Jintack Lim wrote:
>> Nested virtualization is the ability to run a virtual machine inside another
>> virtual machine.
Hi Christoffer,
On Mon, Jul 31, 2017 at 9:00 AM, Christoffer Dall wrote:
> Hi Jintack,
>
> On Tue, Jul 18, 2017 at 11:58:26AM -0500, Jintack Lim wrote:
>> Nested virtualization is the ability to run a virtual machine inside another
>> virtual machine. In other word
On Fri, Jul 28, 2017 at 4:13 PM, Bandan Das <b...@redhat.com> wrote:
> Jintack Lim <jintack@linaro.org> writes:
> ...
>>>
>>> I'll share my experiment setup shortly.
>>
>> I summarized my experiment setup here.
>>
>> https://githu
On Fri, Jul 28, 2017 at 4:13 PM, Bandan Das wrote:
> Jintack Lim writes:
> ...
>>>
>>> I'll share my experiment setup shortly.
>>
>> I summarized my experiment setup here.
>>
>> https://github.com/columbia/nesting-pub/wiki/Nested-virtualization-on-
On Wed, Jul 19, 2017 at 4:49 AM, Christoffer Dall <cd...@linaro.org> wrote:
> Hi Jintack,
>
> On Tue, Jul 18, 2017 at 10:23:05PM -0400, Jintack Lim wrote:
>> On Tue, Jul 18, 2017 at 12:58 PM, Jintack Lim <jintack@linaro.org> wrote:
>> > Nested virtualiza
On Wed, Jul 19, 2017 at 4:49 AM, Christoffer Dall wrote:
> Hi Jintack,
>
> On Tue, Jul 18, 2017 at 10:23:05PM -0400, Jintack Lim wrote:
>> On Tue, Jul 18, 2017 at 12:58 PM, Jintack Lim wrote:
>> > Nested virtualization is the ability to run a virtual machine inside
&
On Tue, Jul 18, 2017 at 12:59 PM, Jintack Lim <jintack@linaro.org> wrote:
> Forward ELR_EL1, SPSR_EL1 and VBAR_EL1 traps to the virtual EL2 if the
> virtual HCR_EL2.NV bit is set.
>
> This is for recursive nested virtualization.
>
> Signed-off-by: Jintack Lim
On Tue, Jul 18, 2017 at 12:59 PM, Jintack Lim wrote:
> Forward ELR_EL1, SPSR_EL1 and VBAR_EL1 traps to the virtual EL2 if the
> virtual HCR_EL2.NV bit is set.
>
> This is for recursive nested virtualization.
>
> Signed-off-by: Jintack Lim
This should be linaro e-mail
On Tue, Jul 18, 2017 at 12:58 PM, Jintack Lim <jintack@linaro.org> wrote:
> Nested virtualization is the ability to run a virtual machine inside another
> virtual machine. In other words, it’s about running a hypervisor (the guest
> hypervisor) on top of another hypervisor (the
On Tue, Jul 18, 2017 at 12:58 PM, Jintack Lim wrote:
> Nested virtualization is the ability to run a virtual machine inside another
> virtual machine. In other words, it’s about running a hypervisor (the guest
> hypervisor) on top of another hypervisor (the host hypervisor).
>
> Su
EL2
Jintack Lim (31):
arm64: Add ARM64_HAS_NESTED_VIRT feature
KVM: arm/arm64: Enable nested virtualization via command-line
KVM: arm/arm64: Check if nested virtualization is in use
KVM: arm64: Add EL2 system registers to vcpu context
KVM: arm64: Add EL2 special registers to vcpu cont
EL2
Jintack Lim (31):
arm64: Add ARM64_HAS_NESTED_VIRT feature
KVM: arm/arm64: Enable nested virtualization via command-line
KVM: arm/arm64: Check if nested virtualization is in use
KVM: arm64: Add EL2 system registers to vcpu context
KVM: arm64: Add EL2 special registers to vcpu cont
is completed. Just add this parameter first to
use it when implementing nested virtualization support.
Signed-off-by: Jintack Lim <jintack@linaro.org>
---
Documentation/admin-guide/kernel-parameters.txt | 4
arch/arm/include/asm/kvm_host.h | 4
arch/arm64/inclu
is completed. Just add this parameter first to
use it when implementing nested virtualization support.
Signed-off-by: Jintack Lim
---
Documentation/admin-guide/kernel-parameters.txt | 4
arch/arm/include/asm/kvm_host.h | 4
arch/arm64/include/asm/kvm_host.h
Add a new ARM64_HAS_NESTED_VIRT feature to indicate that the
CPU has the ARMv8.3 nested virtualization capability.
This will be used to support nested virtualization in KVM.
Signed-off-by: Jintack Lim <jintack@linaro.org>
---
arch/arm64/include/asm/cpucaps.h | 3 ++-
arch/arm64/inclu
Add a new ARM64_HAS_NESTED_VIRT feature to indicate that the
CPU has the ARMv8.3 nested virtualization capability.
This will be used to support nested virtualization in KVM.
Signed-off-by: Jintack Lim
---
arch/arm64/include/asm/cpucaps.h | 3 ++-
arch/arm64/include/asm/sysreg.h | 1 +
arch
Nested virtualizaion is in use only if all three conditions are met:
- The architecture supports nested virtualization.
- The kernel parameter is set.
- The userspace uses nested virtualiztion feature.
Signed-off-by: Jintack Lim <jintack@linaro.org>
---
arch/arm/include/asm/kvm_host.h
Nested virtualizaion is in use only if all three conditions are met:
- The architecture supports nested virtualization.
- The kernel parameter is set.
- The userspace uses nested virtualiztion feature.
Signed-off-by: Jintack Lim
---
arch/arm/include/asm/kvm_host.h | 11 +++
arch/arm64
.
This patch doesn't set the NV bit yet. It will be set in a later patch
once nested virtualization support is completed.
Signed-off-by: Jintack Lim <jintack@linaro.org>
---
arch/arm64/include/asm/kvm_host.h | 30 +++-
arch/arm64/include/asm/sysreg.h
.
This patch doesn't set the NV bit yet. It will be set in a later patch
once nested virtualization support is completed.
Signed-off-by: Jintack Lim
---
arch/arm64/include/asm/kvm_host.h | 30 +++-
arch/arm64/include/asm/sysreg.h | 37 +
arch/arm64/kvm/sys_regs.c
From: Christoffer Dall
When running a nested hypervisor we occasionally have to figure out if
the mode we are switching into is the virtual EL2 mode or a regular
EL0/1 mode.
Signed-off-by: Christoffer Dall
---
From: Christoffer Dall
When running a nested hypervisor we occasionally have to figure out if
the mode we are switching into is the virtual EL2 mode or a regular
EL0/1 mode.
Signed-off-by: Christoffer Dall
---
arch/arm/include/asm/kvm_emulate.h | 6 ++
1 - 100 of 418 matches
Mail list logo