Re: [PATCH 05/37] PCI: dwc: Add platform_set_drvdata

d Zhu > Cc: Lucas Stach > Cc: Murali Karicheri > Cc: Minghuan Lian > Cc: Mingkai Hu > Cc: Roy Zang > Cc: Thomas Petazzoni > Cc: Niklas Cassel > Cc: Jesper Nilsson > Cc: Joao Pinto > Cc: Zhou Wang > Cc: Gabriele Paoloni > Cc: Stanimir Varba

Re: [PATCH 11/37] PCI: dwc: Split pcie-designware.c into host and core files

Às 10:26 AM de 1/12/2017, Kishon Vijay Abraham I escreveu: > Split pcie-designware.c into pcie-designware-host.c that contains > the host specific parts of the driver and pcie-designware.c that > contains the parts used by both host driver and endpoint driver. > > Signed-off-by: Kishon Vijay

Re: [PATCH 11/37] PCI: dwc: Split pcie-designware.c into host and core files

Às 10:26 AM de 1/12/2017, Kishon Vijay Abraham I escreveu: > Split pcie-designware.c into pcie-designware-host.c that contains > the host specific parts of the driver and pcie-designware.c that > contains the parts used by both host driver and endpoint driver. > > Signed-off-by: Kishon Vijay

Re: [PATCH 10/37] PCI: dwc: designware: Fix style errors in pcie-designware.c

evfn, int where, int size, u32 val) > { > int ret, type; > u32 busdev, cfg_size; > @@ -711,7 +711,7 @@ static int dw_pcie_valid_device(struct pcie_port *pp, > struct pci_bus *bus, > } > > static int dw_pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, > - int size, u32 *val) > +int size, u32 *val) > { > struct pcie_port *pp = bus->sysdata; > > @@ -727,7 +727,7 @@ static int dw_pcie_rd_conf(struct pci_bus *bus, u32 > devfn, int where, > } > > static int dw_pcie_wr_conf(struct pci_bus *bus, u32 devfn, > - int where, int size, u32 val) > +int where, int size, u32 val) > { > struct pcie_port *pp = bus->sysdata; > > Always good to make clean up! Thanks! Acked-By: Joao Pinto <jpi...@synopsys.com>

Re: [PATCH 10/37] PCI: dwc: designware: Fix style errors in pcie-designware.c

ize, u32 val) > { > int ret, type; > u32 busdev, cfg_size; > @@ -711,7 +711,7 @@ static int dw_pcie_valid_device(struct pcie_port *pp, > struct pci_bus *bus, > } > > static int dw_pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, > - int size, u32 *val) > +int size, u32 *val) > { > struct pcie_port *pp = bus->sysdata; > > @@ -727,7 +727,7 @@ static int dw_pcie_rd_conf(struct pci_bus *bus, u32 > devfn, int where, > } > > static int dw_pcie_wr_conf(struct pci_bus *bus, u32 devfn, > - int where, int size, u32 val) > +int where, int size, u32 val) > { > struct pcie_port *pp = bus->sysdata; > > Always good to make clean up! Thanks! Acked-By: Joao Pinto

Re: [PATCH 06/37] PCI: dwc: Rename cfg_read/cfg_write to read/write

dbi space. > This is in preparation for added endpoint support to linux kernel. > > Cc: Jingoo Han <jingooh...@gmail.com> > Cc: Murali Karicheri <m-kariche...@ti.com> > Cc: Joao Pinto <joao.pi...@synopsys.com> > Cc: Stanimir Varbanov <svarba...@mm-sol.com> > Cc:

Re: [PATCH 06/37] PCI: dwc: Rename cfg_read/cfg_write to read/write

dbi space. > This is in preparation for added endpoint support to linux kernel. > > Cc: Jingoo Han > Cc: Murali Karicheri > Cc: Joao Pinto > Cc: Stanimir Varbanov > Cc: Pratyush Anand > Signed-off-by: Kishon Vijay Abraham I > --- > drivers/pci/dwc/pci-dra7xx.c | 16

Re: [PATCH 04/37] PCI: dwc: designware: Move the register defines to designware header file

@@ -25,76 +25,6 @@ > > #include "pcie-designware.h" Make sense. Reviewed-By: Joao Pinto <jpi...@synopsys.com>

Re: [PATCH 04/37] PCI: dwc: designware: Move the register defines to designware header file

@ > > #include "pcie-designware.h" Make sense. Reviewed-By: Joao Pinto

Re: [PATCH 02/37] PCI: dwc: designware: Add new *ops* for cpu addr fixup

7 @@ struct pcie_port { > }; > > struct pcie_host_ops { > + u64 (*cpu_addr_fixup)(u64 cpu_addr); > u32 (*readl_rc)(struct pcie_port *pp, u32 reg); > void (*writel_rc)(struct pcie_port *pp, u32 reg, u32 val); > int (*rd_own_conf)(struct pcie_port *pp, int where, int size, u32 *val); > I think this is an acceptable fixup, I am ok with it. Reviewed-By: Joao Pinto <jpi...@synopsys.com> Joao

Re: [PATCH 02/37] PCI: dwc: designware: Add new *ops* for cpu addr fixup

gt; }; > > struct pcie_host_ops { > + u64 (*cpu_addr_fixup)(u64 cpu_addr); > u32 (*readl_rc)(struct pcie_port *pp, u32 reg); > void (*writel_rc)(struct pcie_port *pp, u32 reg, u32 val); > int (*rd_own_conf)(struct pcie_port *pp, int where, int size, u32 *val); > I think this is an acceptable fixup, I am ok with it. Reviewed-By: Joao Pinto Joao

Re: [PATCH] PCI: dwc: Add COMPILE_TEST to all designware based drivers

Hi Kishon, Às 9:43 AM de 1/12/2017, Kishon Vijay Abraham I escreveu: > Add COMPILE_TEST to all designware based drivers so that it is possible > to perform compile test even when a particular architecture specific > config symbol is not set. > > Signed-off-by: Kishon Vijay Abraham I

Re: [PATCH] PCI: dwc: Add COMPILE_TEST to all designware based drivers

Hi Kishon, Às 9:43 AM de 1/12/2017, Kishon Vijay Abraham I escreveu: > Add COMPILE_TEST to all designware based drivers so that it is possible > to perform compile test even when a particular architecture specific > config symbol is not set. > > Signed-off-by: Kishon Vijay Abraham I > --- >

Re: [PATCH] pci: Fix typo in MAINTAINERS file

Hi Bjorn, Às 9:10 PM de 1/11/2017, Bjorn Helgaas escreveu: > Hi Joao, > > On Wed, Dec 28, 2016 at 04:05:11PM +0000, Joao Pinto wrote: >> This patch fixes a typo in MAINTAINERS file. >> >> Signed-off-by: Joao Pinto <jpi...@synopsys.com> >> --- >&

Re: [PATCH] pci: Fix typo in MAINTAINERS file

Hi Bjorn, Às 9:10 PM de 1/11/2017, Bjorn Helgaas escreveu: > Hi Joao, > > On Wed, Dec 28, 2016 at 04:05:11PM +0000, Joao Pinto wrote: >> This patch fixes a typo in MAINTAINERS file. >> >> Signed-off-by: Joao Pinto >> --- >> MAINTAINERS | 2 +- >>

Re: [PATCH] PCI: designware: fix asynchronous external abort in keystone PCIe h/w

dbg(pp->dev, "iATU unroll: %s\n", >> +pp->iatu_unroll_enabled ? "enabled" : "disabled"); >> + >> dw_pcie_prog_outbound_atu(pp, PCIE_ATU_REGION_INDEX0, >>PCIE_ATU_TYPE_MEM, pp->mem_base, >>pp->mem_bus_addr, pp->mem_size); >> > Bjorn, > > A Gentle ping to merge this important fix to v4.10-rc kernel for Keystone PCI > as > it is broken since v4.9. > In my understanding your proposal will have no impact in platform using ATU, so for me is fine. Acked-By: Joao Pinto <jpi...@synopsys.com> > Thanks >

Re: [PATCH] PCI: designware: fix asynchronous external abort in keystone PCIe h/w

+pp->iatu_unroll_enabled ? "enabled" : "disabled"); >> + >> dw_pcie_prog_outbound_atu(pp, PCIE_ATU_REGION_INDEX0, >>PCIE_ATU_TYPE_MEM, pp->mem_base, >>pp->mem_bus_addr, pp->mem_size); >> > Bjorn, > > A Gentle ping to merge this important fix to v4.10-rc kernel for Keystone PCI > as > it is broken since v4.9. > In my understanding your proposal will have no impact in platform using ATU, so for me is fine. Acked-By: Joao Pinto > Thanks >

Re: [PATCH v3] net: stmmac: fix maxmtu assignment to be within valid range

Hi Wilson, Às 12:49 AM de 1/7/2017, Kweh, Hock Leong escreveu: > From: "Kweh, Hock Leong" > > There is no checking valid value of maxmtu when getting it from device tree. > This resolution added the checking condition to ensure the assignment is > made within a valid

Re: [PATCH v3] net: stmmac: fix maxmtu assignment to be within valid range

Hi Wilson, Às 12:49 AM de 1/7/2017, Kweh, Hock Leong escreveu: > From: "Kweh, Hock Leong" > > There is no checking valid value of maxmtu when getting it from device tree. > This resolution added the checking condition to ensure the assignment is > made within a valid range. > > Signed-off-by:

Re: [PATCH v5] PCI: add a new directory for designware core

Hello, Às 1:12 PM de 1/6/2017, Kishon Vijay Abraham I escreveu: > Hi Arnd, > > On Friday 06 January 2017 06:31 PM, Arnd Bergmann wrote: >> On Friday, January 6, 2017 6:22:48 PM CET Kishon Vijay Abraham I wrote: >>> Group all the PCI drivers that use designware core in dwc directory. >>> dwc IP

Re: [PATCH v5] PCI: add a new directory for designware core

Hello, Às 1:12 PM de 1/6/2017, Kishon Vijay Abraham I escreveu: > Hi Arnd, > > On Friday 06 January 2017 06:31 PM, Arnd Bergmann wrote: >> On Friday, January 6, 2017 6:22:48 PM CET Kishon Vijay Abraham I wrote: >>> Group all the PCI drivers that use designware core in dwc directory. >>> dwc IP

Re: [PATCH] MIPS: NI 169445 board support

Às 6:44 PM de 1/5/2017, Nathan Sullivan escreveu: > On Thu, Jan 05, 2017 at 06:33:53PM +0000, Joao Pinto wrote: >> Hi, >> >> Às 6:28 PM de 1/5/2017, Niklas Cassel escreveu: >>> On 01/04/2017 05:38 PM, Nathan Sullivan wrote: >>>> On Tue, Dec 20, 20

Re: [PATCH] MIPS: NI 169445 board support

Às 6:44 PM de 1/5/2017, Nathan Sullivan escreveu: > On Thu, Jan 05, 2017 at 06:33:53PM +0000, Joao Pinto wrote: >> Hi, >> >> Às 6:28 PM de 1/5/2017, Niklas Cassel escreveu: >>> On 01/04/2017 05:38 PM, Nathan Sullivan wrote: >>>> On Tue, Dec 20, 20

Re: [PATCH] MIPS: NI 169445 board support

bus, that means the NIC descriptor skip field would need to be set to >> 14 to align the 16-byte descriptors... >> >> I guess it makes sense for a generic MIPS kernel to align everything for 128 >> byte >> cache lines, and for me to fix the dwc_eth_qos driver to h

Re: [PATCH] MIPS: NI 169445 board support

ld would need to be set to >> 14 to align the 16-byte descriptors... >> >> I guess it makes sense for a generic MIPS kernel to align everything for 128 >> byte >> cache lines, and for me to fix the dwc_eth_qos driver to handle cases where >> the >> line size is

Re: [PATCH v2] PCI: add a new directory for designware core

future developments. Thanks! Acked-By: Joao Pinto <jpi...@synopsys.com> Às 12:08 PM de 1/4/2017, Kishon Vijay Abraham I escreveu: > Group all the PCI drivers that use designware core in dwc directory. > dwc IP is capable of operating in both host mode and device mode and > keeping it i

Re: [PATCH v2] PCI: add a new directory for designware core

future developments. Thanks! Acked-By: Joao Pinto Às 12:08 PM de 1/4/2017, Kishon Vijay Abraham I escreveu: > Group all the PCI drivers that use designware core in dwc directory. > dwc IP is capable of operating in both host mode and device mode and > keeping it inside the *host*

[PATCH] stmmac: adding EEE to GMAC4

This patch adds Energy Efficiency Ethernet to GMAC4. Signed-off-by: Joao Pinto <jpi...@synopsys.com> --- drivers/net/ethernet/stmicro/stmmac/dwmac4.h | 12 + drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c | 59 +++ 2 files changed, 71 insertions(+) diff

[PATCH] stmmac: adding EEE to GMAC4

This patch adds Energy Efficiency Ethernet to GMAC4. Signed-off-by: Joao Pinto --- drivers/net/ethernet/stmicro/stmmac/dwmac4.h | 12 + drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c | 59 +++ 2 files changed, 71 insertions(+) diff --git a/drivers/net/ethernet

Re: [PATCH] pci: rename *host* directory to *controller*

Hi, Às 12:20 PM de 12/29/2016, Kishon Vijay Abraham I escreveu: > Hi, > > On Thursday 29 December 2016 05:38 PM, Joao Pinto wrote: >> Às 11:58 AM de 12/29/2016, Kishon Vijay Abraham I escreveu: >>> Hi, >>> >>> On Thursday 29 December 2016 05:23 PM, J

Re: [PATCH] pci: rename *host* directory to *controller*

Hi, Às 12:20 PM de 12/29/2016, Kishon Vijay Abraham I escreveu: > Hi, > > On Thursday 29 December 2016 05:38 PM, Joao Pinto wrote: >> Às 11:58 AM de 12/29/2016, Kishon Vijay Abraham I escreveu: >>> Hi, >>> >>> On Thursday 29 December 2016 05:23 PM, J

Re: [PATCH] pci: rename *host* directory to *controller*

Às 12:20 PM de 12/29/2016, Kishon Vijay Abraham I escreveu: > Hi, > > On Thursday 29 December 2016 05:38 PM, Joao Pinto wrote: >> Às 11:58 AM de 12/29/2016, Kishon Vijay Abraham I escreveu: >>> Hi, >>> >>> On Thursday 29 December 2016 05:23 PM, Joao P

Re: [PATCH] pci: rename *host* directory to *controller*

Às 12:20 PM de 12/29/2016, Kishon Vijay Abraham I escreveu: > Hi, > > On Thursday 29 December 2016 05:38 PM, Joao Pinto wrote: >> Às 11:58 AM de 12/29/2016, Kishon Vijay Abraham I escreveu: >>> Hi, >>> >>> On Thursday 29 December 2016 05:23 PM, Joao P

Re: [PATCH] pci: rename *host* directory to *controller*

Às 11:58 AM de 12/29/2016, Kishon Vijay Abraham I escreveu: > Hi, > > On Thursday 29 December 2016 05:23 PM, Joao Pinto wrote: >> Às 11:48 AM de 12/29/2016, Kishon Vijay Abraham I escreveu: >>> Hi, >>> >>> On Thursday 29 December 2016 04:08 PM, Joao Pinto

Re: [PATCH] pci: rename *host* directory to *controller*

Às 11:58 AM de 12/29/2016, Kishon Vijay Abraham I escreveu: > Hi, > > On Thursday 29 December 2016 05:23 PM, Joao Pinto wrote: >> Às 11:48 AM de 12/29/2016, Kishon Vijay Abraham I escreveu: >>> Hi, >>> >>> On Thursday 29 December 2016 04:08 PM, Joao Pinto

Re: [PATCH] pci: rename *host* directory to *controller*

Às 11:48 AM de 12/29/2016, Kishon Vijay Abraham I escreveu: > Hi, > > On Thursday 29 December 2016 04:08 PM, Joao Pinto wrote: >> >> Hi, >> >> Às 5:46 AM de 12/29/2016, Kishon Vijay Abraham I escreveu: >>> Hi, >>> >>> On Wednesday 28 Dec

Re: [PATCH] pci: rename *host* directory to *controller*

Às 11:48 AM de 12/29/2016, Kishon Vijay Abraham I escreveu: > Hi, > > On Thursday 29 December 2016 04:08 PM, Joao Pinto wrote: >> >> Hi, >> >> Às 5:46 AM de 12/29/2016, Kishon Vijay Abraham I escreveu: >>> Hi, >>> >>> On Wednesday 28 Dec

Re: [PATCH] pci: rename *host* directory to *controller*

Hi, Às 5:46 AM de 12/29/2016, Kishon Vijay Abraham I escreveu: > Hi, > > On Wednesday 28 December 2016 10:50 PM, Joao Pinto wrote: >> Às 5:17 PM de 12/28/2016, Joao Pinto escreveu: >>> Às 4:41 PM de 12/28/2016, Bjorn Helgaas escreveu: >>>> On Wed, Dec 28,

Re: [PATCH] pci: rename *host* directory to *controller*

Hi, Às 5:46 AM de 12/29/2016, Kishon Vijay Abraham I escreveu: > Hi, > > On Wednesday 28 December 2016 10:50 PM, Joao Pinto wrote: >> Às 5:17 PM de 12/28/2016, Joao Pinto escreveu: >>> Às 4:41 PM de 12/28/2016, Bjorn Helgaas escreveu: >>>> On Wed, Dec 28,

Re: [PATCH] pci: rename *host* directory to *controller*

Às 5:17 PM de 12/28/2016, Joao Pinto escreveu: > Às 4:41 PM de 12/28/2016, Bjorn Helgaas escreveu: >> On Wed, Dec 28, 2016 at 01:57:13PM +0000, Joao Pinto wrote: >>> Às 9:22 AM de 12/28/2016, Christoph Hellwig escreveu: >>>> On Wed, Dec 28, 2016 at 01:39:37PM +0530

Re: [PATCH] pci: rename *host* directory to *controller*

Às 5:17 PM de 12/28/2016, Joao Pinto escreveu: > Às 4:41 PM de 12/28/2016, Bjorn Helgaas escreveu: >> On Wed, Dec 28, 2016 at 01:57:13PM +0000, Joao Pinto wrote: >>> Às 9:22 AM de 12/28/2016, Christoph Hellwig escreveu: >>>> On Wed, Dec 28, 2016 at 01:39:37PM +0530

Re: [PATCH] pci: rename *host* directory to *controller*

Às 4:41 PM de 12/28/2016, Bjorn Helgaas escreveu: > On Wed, Dec 28, 2016 at 01:57:13PM +0000, Joao Pinto wrote: >> Às 9:22 AM de 12/28/2016, Christoph Hellwig escreveu: >>> On Wed, Dec 28, 2016 at 01:39:37PM +0530, Kishon Vijay Abraham I wrote: >>>> As discussed d

Re: [PATCH] pci: rename *host* directory to *controller*

Às 4:41 PM de 12/28/2016, Bjorn Helgaas escreveu: > On Wed, Dec 28, 2016 at 01:57:13PM +0000, Joao Pinto wrote: >> Às 9:22 AM de 12/28/2016, Christoph Hellwig escreveu: >>> On Wed, Dec 28, 2016 at 01:39:37PM +0530, Kishon Vijay Abraham I wrote: >>>> As discussed d

[PATCH] pci: Fix typo in MAINTAINERS file

This patch fixes a typo in MAINTAINERS file. Signed-off-by: Joao Pinto <jpi...@synopsys.com> --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index cfff2c9..1056392 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -9512,7 +9512,

[PATCH] pci: Fix typo in MAINTAINERS file

This patch fixes a typo in MAINTAINERS file. Signed-off-by: Joao Pinto --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index cfff2c9..1056392 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -9512,7 +9512,7 @@ L:linux-samsung

Re: [PATCH] pci: rename *host* directory to *controller*

sts.infradead.org (moderated for non-subscribers) >> S: Maintained >> F: Documentation/devicetree/bindings/pci/aardvark-pci.txt >> -F: drivers/pci/host/pci-aardvark.c >> +F: drivers/pci/controller/pci-aardvark.c >> >> PCI DRIVER FOR NVIDIA TEGRA >&g

Re: [PATCH] pci: rename *host* directory to *controller*

@lists.infradead.org (moderated for non-subscribers) >> S: Maintained >> F: Documentation/devicetree/bindings/pci/aardvark-pci.txt >> -F: drivers/pci/host/pci-aardvark.c >> +F: drivers/pci/controller/pci-aardvark.c >> >> PCI DRIVER FOR NVIDIA TEGRA

[PATCH] stmmac: adding EEE to GMAC4

This patch adds Energy Efficiency Ethernet to GMAC4. Signed-off-by: Joao Pinto <jpi...@synopsys.com> --- drivers/net/ethernet/stmicro/stmmac/dwmac4.h | 12 + drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c | 59 +++ 2 files changed, 71 insertions(+) diff

[PATCH] stmmac: adding EEE to GMAC4

This patch adds Energy Efficiency Ethernet to GMAC4. Signed-off-by: Joao Pinto --- drivers/net/ethernet/stmicro/stmmac/dwmac4.h | 12 + drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c | 59 +++ 2 files changed, 71 insertions(+) diff --git a/drivers/net/ethernet

Re: [PATCH] net: stmmac: fix incorrect bit set in gmac4 mdio addr register

ask; > @@ -126,6 +126,8 @@ static int stmmac_mdio_write(struct mii_bus *bus, int > phyaddr, int phyreg, > & priv->hw->mii.clk_csr_mask; > if (priv->plat->has_gmac4) > value |= MII_GMAC4_WRITE; > + else > + value |= MI

Re: [PATCH] net: stmmac: fix incorrect bit set in gmac4 mdio addr register

mii_bus *bus, int > phyaddr, int phyreg, > & priv->hw->mii.clk_csr_mask; > if (priv->plat->has_gmac4) > value |= MII_GMAC4_WRITE; > + else > + value |= MII_WRITE; > > /* Wait until any existing MII operation is complete */ > if (stmmac_mdio_busy_wait(priv->ioaddr, mii_address)) > Acked-By: Joao Pinto

Re: [RFC PATCH 4/6] PCI: exynos5433: Add new exynos pci host controller for Exynos5433

Hello Jaehoon, Às 5:20 AM de 12/26/2016, Jaehoon Chung escreveu: > Exynos5433 supports the PCIe. > This patch adds new pci-exynos5433.c file for Exynos ARM64. > > Signed-off-by: Jaehoon Chung > --- > drivers/pci/host/Kconfig | 9 + >

Re: [RFC PATCH 4/6] PCI: exynos5433: Add new exynos pci host controller for Exynos5433

Hello Jaehoon, Às 5:20 AM de 12/26/2016, Jaehoon Chung escreveu: > Exynos5433 supports the PCIe. > This patch adds new pci-exynos5433.c file for Exynos ARM64. > > Signed-off-by: Jaehoon Chung > --- > drivers/pci/host/Kconfig | 9 + > drivers/pci/host/Makefile | 1 + >

[PATCH v3] stmmac: CSR clock configuration fix

When testing stmmac with my QoS reference design I checked a problem in the CSR clock configuration that was impossibilitating the phy discovery, since every read operation returned 0x. This patch fixes the issue. Signed-off-by: Joao Pinto <jpi...@synopsys.com> --- changes v2->

[PATCH v3] stmmac: CSR clock configuration fix

When testing stmmac with my QoS reference design I checked a problem in the CSR clock configuration that was impossibilitating the phy discovery, since every read operation returned 0x. This patch fixes the issue. Signed-off-by: Joao Pinto --- changes v2->v3 (Phil Reid) - Altera u

Re: [PATCH v2] stmmac: CSR clock configuration fix

Hello Phil, Às 1:09 AM de 12/23/2016, Phil Reid escreveu: > G'day Joao, > On 23/12/2016 01:06, Joao Pinto wrote: >> Às 4:57 PM de 12/22/2016, Phil Reid escreveu: >>> On 22/12/2016 23:47, Joao Pinto wrote: >>>> >>>> Hello Phil, >>>> >&

Re: [PATCH v2] stmmac: CSR clock configuration fix

Hello Phil, Às 1:09 AM de 12/23/2016, Phil Reid escreveu: > G'day Joao, > On 23/12/2016 01:06, Joao Pinto wrote: >> Às 4:57 PM de 12/22/2016, Phil Reid escreveu: >>> On 22/12/2016 23:47, Joao Pinto wrote: >>>> >>>> Hello Phil, >>>> >&

Re: [PATCH v2] stmmac: CSR clock configuration fix

Às 4:57 PM de 12/22/2016, Phil Reid escreveu: > On 22/12/2016 23:47, Joao Pinto wrote: >> >> Hello Phil, >> >> Às 3:42 PM de 12/22/2016, Phil Reid escreveu: >>> G'day Joao, >>> >>> On 22/12/2016 20:38, Joao Pinto wrote: >>>> Wh

Re: [PATCH v2] stmmac: CSR clock configuration fix

Às 4:57 PM de 12/22/2016, Phil Reid escreveu: > On 22/12/2016 23:47, Joao Pinto wrote: >> >> Hello Phil, >> >> Às 3:42 PM de 12/22/2016, Phil Reid escreveu: >>> G'day Joao, >>> >>> On 22/12/2016 20:38, Joao Pinto wrote: >>>> Wh

Re: [PATCH v2] stmmac: CSR clock configuration fix

Hello Phil, Às 3:42 PM de 12/22/2016, Phil Reid escreveu: > G'day Joao, > > On 22/12/2016 20:38, Joao Pinto wrote: >> When testing stmmac with my QoS reference design I checked a problem in the >> CSR clock configuration that was impossibilitating the phy discovery

Re: [PATCH v2] stmmac: CSR clock configuration fix

Hello Phil, Às 3:42 PM de 12/22/2016, Phil Reid escreveu: > G'day Joao, > > On 22/12/2016 20:38, Joao Pinto wrote: >> When testing stmmac with my QoS reference design I checked a problem in the >> CSR clock configuration that was impossibilitating the phy discovery

[PATCH v2] stmmac: CSR clock configuration fix

When testing stmmac with my QoS reference design I checked a problem in the CSR clock configuration that was impossibilitating the phy discovery, since every read operation returned 0x. This patch fixes the issue. Signed-off-by: Joao Pinto <jpi...@synopsys.com> --- changes v1->

[PATCH v2] stmmac: CSR clock configuration fix

When testing stmmac with my QoS reference design I checked a problem in the CSR clock configuration that was impossibilitating the phy discovery, since every read operation returned 0x. This patch fixes the issue. Signed-off-by: Joao Pinto --- changes v1->v2 (David Miller) - DWMAC

Re: [PATCH] stmmac: CSR clock configuration fix

Hi David, Às 10:15 AM de 12/22/2016, Joao Pinto escreveu: > Às 6:21 PM de 12/21/2016, David Miller escreveu: >> From: Joao Pinto <joao.pi...@synopsys.com> >> Date: Tue, 20 Dec 2016 11:21:47 + >> >>> When testing stmmac with my QoS reference design I ch

Re: [PATCH] stmmac: CSR clock configuration fix

Hi David, Às 10:15 AM de 12/22/2016, Joao Pinto escreveu: > Às 6:21 PM de 12/21/2016, David Miller escreveu: >> From: Joao Pinto >> Date: Tue, 20 Dec 2016 11:21:47 + >> >>> When testing stmmac with my QoS reference design I checked a problem in t

Re: [PATCH] stmmac: CSR clock configuration fix

Às 12:23 PM de 12/22/2016, Joao Pinto escreveu: > > Hi David, > > Às 10:15 AM de 12/22/2016, Joao Pinto escreveu: >> Às 6:21 PM de 12/21/2016, David Miller escreveu: >>> From: Joao Pinto <joao.pi...@synopsys.com> >>> Date: Tue, 20 Dec 2016 11:21:47 +000

Re: [PATCH] stmmac: CSR clock configuration fix

Às 12:23 PM de 12/22/2016, Joao Pinto escreveu: > > Hi David, > > Às 10:15 AM de 12/22/2016, Joao Pinto escreveu: >> Às 6:21 PM de 12/21/2016, David Miller escreveu: >>> From: Joao Pinto >>> Date: Tue, 20 Dec 2016 11:21:47 + >>> >>&g

Re: [PATCH] stmmac: CSR clock configuration fix

Às 6:21 PM de 12/21/2016, David Miller escreveu: > From: Joao Pinto <joao.pi...@synopsys.com> > Date: Tue, 20 Dec 2016 11:21:47 + > >> When testing stmmac with my QoS reference design I checked a problem in the >> CSR clock configuration that was impossibilitati

Re: [PATCH] stmmac: CSR clock configuration fix

Às 6:21 PM de 12/21/2016, David Miller escreveu: > From: Joao Pinto > Date: Tue, 20 Dec 2016 11:21:47 + > >> When testing stmmac with my QoS reference design I checked a problem in the >> CSR clock configuration that was impossibilitating the phy discovery, since &g

Re: [PATCH v3] stmmac: enable rx queues

Às 6:26 PM de 12/21/2016, David Miller escreveu: > From: Joao Pinto <joao.pi...@synopsys.com> > Date: Tue, 20 Dec 2016 17:09:28 + > >> When the hardware is synthesized with multiple queues, all queues are >> disabled for default. This patch adds the rx queues c

Re: [PATCH v3] stmmac: enable rx queues

Às 6:26 PM de 12/21/2016, David Miller escreveu: > From: Joao Pinto > Date: Tue, 20 Dec 2016 17:09:28 + > >> When the hardware is synthesized with multiple queues, all queues are >> disabled for default. This patch adds the rx queues configuration. >> This pa

[PATCH v3] stmmac: enable rx queues

When the hardware is synthesized with multiple queues, all queues are disabled for default. This patch adds the rx queues configuration. This patch was successfully tested in a Synopsys QoS Reference design. Signed-off-by: Joao Pinto <jpi...@synopsys.com> --- changes v2 -> v3 (Seraphin

[PATCH v3] stmmac: enable rx queues

When the hardware is synthesized with multiple queues, all queues are disabled for default. This patch adds the rx queues configuration. This patch was successfully tested in a Synopsys QoS Reference design. Signed-off-by: Joao Pinto --- changes v2 -> v3 (Seraphin Bonna

Re: [PATCH v2] stmmac: enable rx queues

Às 4:51 PM de 12/20/2016, Seraphin BONNAFFE escreveu: > Hi Joao, > > Please find two more comments below. > > Regards, > Séraphin > > > On 12/20/2016 05:27 PM, Joao Pinto wrote: >> When the hardware is synthesized with multiple queues, all queues are >>

Re: [PATCH v2] stmmac: enable rx queues

Às 4:51 PM de 12/20/2016, Seraphin BONNAFFE escreveu: > Hi Joao, > > Please find two more comments below. > > Regards, > Séraphin > > > On 12/20/2016 05:27 PM, Joao Pinto wrote: >> When the hardware is synthesized with multiple queues, all queues are >>

[PATCH v2] stmmac: enable rx queues

When the hardware is synthesized with multiple queues, all queues are disabled for default. This patch adds the rx queues configuration. This patch was successfully tested in a Synopsys QoS Reference design. Signed-off-by: Joao Pinto <jpi...@synopsys.com> --- changes v1 -> v2 (Nikl

[PATCH v2] stmmac: enable rx queues

When the hardware is synthesized with multiple queues, all queues are disabled for default. This patch adds the rx queues configuration. This patch was successfully tested in a Synopsys QoS Reference design. Signed-off-by: Joao Pinto --- changes v1 -> v2 (Niklas Cassel and Seraphin Bonna

Re: [PATCH] stmmac: enable rx queues

Às 3:05 PM de 12/20/2016, Niklas Cassel escreveu: > > > On 12/20/2016 03:52 PM, Joao Pinto wrote: >> Hi Niklas, >> >> Às 2:43 PM de 12/20/2016, Niklas Cassel escreveu: >>> >>> On 12/20/2016 01:55 PM, Joao Pinto wrote: >>>> When the

Re: [PATCH] stmmac: enable rx queues

Às 3:05 PM de 12/20/2016, Niklas Cassel escreveu: > > > On 12/20/2016 03:52 PM, Joao Pinto wrote: >> Hi Niklas, >> >> Às 2:43 PM de 12/20/2016, Niklas Cassel escreveu: >>> >>> On 12/20/2016 01:55 PM, Joao Pinto wrote: >>>> When the

Re: [PATCH] stmmac: enable rx queues

Hi Séraphin, Às 2:52 PM de 12/20/2016, Seraphin BONNAFFE escreveu: > Hi Joao, > > Please see my in-line comments. > > Regards, > Séraphin > -- > Seraphin BONNAFFE | Tel: +33244027061 > STMicroelectronics | ADG | S/W Design > > On 12/20/2016 01:55 PM, Joao

Re: [PATCH] stmmac: enable rx queues

Hi Séraphin, Às 2:52 PM de 12/20/2016, Seraphin BONNAFFE escreveu: > Hi Joao, > > Please see my in-line comments. > > Regards, > Séraphin > -- > Seraphin BONNAFFE | Tel: +33244027061 > STMicroelectronics | ADG | S/W Design > > On 12/20/2016 01:55 PM, Joao

Re: [PATCH] stmmac: enable rx queues

Hi Niklas, Às 2:43 PM de 12/20/2016, Niklas Cassel escreveu: > > > On 12/20/2016 01:55 PM, Joao Pinto wrote: >> When the hardware is synthesized with multiple queues, all queues are >> disabled for default. This patch adds the rx queues configuration. >> This pa

Re: [PATCH] stmmac: enable rx queues

Hi Niklas, Às 2:43 PM de 12/20/2016, Niklas Cassel escreveu: > > > On 12/20/2016 01:55 PM, Joao Pinto wrote: >> When the hardware is synthesized with multiple queues, all queues are >> disabled for default. This patch adds the rx queues configuration. >> This pa

[PATCH] stmmac: enable rx queues

When the hardware is synthesized with multiple queues, all queues are disabled for default. This patch adds the rx queues configuration. This patch was successfully tested in a Synopsys QoS Reference design. Signed-off-by: Joao Pinto <jpi...@synopsys.com> --- drivers/net/ethernet/stmicro/

[PATCH] stmmac: enable rx queues

When the hardware is synthesized with multiple queues, all queues are disabled for default. This patch adds the rx queues configuration. This patch was successfully tested in a Synopsys QoS Reference design. Signed-off-by: Joao Pinto --- drivers/net/ethernet/stmicro/stmmac/common.h | 2

[PATCH] stmmac: CSR clock configuration fix

When testing stmmac with my QoS reference design I checked a problem in the CSR clock configuration that was impossibilitating the phy discovery, since every read operation returned 0x. This patch fixes the issue. Signed-off-by: Joao Pinto <jpi...@synopsys.com> --- drivers/net/et

[PATCH] stmmac: CSR clock configuration fix

When testing stmmac with my QoS reference design I checked a problem in the CSR clock configuration that was impossibilitating the phy discovery, since every read operation returned 0x. This patch fixes the issue. Signed-off-by: Joao Pinto --- drivers/net/ethernet/stmicro/stmmac

Re: [PATCH] stmmac: fix memory barriers

Às 5:19 PM de 12/19/2016, Niklas Cassel escreveu: > On 12/19/2016 06:10 PM, Joao Pinto wrote: >> Hi, >> >> I am trying to built net-next git tree and it is failing: >> >> CC drivers/pnp/card.o >> drivers/net/ethernet/stmicro/stmmac/stmmac_main.c:

Re: [PATCH] stmmac: fix memory barriers

Às 5:19 PM de 12/19/2016, Niklas Cassel escreveu: > On 12/19/2016 06:10 PM, Joao Pinto wrote: >> Hi, >> >> I am trying to built net-next git tree and it is failing: >> >> CC drivers/pnp/card.o >> drivers/net/ethernet/stmicro/stmmac/stmmac_main.c:

Re: [PATCH] stmmac: fix memory barriers

Hi, I am trying to built net-next git tree and it is failing: CC drivers/pnp/card.o drivers/net/ethernet/stmicro/stmmac/stmmac_main.c: In function ‘stmmac_hw_fix_mac_speed’: drivers/net/ethernet/stmicro/stmmac/stmmac_main.c:224:34: error: ‘struct stmmac_priv’ has no member named ‘phydev’

Re: [PATCH] stmmac: fix memory barriers

Hi, I am trying to built net-next git tree and it is failing: CC drivers/pnp/card.o drivers/net/ethernet/stmicro/stmmac/stmmac_main.c: In function ‘stmmac_hw_fix_mac_speed’: drivers/net/ethernet/stmicro/stmmac/stmmac_main.c:224:34: error: ‘struct stmmac_priv’ has no member named ‘phydev’

Re: [PATCH v2] PCI: designware: add host_init error handling

Hi Srinivas! Thanks for the update! Acked-By: Joao Pinto <jpi...@synopsys.com> Às 10:32 AM de 12/7/2016, Srinivas Kandagatla escreveu: > This patch add support to return value from host_init() callback from drivers, > so that the designware libary can handle or pass it to proper

Re: [PATCH v2] PCI: designware: add host_init error handling

Hi Srinivas! Thanks for the update! Acked-By: Joao Pinto Às 10:32 AM de 12/7/2016, Srinivas Kandagatla escreveu: > This patch add support to return value from host_init() callback from drivers, > so that the designware libary can handle or pass it to proper place. Issue > with >

Re: [RFC PATCH] PCI: designware: add host_init() error handling

Às 11:51 AM de 12/2/2016, Srinivas Kandagatla escreveu: > > > On 02/12/16 10:32, Joao Pinto wrote: >> >> Hi Srinivas, >> >> Às 11:51 AM de 12/1/2016, Srinivas Kandagatla escreveu: >>> drivers/pci/host/pci-dra7xx.c | 4 +++- >>

Re: [RFC PATCH] PCI: designware: add host_init() error handling

Às 11:51 AM de 12/2/2016, Srinivas Kandagatla escreveu: > > > On 02/12/16 10:32, Joao Pinto wrote: >> >> Hi Srinivas, >> >> Às 11:51 AM de 12/1/2016, Srinivas Kandagatla escreveu: >>> drivers/pci/host/pci-dra7xx.c | 4 +++- >>

Re: [RFC PATCH] PCI: designware: add host_init() error handling

Hi Srinivas, Às 11:51 AM de 12/1/2016, Srinivas Kandagatla escreveu: > drivers/pci/host/pci-dra7xx.c | 4 +++- > drivers/pci/host/pci-exynos.c | 4 +++- > drivers/pci/host/pci-imx6.c | 4 +++- > drivers/pci/host/pci-keystone.c | 4 +++- >

Re: [RFC PATCH] PCI: designware: add host_init() error handling

Hi Srinivas, Às 11:51 AM de 12/1/2016, Srinivas Kandagatla escreveu: > drivers/pci/host/pci-dra7xx.c | 4 +++- > drivers/pci/host/pci-exynos.c | 4 +++- > drivers/pci/host/pci-imx6.c | 4 +++- > drivers/pci/host/pci-keystone.c | 4 +++- >

Re: Synopsys Ethernet QoS Driver

On 23-11-2016 11:41, Lars Persson wrote: > >> 23 nov. 2016 kl. 12:11 skrev Joao Pinto <joao.pi...@synopsys.com>: >> >> Hi Peppe and Lars, >> >>> On 23-11-2016 10:59, Giuseppe CAVALLARO wrote: >>> Hello Joao, Lars. >>> >>>

Re: Synopsys Ethernet QoS Driver

On 23-11-2016 11:41, Lars Persson wrote: > >> 23 nov. 2016 kl. 12:11 skrev Joao Pinto : >> >> Hi Peppe and Lars, >> >>> On 23-11-2016 10:59, Giuseppe CAVALLARO wrote: >>> Hello Joao, Lars. >>> >>>> On 11/22/2016 3:16 PM, Joao

Re: Synopsys Ethernet QoS Driver

Hi Peppe and Lars, On 23-11-2016 10:59, Giuseppe CAVALLARO wrote: > Hello Joao, Lars. > > On 11/22/2016 3:16 PM, Joao Pinto wrote: >>> Ok, it makes sense. >>> > Just for curiosity the target setup is the following: >>> > https://www.youtube.com/watc

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