On 3/16/21 2:53 PM, Peter Zijlstra wrote:
> On Tue, Mar 16, 2021 at 04:45:02PM +0100, Jiri Olsa wrote:
>> hi,
>> when running 'perf top' on AMD Rome (/proc/cpuinfo below)
>> with fedora 33 kernel 5.10.22-200.fc33.x86_64
>>
>> we got unknown NMI messages:
>>
>> [ 226.700160] Uhhuh. NMI received
From: Victor Ding
This patch changes the static struct rapl_msr_priv to a pointer to allow
using a different set of of RAPL MSR interface, preparing for supporting
AMD's RAPL MSR interface.
No functional changes.
Signed-off-by: Victor Ding
Acked-by: Kim Phillips
Cc: Victor Ding
Cc
c: linux...@vger.kernel.org
Cc: x...@kernel.org
Kim Phillips (1):
powercap: Add AMD Fam19h RAPL support
Victor Ding (3):
x86/msr-index: sort AMD RAPL MSRs by address
powercap/intel_rapl_msr: Convert rapl_msr_priv into pointer
powercap: Add AMD Fam17h RAPL support
arch/x86/include/asm/msr-inde
/dev/cpu/[x]/msr:
/sys/class/powercap/intel-rapl/intel-rapl:0/energy_uj
/sys/class/powercap/intel-rapl/intel-rapl:0/intel-rapl:0:0/energy_uj
Signed-off-by: Victor Ding
Acked-by: Kim Phillips
Cc: Victor Ding
Cc: Alexander Shishkin
Cc: Borislav Petkov
Cc: Daniel Lezcano
Cc: "H. Peter
AMD Family 19h's RAPL MSRs are identical to Family 17h's. Extend
Family 17h's support to Family 19h.
Signed-off-by: Kim Phillips
Cc: Victor Ding
Cc: Alexander Shishkin
Cc: Borislav Petkov
Cc: Daniel Lezcano
Cc: "H. Peter Anvin"
Cc: Ingo Molnar
Cc: Josh Poimboeuf
Cc: Pawan
From: Victor Ding
MSRs in the rest of this file are sorted by their addresses; fixing the
two outliers.
No functional changes.
Signed-off-by: Victor Ding
Acked-by: Kim Phillips
Cc: Victor Ding
Cc: Alexander Shishkin
Cc: Borislav Petkov
Cc: Daniel Lezcano
Cc: "H. Peter Anvin"
bably fail to add new Topdown events.
>>>
>>> Check if the canceled group has Topdown events. If so, subtract the
>>> TopDown events from n_metric accordingly.
>>>
>>> Fixes: 7b2c05a15d29 ("perf/x86/intel: Generic support for hardware TopDown
>&g
e not being a helpful
> comment.
>
> Reinstate the notrace and add a comment to avoid loosing it again.
>
> Fixes: ff5c4f5cad33 ("rcu/tree: Mark the idle relevant functions noinstr")
> Reported-by: Kim Phillips
> Signed-off-by: Peter Zijlstra (Intel)
> ---
Tested-by: Kim Phillips
Thanks,
Kim
Hi,
On 5/19/20 2:52 PM, tip-bot2 for Thomas Gleixner wrote:
> The following commit has been merged into the core/rcu branch of tip:
>
> Commit-ID: ff5c4f5cad33061b07c3fb9187506783c0f3cb66
> Gitweb:
> https://git.kernel.org/tip/ff5c4f5cad33061b07c3fb9187506783c0f3cb66
> Author:
The following commit has been merged into the perf/core branch of tip:
Commit-ID: 9ed9647dc0671486f9e998b7258f75167a9c4697
Gitweb:
https://git.kernel.org/tip/9ed9647dc0671486f9e998b7258f75167a9c4697
Author:Kim Phillips
AuthorDate:Mon, 21 Sep 2020 09:43:30 -05:00
Committer
The following commit has been merged into the perf/core branch of tip:
Commit-ID: 87a54a1fd525f2af8d82becf583c7e836918cf22
Gitweb:
https://git.kernel.org/tip/87a54a1fd525f2af8d82becf583c7e836918cf22
Author:Kim Phillips
AuthorDate:Mon, 21 Sep 2020 09:43:29 -05:00
Committer
The following commit has been merged into the perf/core branch of tip:
Commit-ID: 8170f386f19ca7120393c957d4bfbdc07f964ab6
Gitweb:
https://git.kernel.org/tip/8170f386f19ca7120393c957d4bfbdc07f964ab6
Author:Kim Phillips
AuthorDate:Mon, 21 Sep 2020 09:43:28 -05:00
Committer
The following commit has been merged into the perf/core branch of tip:
Commit-ID: 06f2c24584f31bc16129643bfb8239a1af82a17f
Gitweb:
https://git.kernel.org/tip/06f2c24584f31bc16129643bfb8239a1af82a17f
Author:Kim Phillips
AuthorDate:Mon, 21 Sep 2020 09:43:27 -05:00
Committer
re: AMD NB counters detected
amd_uncore: AMD LLC counters detected
F17h dmesg AFTER:
amd_uncore: 4 amd_df counters detected
amd_uncore: 6 amd_l3 counters detected
Signed-off-by: Kim Phillips
Cc: Alexander Shishkin
Cc: Arnaldo Carvalho de Melo
Cc: Borislav Petkov
Cc: "H. Peter Anvin"
Cc: "H. Peter Anvin"
Cc: Ingo Molnar
Cc: Jiri Olsa
Cc: Mark Rutland
Cc: Michael Petlan
Cc: Namhyung Kim
Cc: Peter Zijlstra
Cc: Stephane Eranian
Cc: Thomas Gleixner
Cc: x...@kernel.org
Cc: linux-kernel@vger.kernel.org
Kim Phillips (4):
perf/amd/uncore: Prepare to scal
invocation to measure L3 accesses (event 4, umask 0xff)
by the first thread (id 0 -> mask 0x1) of the first core (id 0) on the
first slice (id 0):
perf stat -a -e
instructions,amd_l3/umask=0xff,event=0x4,coreid=0,threadmask=1,sliceid=0,enallcores=0,enallslices=0/
Signed-off-by: Kim Phillips
Continue to fully populate either one of threadmask or slicemask if the
user doesn't.
Signed-off-by: Kim Phillips
Cc: Alexander Shishkin
Cc: Arnaldo Carvalho de Melo
Cc: Borislav Petkov
Cc: "H. Peter Anvin"
Cc: Ingo Molnar
Cc: Jiri Olsa
Cc: Mark Rutland
Cc: Michael Petlan
Cc
_df/format/umask:config:8-15
Signed-off-by: Kim Phillips
Cc: Alexander Shishkin
Cc: Arnaldo Carvalho de Melo
Cc: Borislav Petkov
Cc: "H. Peter Anvin"
Cc: Ingo Molnar
Cc: Jiri Olsa
Cc: Mark Rutland
Cc: Michael Petlan
Cc: Namhyung Kim
Cc: Peter Zijlstra
Cc: Stephane Eranian
Cc: Th
urns
>
> Acked-by: Namhyung Kim
Acked-by: Kim Phillips
Thanks,
Kim
The following commit has been merged into the perf/core branch of tip:
Commit-ID: 36e1be8ada994d509538b3b1d0af8b63c351e729
Gitweb:
https://git.kernel.org/tip/36e1be8ada994d509538b3b1d0af8b63c351e729
Author:Kim Phillips
AuthorDate:Tue, 08 Sep 2020 16:47:38 -05:00
Committer
The following commit has been merged into the perf/core branch of tip:
Commit-ID: 8b0bed7d410f48499d72af2e2bcd890daad94e0d
Gitweb:
https://git.kernel.org/tip/8b0bed7d410f48499d72af2e2bcd890daad94e0d
Author:Kim Phillips
AuthorDate:Tue, 08 Sep 2020 16:47:39 -05:00
Committer
The following commit has been merged into the perf/core branch of tip:
Commit-ID: a77259bdcb62a2c345914df659a1fbc421269a8b
Gitweb:
https://git.kernel.org/tip/a77259bdcb62a2c345914df659a1fbc421269a8b
Author:Kim Phillips
AuthorDate:Tue, 08 Sep 2020 16:47:40 -05:00
Committer
The following commit has been merged into the perf/core branch of tip:
Commit-ID: 680d69635005ba0e58fe3f4c52fc162b8fc743b0
Gitweb:
https://git.kernel.org/tip/680d69635005ba0e58fe3f4c52fc162b8fc743b0
Author:Kim Phillips
AuthorDate:Tue, 08 Sep 2020 16:47:37 -05:00
Committer
The following commit has been merged into the perf/core branch of tip:
Commit-ID: 221bfce5ebbdf72ff08b3bf2510ae81058ee568b
Gitweb:
https://git.kernel.org/tip/221bfce5ebbdf72ff08b3bf2510ae81058ee568b
Author:Kim Phillips
AuthorDate:Tue, 08 Sep 2020 16:47:36 -05:00
Committer
The following commit has been merged into the perf/core branch of tip:
Commit-ID: 26e52558ead4b39c0e0fe7bf08f82f5a9777a412
Gitweb:
https://git.kernel.org/tip/26e52558ead4b39c0e0fe7bf08f82f5a9777a412
Author:Kim Phillips
AuthorDate:Tue, 08 Sep 2020 16:47:35 -05:00
Committer
The following commit has been merged into the perf/core branch of tip:
Commit-ID: c8fe99d0701fec9fb849ec880a86bc5592530496
Gitweb:
https://git.kernel.org/tip/c8fe99d0701fec9fb849ec880a86bc5592530496
Author:Kim Phillips
AuthorDate:Tue, 08 Sep 2020 16:47:34 -05:00
Committer
On 9/10/20 3:50 AM, pet...@infradead.org wrote:
> On Thu, Sep 10, 2020 at 10:32:23AM +0200, pet...@infradead.org wrote:
>>> @@ -363,7 +363,14 @@ perf_ibs_event_update(struct perf_ibs *perf_ibs,
>>> struct perf_event *event,
>>> static inline void perf_ibs_enable_event(struct perf_ibs *perf_ibs,
Family 19h RAPL support did not change from Family 17h; extend
the existing Fam17h support to work on Family 19h too.
Signed-off-by: Kim Phillips
Cc: Stephane Eranian
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Ingo Molnar
Cc: Thomas Gleixner
Cc: Borislav Petkov
Cc: Alexander Shishkin
Cc
the period is over
1,048,560 (0x0), which would previously activate the driver's
software counter. That threshold is now 134,217,712 (0x7f0).
Signed-off-by: Kim Phillips
Cc: Stephane Eranian
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Ingo Molnar
Cc: Thomas Gleixner
Cc: Borislav Petkov
Cc
see any perf driver version information
being included in perf.data file headers, but, existing users can detect
whether the size of the sample record has reduced by 8 bytes to
determine whether the IBS driver has this fix.
Reported-by: Stephane Eranian
Signed-off-by: Kim Phillips
Fixes
by hardware.
Don't include those bits in the driver's event count.
Signed-off-by: Kim Phillips
Fixes: 8b1e13638d46 ("perf/x86-ibs: Fix usage of IBS op current count")
Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537
Cc: Stephane Eranian
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Ingo
unter to 0 and IBS
Fetch starts counting again.
A family 15h machine tested does not have this problem, and the extra
wrmsr is also not needed on Family 19h, so only do the extra wrmsr on
families 16h through 18h.
Reported-by: Stephane Eranian
Signed-off-by: Kim Phillips
Link: https://bugzilla.
lue to the even counter. Reading the
even counter of the merged counter pair returns the full 64-bit value."
Fixes: 5738891229a2 ("perf/x86/amd: Add support for Large Increment per Cycle
Events")
Signed-off-by: Kim Phillips
Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537
C
354,891 l3_request_g1.caching_l3_cache_accesses
CPU40 1,780,870 l3_request_g1.caching_l3_cache_accesses
CPU44315,062 l3_request_g1.caching_l3_cache_accesses
...
Signed-off-by: Kim Phillips
Fixes: 2f217d58a8a0 ("perf/x86/amd/uncore: Set the thread m
Gleixner
Cc: Borislav Petkov
Cc: Alexander Shishkin
Cc: Arnaldo Carvalho de Melo
Cc: "H. Peter Anvin"
Cc: Jiri Olsa
Cc: Mark Rutland
Cc: Michael Petlan
Cc: Namhyung Kim
Cc: LKML
Cc: x86
Kim Phillips (7):
perf/amd/uncore: Set all slices and threads to restore perf stat -a
On 9/3/20 1:19 AM, Ian Rogers wrote:
> On Tue, Sep 1, 2020 at 3:10 PM Kim Phillips wrote:
>> The nps1_die_to_dram event may need perf stat's --metric-no-group
>> switch if the number of available data fabric counters is less
>> than the number it uses (8).
>
>
This enables zen3 users by reusing mostly-compatible zen2 events
until the official public list of zen3 events is published in a
future PPR.
Signed-off-by: Kim Phillips
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Arnaldo Carvalho de Melo
Cc: Mark Rutland
Cc: Alexander Shishkin
Cc: Jiri Olsa
Cc
The nps1_die_to_dram event may need perf stat's --metric-no-group
switch if the number of available data fabric counters is less
than the number it uses (8).
Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537
Signed-off-by: Kim Phillips
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Arnaldo Carval
But e.g., are included in this 2019 version of the PPR:
Processor Programming Reference (PPR) for AMD Family 17h Model 18h, Revision B1
Processors Rev. 3.14 - Sep 26, 2019
Signed-off-by: Kim Phillips
Fixes: 98c07a8f74f8 ("perf vendor events amd: perf PMU events for AMD Family
17h")
L
211,318 cpu/event=0x94,umask=0xff/u
Rome/zen2:
zen2$ perf stat -e cpu/event=0x94/,cpu/event=0x94,umask=0xff/ sleep 1
Performance counter stats for 'sleep 1':
0 cpu/event=0x94/u
190,744 cpu/event=0x94,umask=0xff/u
Signed-off-by: Kim Phillips
Cc
Event modifiers are not mentioned in the perf record or perf stat
manpages. Add them to orient new users more effectively by pointing
them to the perf list manpage for details.
Signed-off-by: Kim Phillips
Fixes: 2055fdaf8703 ("perf list: Document precise event sampling for AMD IBS")
at the bottom of the page at
amd.com->processors->servers->epyc->2nd-gen-epyc, i.e., the EPYC 7H12.
Signed-off-by: Kim Phillips
Cc: Len Brown
Cc: Len Brown
Cc: linux...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
tools/power/x86/turbostat/turb
AMD Family 19h's RAPL MSRs are identical to Family 17h's. Extend
Family 17h's support to Family 19h.
Signed-off-by: Kim Phillips
Cc: "Rafael J. Wysocki"
Cc: Victor Ding
Cc: LKML
Cc: linux...@vger.kernel.org
Cc: x...@kernel.org
---
Depends on Victor Ding's "powercap: Enab
lues directly read from corresponding MSRs via /dev/cpu/[x]/msr:
> /sys/class/powercap/intel-rapl/intel-rapl:0/energy_uj
> /sys/class/powercap/intel-rapl/intel-rapl:0/intel-rapl:0:0/energy_uj
>
> Signed-off-by: Victor Ding
> ---
For the series:
Acked-by: Kim Phillips
Thanks,
Kim
Family 19h RAPL support did not change from Family 17h; extend
the existing Fam17h support to work on Family 19h too.
Signed-off-by: Kim Phillips
Cc: Stephane Eranian
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Ingo Molnar
Cc: Thomas Gleixner
Cc: Borislav Petkov
Cc: Alexander Shishkin
Cc
the period is over
1,048,560 (0x0), which would previously activate the driver's
software counter. That threshold is now 134,217,712 (0x7f0).
Signed-off-by: Kim Phillips
Cc: Stephane Eranian
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Ingo Molnar
Cc: Thomas Gleixner
Cc: Borislav Petkov
Cc
unter to 0 and IBS
Fetch starts counting again.
It is not clear what versions of IBS hardware need IbsFetchEn explicitly
zeroed and which historically may not have, so now make the driver
always do it.
Reported-by: Stephane Eranian
Signed-off-by: Kim Phillips
Link: https://bugzilla.kernel.org/sh
lue to the even counter. Reading the
even counter of the merged counter pair returns the full 64-bit value."
Fixes: 5738891229a2 ("perf/x86/amd: Add support for Large Increment per Cycle
Events")
Signed-off-by: Kim Phillips
Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537
C
by hardware.
Don't include those bits in the driver's event count.
Signed-off-by: Kim Phillips
Fixes: 8b1e13638d46 ("perf/x86-ibs: Fix usage of IBS op current count")
Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537
Cc: Stephane Eranian
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Ingo
any perf driver version information
being included in perf.data file headers, but, existing users can detect
whether the size of the sample record has reduced by 8 bytes to
determine whether the IBS driver has this fix.
Reported-by: Stephane Eranian
Signed-off-by: Kim Phillips
Fixes: 904cb3677f3a
354,891 l3_request_g1.caching_l3_cache_accesses
CPU40 1,780,870 l3_request_g1.caching_l3_cache_accesses
CPU44315,062 l3_request_g1.caching_l3_cache_accesses
...
Reported-by: Stephane Eranian
Signed-off-by: Kim Phillips
Fixes: 2f217d58a8a0 ("perf
On 7/14/20 4:02 PM, Lee Jones wrote:
> On Tue, 14 Jul 2020, Kim Phillips wrote:
>> On 7/14/20 9:50 AM, Lee Jones wrote:
>>> Can't see them being used anywhere and the compiler doesn't complain
>>> that they're missing, so ...
>>>
>>> F
On 7/14/20 9:50 AM, Lee Jones wrote:
> Can't see them being used anywhere and the compiler doesn't complain
> that they're missing, so ...
>
> Fixes the following W=1 kernel build warning(s):
>
> drivers/cpufreq/amd_freq_sensitivity.c:147:32: warning:
> ‘amd_freq_sensitivity_ids’ defined but
phane Eranian
>
> ---
Tested-by: Kim Phillips
Thanks,
Kim
The following commit has been merged into the x86/cpu branch of tip:
Commit-ID: e2abfc0448a46d8a137505aa180caf14070ec535
Gitweb:
https://git.kernel.org/tip/e2abfc0448a46d8a137505aa180caf14070ec535
Author:Kim Phillips
AuthorDate:Fri, 17 Apr 2020 09:33:56 -05:00
Committer
The following commit has been merged into the x86/cpu branch of tip:
Commit-ID: 3e2c1fd2022ccce96b6a05a6ab519d65769ee320
Gitweb:
https://git.kernel.org/tip/3e2c1fd2022ccce96b6a05a6ab519d65769ee320
Author:Kim Phillips
AuthorDate:Fri, 17 Apr 2020 09:33:56 -05:00
Committer
the count mask for IBS Op implementations
that have read & writeable current count (CurCnt) fields in addition
to the MaxCnt field. These bits were reserved on prior
implementations, and therefore shouldn't have negative impact.
Signed-off-by: Kim Phillips
Fixes: c9574fe0bdb9 ("perf/x86-ibs:
in memory.
Signed-off-by: Kim Phillips
Fixes: d47e8238cd76 ("perf/x86-ibs: Take instruction pointer from ibs sample")
Cc: sta...@vger.kernel.org
Cc: Stephane Eranian
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Arnaldo Carvalho de Melo
Cc: Alexander Shishkin
Cc: Jiri Olsa
Cc: Namhyung Kim
:
$ perf list metrics
List of pre-defined events (to be used with -e):
Metrics (to be used with -M):
C2_Pkg_Residency
[C2 residency percent per package]
...
Signed-off-by: Kim Phillips
Cc: Janakarajan Natarajan
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Arnaldo Carvalho de Melo
Cc
Remove the redundant '['.
perf list output before:
ex_ret_brn
[[Retired Branch Instructions]
perf list output after:
ex_ret_brn
[Retired Branch Instructions]
Signed-off-by: Kim Phillips
Cc: Janakarajan Natarajan
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Arnaldo Carvalho de
Some grammatical fixes, and updates to some path references that have
since changed.
Signed-off-by: Kim Phillips
Cc: Janakarajan Natarajan
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Arnaldo Carvalho de Melo
Cc: Alexander Shishkin
Cc: Andi Kleen
Cc: Jiri Olsa
Cc: Namhyung Kim
Cc: Borislav
of pre-defined events (to be used in -e):
Metrics:
IPC
[Instructions Per Cycle (per logical thread)]
UPI
[Uops Per Instruction]
Signed-off-by: Kim Phillips
Cc: Janakarajan Natarajan
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Arnaldo Carvalho de Melo
Cc: Alexander Shishkin
Cc
-l 100 -f default
...
7,006,831 l3_request_g1.caching_l3_cache_accesses
7,006,830 amd_l3/event=0x01,umask=0x80/
366,530 l3_comb_clstr_state.request_miss
366,568 amd_l3/event=0x06,umask=0x01/
Signed-off-by: Kim Phillips
Cc: Janakarajan Nat
The following commit has been merged into the perf/urgent branch of tip:
Commit-ID: 0f4cd769c410e2285a4e9873a684d90423f03090
Gitweb:
https://git.kernel.org/tip/0f4cd769c410e2285a4e9873a684d90423f03090
Author:Kim Phillips
AuthorDate:Mon, 26 Aug 2019 14:57:30 -05:00
00,000,000 cpu/event=0x03,umask=0xff/u
0.041359898 seconds time elapsed
0.04120 seconds user
0.0 seconds sys
Fixes: e40ed1542dd7 ("perf/x86: Add perf support for AMD family-17h processors")
Signed-off-by: Kim Phillips
Cc: Janakarajan Natarajan
Cc: Sur
commit db98c5faf8cb ("perf/x86: Implement 64-bit
counter support for IBS") ignored the lower 4 bits of the IbsOpCurCnt
field; the number of preloaded random bits has always been 7, AFAICT.
Signed-off-by: Kim Phillips
Cc: Stephane Eranian
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Arnald
Commit-ID: 16f4641166b10e199f0d7b68c2c5f004fef0bda3
Gitweb: https://git.kernel.org/tip/16f4641166b10e199f0d7b68c2c5f004fef0bda3
Author: Kim Phillips
AuthorDate: Fri, 28 Jun 2019 21:59:20 +
Committer: Ingo Molnar
CommitDate: Sat, 13 Jul 2019 11:21:26 +0200
perf/x86/amd/uncore: Do
Commit-ID: 2f217d58a8a086d3399fecce39fb358848e799c4
Gitweb: https://git.kernel.org/tip/2f217d58a8a086d3399fecce39fb358848e799c4
Author: Kim Phillips
AuthorDate: Fri, 28 Jun 2019 21:59:33 +
Committer: Ingo Molnar
CommitDate: Sat, 13 Jul 2019 11:21:27 +0200
perf/x86/amd/uncore: Set
Hi Boris,
I've tested this patch and it gets rid of a slew of these messages:
kernel: EDAC amd64: Error: F0 not found, device 0x1460 (broken BIOS?)
kernel: EDAC amd64: Error: Error probing instance: 0
So please add my:
Tested-by: Kim Phillips
Thank you,
Kim
On 3/21/19 3:30 PM, Ghannam
On 1/17/19 2:13 AM, Benjamin Tissoires wrote:
On Wed, Jan 16, 2019 at 5:59 AM Kim Phillips wrote:
On 1/15/19 2:57 AM, Benjamin Tissoires wrote:
On Mon, Jan 14, 2019 at 7:40 PM Dmitry Torokhov
wrote:
On Sat, Jan 12, 2019 at 04:04:36PM -0600, Kim Phillips wrote:
On 1/11/19 7:40 PM, Dmitry
On 1/15/19 2:57 AM, Benjamin Tissoires wrote:
On Mon, Jan 14, 2019 at 7:40 PM Dmitry Torokhov
wrote:
On Sat, Jan 12, 2019 at 04:04:36PM -0600, Kim Phillips wrote:
On 1/11/19 7:40 PM, Dmitry Torokhov wrote:
Hi Kim,
Hi Dmitry,
On Fri, Jan 11, 2019 at 02:54:30PM -0600, Kim Phillips wrote
On 1/11/19 7:40 PM, Dmitry Torokhov wrote:
> Hi Kim,
Hi Dmitry,
> On Fri, Jan 11, 2019 at 02:54:30PM -0600, Kim Phillips wrote:
>> This patch is the result of seeing this message:
>>
>> psmouse serio1: synaptics: Your touchpad (PNP: DLL087c PNP0f13) says it can
&g
t can support a different bus".
E.g, this is one such instance:
https://lkml.org/lkml/2018/2/15/52
Cc: Paul Menzel
Cc: Dmitry Torokhov
Cc: Benjamin Tissoires
Cc: linux-in...@vger.kernel.org
Signed-off-by: Kim Phillips
---
With or without this patch, I'm seeing a problem where when the XP
Commit-ID: 58094c48f4079cfc784f53a73caaa446db436389
Gitweb: https://git.kernel.org/tip/58094c48f4079cfc784f53a73caaa446db436389
Author: Kim Phillips
AuthorDate: Mon, 27 Aug 2018 15:08:07 -0500
Committer: Arnaldo Carvalho de Melo
CommitDate: Thu, 30 Aug 2018 15:52:25 -0300
perf
Commit-ID: 58094c48f4079cfc784f53a73caaa446db436389
Gitweb: https://git.kernel.org/tip/58094c48f4079cfc784f53a73caaa446db436389
Author: Kim Phillips
AuthorDate: Mon, 27 Aug 2018 15:08:07 -0500
Committer: Arnaldo Carvalho de Melo
CommitDate: Thu, 30 Aug 2018 15:52:25 -0300
perf
Commit-ID: 4e67b2a5df5d3f341776d12ee575e00ca3ef92de
Gitweb: https://git.kernel.org/tip/4e67b2a5df5d3f341776d12ee575e00ca3ef92de
Author: Kim Phillips
AuthorDate: Mon, 27 Aug 2018 12:53:40 -0500
Committer: Arnaldo Carvalho de Melo
CommitDate: Thu, 30 Aug 2018 15:51:54 -0300
perf
Commit-ID: 4e67b2a5df5d3f341776d12ee575e00ca3ef92de
Gitweb: https://git.kernel.org/tip/4e67b2a5df5d3f341776d12ee575e00ca3ef92de
Author: Kim Phillips
AuthorDate: Mon, 27 Aug 2018 12:53:40 -0500
Committer: Arnaldo Carvalho de Melo
CommitDate: Thu, 30 Aug 2018 15:51:54 -0300
perf
Commit-ID: 5ab1de932e2923f490645ad017a689c5b58dc433
Gitweb: https://git.kernel.org/tip/5ab1de932e2923f490645ad017a689c5b58dc433
Author: Kim Phillips
AuthorDate: Mon, 6 Aug 2018 17:28:00 -0500
Committer: Arnaldo Carvalho de Melo
CommitDate: Thu, 30 Aug 2018 14:49:24 -0300
perf arm64
Commit-ID: 5ab1de932e2923f490645ad017a689c5b58dc433
Gitweb: https://git.kernel.org/tip/5ab1de932e2923f490645ad017a689c5b58dc433
Author: Kim Phillips
AuthorDate: Mon, 6 Aug 2018 17:28:00 -0500
Committer: Arnaldo Carvalho de Melo
CommitDate: Thu, 30 Aug 2018 14:49:24 -0300
perf arm64
On Mon, 3 Sep 2018 09:22:47 -0700
Andi Kleen wrote:
> Fix ETM build failure
> ---
> diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c
> index 2ae640257fdb..0296405f38b2 100644
> --- a/tools/perf/util/cs-etm.c
> +++ b/tools/perf/util/cs-etm.c
> @@ -1432,7 +1432,8 @@ int
On Mon, 3 Sep 2018 09:22:47 -0700
Andi Kleen wrote:
> Fix ETM build failure
> ---
> diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c
> index 2ae640257fdb..0296405f38b2 100644
> --- a/tools/perf/util/cs-etm.c
> +++ b/tools/perf/util/cs-etm.c
> @@ -1432,7 +1432,8 @@ int
On Fri, 31 Aug 2018 15:01:56 -0700
Andi Kleen wrote:
> Also available in
> git://git.kernel.org/pub/scm/linux/kernel/git/ak/linux-misc.git
> pt/easy-script-2
>
> v1: Initial post
> v2: Address review comments. Minor fixes to descriptions. Now builds
> everywhere.
OK, I grabbed the
On Fri, 31 Aug 2018 15:01:56 -0700
Andi Kleen wrote:
> Also available in
> git://git.kernel.org/pub/scm/linux/kernel/git/ak/linux-misc.git
> pt/easy-script-2
>
> v1: Initial post
> v2: Address review comments. Minor fixes to descriptions. Now builds
> everywhere.
OK, I grabbed the
ree, for those that
need it.
Meanwhile, the library needs to be fixed with a run-time version
compatibility API ASAP.
Thanks,
Kim
> On 29/08/18 17:32, Kim Phillips wrote:
> > On Wed, 29 Aug 2018 15:34:16 +0100
> > Robert Walker wrote:
> >
> >> Hi Kim,
>
ree, for those that
need it.
Meanwhile, the library needs to be fixed with a run-time version
compatibility API ASAP.
Thanks,
Kim
> On 29/08/18 17:32, Kim Phillips wrote:
> > On Wed, 29 Aug 2018 15:34:16 +0100
> > Robert Walker wrote:
> >
> >> Hi Kim,
>
On Wed, 29 Aug 2018 15:34:16 +0100
Robert Walker wrote:
> Hi Kim,
Hi Robert,
> On 29/08/18 14:49, Kim Phillips wrote:
> > On Wed, 29 Aug 2018 10:44:23 +0100
> > Robert Walker wrote:
> >
> >> This patch adds support for generating instruction samples from tra
On Wed, 29 Aug 2018 15:34:16 +0100
Robert Walker wrote:
> Hi Kim,
Hi Robert,
> On 29/08/18 14:49, Kim Phillips wrote:
> > On Wed, 29 Aug 2018 10:44:23 +0100
> > Robert Walker wrote:
> >
> >> This patch adds support for generating instruction samples from tra
On Wed, 29 Aug 2018 10:44:23 +0100
Robert Walker wrote:
> This patch adds support for generating instruction samples from trace of
> AArch32 programs using the A32 and T32 instruction sets.
>
> T32 has variable 2 or 4 byte instruction size, so the conversion between
> addresses and instruction
On Wed, 29 Aug 2018 10:44:23 +0100
Robert Walker wrote:
> This patch adds support for generating instruction samples from trace of
> AArch32 programs using the A32 and T32 instruction sets.
>
> T32 has variable 2 or 4 byte instruction size, so the conversion between
> addresses and instruction
On Tue, 28 Aug 2018 18:44:57 +0300
Alexey Budankov wrote:
> Experiment with profiling matrix multiplication code executing 128
> threads on Intel Xeon Phi (KNM) with 272 cores, like below,
> demonstrates data loss metrics value of 98%:
So I took these two patches for a quick test-drive on
On Tue, 28 Aug 2018 18:44:57 +0300
Alexey Budankov wrote:
> Experiment with profiling matrix multiplication code executing 128
> threads on Intel Xeon Phi (KNM) with 272 cores, like below,
> demonstrates data loss metrics value of 98%:
So I took these two patches for a quick test-drive on
Signed-off-by: Kim Phillips
---
tools/perf/arch/arm64/annotate/instructions.c | 59 ++-
tools/perf/arch/s390/annotate/instructions.c | 2 -
2 files changed, 58 insertions(+), 3 deletions(-)
diff --git a/tools/perf/arch/arm64/annotate/instructions.c
b/tools/perf/arch/arm64/an
Signed-off-by: Kim Phillips
---
tools/perf/arch/arm64/annotate/instructions.c | 59 ++-
tools/perf/arch/s390/annotate/instructions.c | 2 -
2 files changed, 58 insertions(+), 3 deletions(-)
diff --git a/tools/perf/arch/arm64/annotate/instructions.c
b/tools/perf/arch/arm64/an
Carvalho de Melo
Cc: Alexander Shishkin
Cc: Jiri Olsa
Cc: Namhyung Kim
Fixes: b13bbeee5ee6 ("perf annotate: Fix branch instruction with multiple
operands")
Signed-off-by: Kim Phillips
---
v2: address acme's comments:
- consolidate into a validate_comma()
- call from an additio
Carvalho de Melo
Cc: Alexander Shishkin
Cc: Jiri Olsa
Cc: Namhyung Kim
Fixes: b13bbeee5ee6 ("perf annotate: Fix branch instruction with multiple
operands")
Signed-off-by: Kim Phillips
---
v2: address acme's comments:
- consolidate into a validate_comma()
- call from an additio
On Fri, 24 Aug 2018 09:59:22 +0200
Thomas-Mich Richter wrote:
> On 08/24/2018 02:10 AM, Kim Phillips wrote:
> > Tested no difference in output for sample x86_64, power arch perf.data
> > files.
>
> Tested, no difference in output on s390. Just to let you know.
Thanks
On Fri, 24 Aug 2018 09:59:22 +0200
Thomas-Mich Richter wrote:
> On 08/24/2018 02:10 AM, Kim Phillips wrote:
> > Tested no difference in output for sample x86_64, power arch perf.data
> > files.
>
> Tested, no difference in output on s390. Just to let you know.
Thanks
Carvalho de Melo
Cc: Alexander Shishkin
Cc: Jiri Olsa
Cc: Namhyung Kim
Fixes: b13bbeee5ee6 ("perf annotate: Fix branch instruction with multiple
operands")
Signed-off-by: Kim Phillips
---
tools/perf/util/annotate.c | 17 -
tools/perf/util/annotate.h | 1 +
2 files c
Carvalho de Melo
Cc: Alexander Shishkin
Cc: Jiri Olsa
Cc: Namhyung Kim
Fixes: b13bbeee5ee6 ("perf annotate: Fix branch instruction with multiple
operands")
Signed-off-by: Kim Phillips
---
tools/perf/util/annotate.c | 17 -
tools/perf/util/annotate.h | 1 +
2 files c
arse only address.
>
> Signed-off-by: Martin Liška
> ---
Tested this doesn't incur any grievances parsing aarch64 code:
Tested-by: Kim Phillips
Thanks,
Kim
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