hwork.kernel.org/project/linux-mediatek/patch/20210409015651.11474-1-mason.zh...@mediatek.com/
Please gentle ping on this patch. Thanks~
Thanks
Mason
This patch add address-cells && size-cells in spi node based on patch v1.
Signed-off-by: Mason Zhang
---
arch/arm64/boot/dts/mediatek/mt6779.dtsi | 112 +++
1 file changed, 112 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt6779.dtsi
b/arch/arm64/
in this link and this patch has been merged:
https://patchwork.kernel.org/project/linux-mediatek/patch/20210226110109.30500-1-mason.zh...@mediatek.com/
so, Please gentle ping on patch 1/2. Thank you~
Thanks
Mason
Hi Mark Brown and Rob Herring:
Gentle ping on this patch.
Thanks
Mason
On Fri, 2021-02-26 at 18:59 +0800, Mason Zhang wrote:
> this patch add spi master dts node for mt6779 SOC.
>
> Signed-off-by: Mason Zhang
> ---
> arch/arm64/boot/dts/mediatek/m
On Fri, 2021-02-26 at 18:59 +0800, Mason Zhang wrote:
> this patch add spi master dts node for mt6779 SOC.
>
> Signed-off-by: Mason Zhang
> ---
> arch/arm64/boot/dts/mediatek/mt6779.dtsi | 96
> 1 file changed, 96 insertions(+)
>
> diff --g
Dear Mark:
Patch 1/2 is in this link:
lkml.org/lkml/2021/2/26/325
I will email you later about patch 1/2.
Thank you for your suggestion!
Thanks
Mason
-
On Fri, 2021-02-26 at 17:07 +, Mark Brown wrote:
> On Fri, Feb 26, 2021 at 07
this patch update spi document for MT6779 SOC.
Signed-off-by: Mason Zhang
---
Documentation/devicetree/bindings/spi/spi-mt65xx.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
this patch add spi master dts node for mt6779 SOC.
Signed-off-by: Mason Zhang
---
arch/arm64/boot/dts/mediatek/mt6779.dtsi | 96
1 file changed, 96 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt6779.dtsi
b/arch/arm64/boot/dts/mediatek/mt6779.dtsi
index
this patch update spi document for MT6779 SOC.
Signed-off-by: Mason Zhang
---
Documentation/devicetree/bindings/spi/spi-mt65xx.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
this patch add spi master dts node for mt6779 SOC.
Signed-off-by: Mason Zhang
---
arch/arm64/boot/dts/mediatek/mt6779.dtsi | 96
1 file changed, 96 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt6779.dtsi
b/arch/arm64/boot/dts/mediatek/mt6779.dtsi
index
From: mtk22786
this patch update spi document for MT6779 SOC.
Signed-off-by: Mason Zhang
---
Documentation/devicetree/bindings/spi/spi-mt65xx.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
b/Documentation/devicetree/bindings/spi
From: Mason Zhang
This patch adds spi dts nodes for mt6779 IC.
Signed-off-by: Mason Zhang
---
arch/arm64/boot/dts/mediatek/mt6779.dtsi | 96
1 file changed, 96 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt6779.dtsi
b/arch/arm64/boot/dts/mediatek/mt6779
This patch adds support spi to MT6779 SOC
Signed-off-by: Mason Zhang
---
arch/arm64/boot/dts/mediatek/mt6779.dtsi | 96
1 file changed, 96 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt6779.dtsi
b/arch/arm64/boot/dts/mediatek/mt6779.dtsi
index 370f309d32de
This patch adds support spi to MT6779 SOC
Signed-off-by: Mason Zhang
---
arch/arm64/boot/dts/mediatek/mt6779.dtsi | 96
1 file changed, 96 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt6779.dtsi
b/arch/arm64/boot/dts/mediatek/mt6779.dtsi
index 370f309d32de
This patch adds support spi to MT6779 SOC
Signed-off-by: Mason Zhang
---
arch/arm64/boot/dts/mediatek/mt6779.dtsi | 96
1 file changed, 96 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt6779.dtsi
b/arch/arm64/boot/dts/mediatek/mt6779.dtsi
index 370f309d32de
This patch adds support spi to MT6779 SOC
Signed-off-by: Mason Zhang
---
arch/arm64/boot/dts/mediatek/mt6779.dtsi | 96
1 file changed, 96 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt6779.dtsi
b/arch/arm64/boot/dts/mediatek/mt6779.dtsi
index 370f309d32de
this patch add spi host dts nodes for mt6779 IC.
Change-Id: If4a3cbb09843f472210b390352db4b9886f5c00c
Signed-off-by: Mason Zhang
---
arch/arm64/boot/dts/mediatek/mt6779.dtsi | 96
1 file changed, 96 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt6779.dtsi
b
From: mtk22786
this patch add spi host dts nodes for mt6779 IC.
Change-Id: If4a3cbb09843f472210b390352db4b9886f5c00c
Signed-off-by: Mason Zhang
---
arch/arm64/boot/dts/mediatek/mt6779.dtsi | 96
1 file changed, 96 insertions(+)
diff --git a/arch/arm64/boot/dts
This patch adds support spi to MT6779 SOC
This patch adds spi host nodes for MT6779 SOC
On Mon, Jan 4, 2021 at 3:31 AM Dan Carpenter wrote:
>
> On Sun, Dec 27, 2020 at 09:38:23AM -0800, Linus Torvalds wrote:
> > On Sun, Dec 27, 2020 at 6:16 AM Jon Mason wrote:
> > >
> > > Wang Qing (1):
> > > ntb: idt: fix error check in ntb_hw_idt.c
>
Hello Linus,
Here are a few NTB bug fixes for v5.11. Please consider pulling them.
Thanks,
Jon
The following changes since commit 3650b228f83adda7e5ee532e2b90429c03f7b9ec:
Linux 5.10-rc1 (2020-10-25 15:14:11 -0700)
are available in the Git repository at:
git://github.com/jonmason/ntb
On Tue, Nov 10, 2020 at 09:33:40PM +0300, Serge Semin wrote:
> Hello Wang
>
> On Fri, Nov 06, 2020 at 05:43:31PM +0800, Wang Qing wrote:
> > idt_create_dev never return NULL and fix smatch warning.
>
> Thanks for submitting this. For the both changes
> Acked-by: Serge Semin
Applied to the ntb
On 10 Nov 2020, at 13:39, Christoph Hellwig wrote:
On Mon, Nov 09, 2020 at 02:01:41PM -0500, Chris Mason wrote:
You do consistently ask for a shim layer, but you haven???t explained
what
we gain by diverging from the documented and tested API of the
upstream zstd
project. It???s an important
On 6 Nov 2020, at 13:38, Christoph Hellwig wrote:
You just keep resedning this crap, don't you? Haven't you been told
multiple times to provide a proper kernel API by now?
You do consistently ask for a shim layer, but you haven’t explained
what we gain by diverging from the documented
On 26 Oct 2020, at 12:20, Vincent Guittot wrote:
Le lundi 26 oct. 2020 à 12:04:45 (-0400), Rik van Riel a écrit :
On Mon, 26 Oct 2020 16:42:14 +0100
Vincent Guittot wrote:
On Mon, 26 Oct 2020 at 16:04, Rik van Riel wrote:
Could utilization estimates be off, either lagging or
simply
On 26 Oct 2020, at 11:05, Chris Mason wrote:
On 26 Oct 2020, at 10:24, Vincent Guittot wrote:
Could you try the fix below ?
--- a/kernel/sched/fair.c
+++ b/kernel/sched/fair.c
@@ -9049,7 +9049,8 @@ static inline void calculate_imbalance(struct
lb_env *env, struct sd_lb_stats *s
On 26 Oct 2020, at 10:24, Vincent Guittot wrote:
Le lundi 26 oct. 2020 à 08:45:27 (-0400), Chris Mason a écrit :
On 26 Oct 2020, at 4:39, Vincent Guittot wrote:
Hi Chris
On Sat, 24 Oct 2020 at 01:49, Chris Mason wrote:
Hi everyone,
We’re validating a new kernel in the fleet
On 26 Oct 2020, at 4:39, Vincent Guittot wrote:
Hi Chris
On Sat, 24 Oct 2020 at 01:49, Chris Mason wrote:
Hi everyone,
We’re validating a new kernel in the fleet, and compared with v5.2,
Which version are you using ?
several improvements have been added since v5.5 and the rework
Hello Linus,
Here are a few NTB bug fixes for v5.10. Please consider pulling them.
Thanks,
Jon
The following changes since commit d012a7190fc1fd72ed48911e77ca97ba4521bccd:
Linux 5.9-rc2 (2020-08-23 14:08:43 -0700)
are available in the Git repository at:
git://github.com/jonmason/ntb
()
Our working theory is the load balancing changes are leaving processes
behind busy CPUs instead of moving them onto idle ones. I made a few
schbench modifications to make this easier to demonstrate:
https://git.kernel.org/pub/scm/linux/kernel/git/mason/schbench.git/
My VM has 40 cpus (20
On 2 Oct 2020, at 2:54, Christoph Hellwig wrote:
On Wed, Sep 30, 2020 at 08:05:45PM +, Nick Terrell wrote:
On Sep 29, 2020, at 11:53 PM, Christoph Hellwig
wrote:
As you keep resend this I keep retelling you that should not do it.
Please provide a proper Linux API, and switch to that.
On 17 Sep 2020, at 6:04, Christoph Hellwig wrote:
On Wed, Sep 16, 2020 at 09:35:51PM -0400, Rik van Riel wrote:
One possibility is to have a kernel wrapper on top of the zstd API
to
make it
more ergonomic. I personally don???t really see the value in it,
since
it adds
another layer of
On 16 Sep 2020, at 4:49, Christoph Hellwig wrote:
On Tue, Sep 15, 2020 at 08:42:59PM -0700, Nick Terrell wrote:
From: Nick Terrell
Move away from the compatibility wrapper to the zstd-1.4.6 API. This
code is functionally equivalent.
Again, please use sensible names And no one gives a fuck
On 16 Sep 2020, at 10:46, Christoph Hellwig wrote:
On Wed, Sep 16, 2020 at 10:43:04AM -0400, Chris Mason wrote:
Otherwise we just end up with drift and kernel-specific bugs that are
harder
to debug. To the extent those APIs make us contort the kernel code,
I???m
sure Nick is interested
On 16 Sep 2020, at 10:30, Christoph Hellwig wrote:
On Wed, Sep 16, 2020 at 10:20:52AM -0400, Chris Mason wrote:
It???s not completely clear what you???re asking for here. If the
API
matches what???s in zstd-1.4.6, that seems like a reasonable way to
label
it. That???s what the upstream
On Fri, Jun 19, 2020 at 01:10:55PM -0600, Logan Gunthorpe wrote:
>
>
> On 2020-06-19 11:25 a.m., Gustavo A. R. Silva wrote:
> > Make use of the struct_size() helper instead of an open-coded version
> > in order to avoid any potential type mistakes. Also, remove unnecessary
> > variable
On Tue, Aug 11, 2020 at 09:59:57AM +0800, Kaige Li wrote:
> The related system resources were not released when pci_set_dma_mask(),
> pci_set_consistent_dma_mask(), or pci_iomap() return error in the
> amd_ntb_init_pci() function. Add pci_release_regions() to fix it.
>
> Signed-off-by: Kaige Li
On Mon, Aug 24, 2020 at 07:37:56AM -0700, Dave Jiang wrote:
>
>
> On 8/22/2020 11:55 PM, Dinghao Liu wrote:
> > The default error branch of a series of pdev_is_gen calls
> > should free ndev just like what we've done in these calls.
> >
> > Signed-off-by: Dinghao Liu
>
> Thanks Dinghao
>
_PAGE_RW,
when the next mmap write occurs, we don't need to trigger the
page_mkwrite again.
I don’t know the page migration code well, but you’ll need this one
as well on the 4.4 kernel you mentioned:
commit 25f3c5021985e885292980d04a1423fd83c967bb
Author: Chris Mason
Date: Tue Jan 21 11
On 6 Jul 2020, at 10:06, Laurent Pinchart wrote:
Hi Chris,
On Mon, Jul 06, 2020 at 12:45:34PM +, Chris Mason via
Ksummit-discuss wrote:
On 5 Jul 2020, at 0:55, Willy Tarreau wrote:
Maybe instead of providing an explicit list of a few words it should
simply say that terms that take
On 5 Jul 2020, at 0:55, Willy Tarreau wrote:
> On Sat, Jul 04, 2020 at 01:02:51PM -0700, Dan Williams wrote:
>> +Non-inclusive terminology has that same distracting effect which is
>> why
>> +it is a style issue for Linux, it injures developer efficiency.
>
> I'm personally thinking that for a
On 17 Jun 2020, at 13:20, Filipe Manana wrote:
On Wed, Jun 17, 2020 at 5:32 PM Boris Burkov wrote:
---
fs/btrfs/extent_io.c | 45
1 file changed, 29 insertions(+), 16 deletions(-)
diff --git a/fs/btrfs/extent_io.c b/fs/btrfs/extent_io.c
index
Hello Linus,
Here are a lot of NTB bug fixes and Intel Icelake for v5.8. Please
consider pulling them.
Thanks,
Jon
The following changes since commit 8f3d9f354286745c751374f5f1fcafee6b3f3136:
Linux 5.7-rc1 (2020-04-12 12:35:55 -0700)
are available in the Git repository at:
On Tue, May 26, 2020 at 03:59:43PM +0800, Wesley Sheng wrote:
> The comment for ntb_peer_spad_addr and ntb_peer_spad_read
> incorrectly referred to peer doorbell register and local
> scratchpad register.
>
> Signed-off-by: Wesley Sheng
Pulled into the ntb branch
Thanks,
Jon
> ---
>
On Tue, May 05, 2020 at 11:21:47PM -0500, Sanjay R Mehta wrote:
> v3:
> - Increased ntb_perf command re-try sleep time
> - avoid false dma unmap of dst address.
>
> v2: Incorporated improvements suggested by Logan Gunthorpe
Pulled into the ntb branch.
Thanks,
Jon
>
> Links of the review
Configuration register 2 is to set the device operation condition like
STR or DTR mode at address offset 0 and DQS mode at address offset 0x200.
Each device has various address offset for it's specific operatoin
setting.
Signed-off-by: Mason Yang
---
drivers/mtd/spi-nor/core.c | 78
Driver patch for octal 8D-8D-8D mode support.
Signed-off-by: Mason Yang
---
drivers/spi/spi-mxic.c | 98 +-
1 file changed, 66 insertions(+), 32 deletions(-)
diff --git a/drivers/spi/spi-mxic.c b/drivers/spi/spi-mxic.c
index 69491f3..a9b3817
spi_nor_set_read_settings() in core.h.
Signed-off-by: Mason Yang
---
drivers/mtd/spi-nor/core.c | 2 +-
drivers/mtd/spi-nor/core.h | 16 +++
drivers/mtd/spi-nor/sfdp.c | 106 +
3 files changed, 123 insertions(+), 1 deletion(-)
diff --git
Macronix mx25uw51245g is a SPI NOR that supports 1-1-1/8-8-8 mode.
Correct the dummy cycles to device for various frequencies
after xSPI profile 1.0 table parsed.
Enable mx25uw51245g to Octal DTR mode by executing the command sequences
to change to octal DTR mode.
Signed-off-by: Mason Yang
Execute command sequences to change octal DTR mode.
Signed-off-by: Mason Yang
---
drivers/mtd/spi-nor/core.c | 71 ++
drivers/mtd/spi-nor/core.h | 1 +
2 files changed, 72 insertions(+)
diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor
mp; xSPI profile 1.0 table and enter Octal 8D-8D-8D
mode directly in spi_nor_fixups hooks.
thnaks for your time and review.
best regards,
Mason
Mason Yang (7):
mtd: spi-nor: sfdp: get octal mode maximum speed from BFPT
mtd: spi-nor: sfdp: parse xSPI Profile 1.0 table
mtd: spi-nor: sfdp: parse
A set of simple command sequences is provided which can be executed
directly by the host controller to enable octal DTR mode.
Each command sequence is 8 per byte for single SPI mode.
Signed-off-by: Mason Yang
---
drivers/mtd/spi-nor/core.h | 20 +
drivers/mtd/spi-nor/sfdp.c | 104
Get maximum operation speed of device in octal mode from
BFPT 20th DWORD.
Signed-off-by: Mason Yang
---
drivers/mtd/spi-nor/core.h | 2 ++
drivers/mtd/spi-nor/sfdp.c | 36
drivers/mtd/spi-nor/sfdp.h | 4
3 files changed, 42 insertions(+)
diff --git
Macronix mx25uw51245g is a SPI NOR that supports 1-1-1/8-8-8 mode.
Correct the dummy cycles to device for various frequencies
after xSPI profile 1.0 table parsed.
Enable mx25uw51245g to Octal DTR mode by executing the command sequences
to change to octal DTR mode.
Signed-off-by: Mason Yang
Execute command sequences to change octal DTR mode.
Signed-off-by: Mason Yang
---
drivers/mtd/spi-nor/core.c | 71 ++
drivers/mtd/spi-nor/core.h | 3 ++
2 files changed, 74 insertions(+)
diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor
Driver patch for octal 8D-8D-8D mode support.
Signed-off-by: Mason Yang
---
drivers/spi/spi-mxic.c | 101 +
1 file changed, 69 insertions(+), 32 deletions(-)
diff --git a/drivers/spi/spi-mxic.c b/drivers/spi/spi-mxic.c
index 69491f3..c83c8c2
From: Pratyush Yadav
The xSPI Profile 1.0 table specifies how many dummy cycles and address
bytes are needed for the Read Status Register command in octal DTR mode.
Use that information to send the correct Read SR command.
Signed-off-by: Pratyush Yadav
---
drivers/mtd/spi-nor/core.c | 23
From: Pratyush Yadav
Allow flashes to specify a hook to enable octal DTR mode. Use this hook
whenever possible to get optimal transfer speeds.
Signed-off-by: Pratyush Yadav
---
drivers/mtd/spi-nor/core.c | 35 +++
drivers/mtd/spi-nor/core.h | 2 ++
2 files
A set of simple command sequences is provided which can be executed
directly by the host controller to enable octal DTR mode.
Each command sequence is 8 per byte for single SPI mode.
Signed-off-by: Mason Yang
---
drivers/mtd/spi-nor/core.h | 18
drivers/mtd/spi-nor/sfdp.c | 103
Configuration register 2 is to set the device operation condition like
STR or DTR mode at address offset 0 and DQS mode at address offset 0x200.
Each device has various address offset for it's specific operatoin
setting.
Signed-off-by: Mason Yang
---
drivers/mtd/spi-nor/core.c | 78
From: Pratyush Yadav
JESD216 rev D makes BFPT 20 DWORDs. Update the BFPT size define to
reflect that.
The check for rev A or later compared the BFPT header length with the
maximum BFPT length, BFPT_DWORD_MAX. Since BFPT_DWORD_MAX was 16, and so
was the BFPT length for both rev A and B, this
From: Pratyush Yadav
Some devices in DTR mode expect an extra command byte called the
extension. The extension can either be same as the opcode, bitwise
inverse of the opcode, or another additional byte forming a 16-byte
opcode. Get the extension type from the BFPT. For now, only flashes with
From: Pratyush Yadav
In xSPI mode, flashes expect 2-byte opcodes. The second byte is called
the "command extension". There can be 3 types of extensions in xSPI:
repeat, invert, and hex. When the extension type is "repeat", the same
opcode is sent twice. When it is "invert", the second byte is
From: Pratyush Yadav
Each phase is given a separate 'dtr' field so mixed protocols like
4S-4D-4D can be supported.
Signed-off-by: Pratyush Yadav
---
drivers/spi/spi-mem.c | 3 +++
include/linux/spi/spi-mem.h | 8
2 files changed, 11 insertions(+)
diff --git
From: Pratyush Yadav
Double Transfer Rate (DTR) is SPI protocol in which data is transferred
on each clock edge as opposed to on each clock cycle. Make
framework-level changes to allow supporting flashes in DTR mode.
Right now, mixed DTR modes are not supported. So, for example a mode
like
Get maximum operation speed of device in octal mode from
BFPT 20th DWORD.
Signed-off-by: Mason Yang
---
drivers/mtd/spi-nor/core.h | 2 ++
drivers/mtd/spi-nor/sfdp.c | 36
drivers/mtd/spi-nor/sfdp.h | 4
3 files changed, 42 insertions(+)
diff --git
ents.
v1:
Without parsing BFPT & xSPI profile 1.0 table and enter Octal 8D-8D-8D
mode directly in spi_nor_fixups hooks.
thnaks for your time and review.
best regards,
Mason
--
Mason Yang (7):
mtd: spi-nor: sfdp: get octal mode maximum speed from BFPT
mtd: spi-nor: sfdp: parse xSPI Pro
spi_nor_set_read_settings() in core.h.
Signed-off-by: Mason Yang
---
drivers/mtd/spi-nor/core.c | 2 +-
drivers/mtd/spi-nor/core.h | 16 +++
drivers/mtd/spi-nor/sfdp.c | 106 +
3 files changed, 123 insertions(+), 1 deletion(-)
diff --git
On 26 May 2020, at 15:51, Jens Axboe wrote:
> btrfs uses generic_file_read_iter(), which already supports this.
>
> Signed-off-by: Jens Axboe
Really looking forward to this!
Acked-by: Chris Mason
On 19 Oct 2019, at 23:47, Stephen Rothwell wrote:
> Hi all,
>
> The btrfs tree
> (git://git.kernel.org/pub/scm/linux/kernel/git/mason/linux-btrfs.git#next)
> has not bee updated in more than a year, so I have removed it and then
> renamed the btrfs-kdave tree to btrfs.
Hello Linus,
Here are a few NTB bug fixes and a new AMD device support for v5.4. Please
consider pulling them.
Thanks,
Jon
The following changes since commit 4d856f72c10ecb060868ed10ff1b1453943fc6c8:
Linux 5.3 (2019-09-15 14:19:32 -0700)
are available in the Git repository at:
On Wed, Sep 18, 2019 at 1:58 PM Randy Dunlap wrote:
>
> From: Randy Dunlap
>
> Fix typos in drivers/ntb/hw/idt/Kconfig.
> Use consistent spelling and capitalization.
>
> Fixes: bf2a952d31d2 ("NTB: Add IDT 89HPESxNTx PCIe-switches support")
> Signed-off-by: R
On Sun, Sep 15, 2019 at 10:08 AM Mehta, Sanju wrote:
>
> From: Sanjay R Mehta
>
> The AMD new hardware uses BAR23 and BAR45 as memory windows
> as compared to previos where BAR1, BAR23 and BAR45 is used
> for memory windows.
>
> This patch add support for both AMD hardwares.
I pulled both of
Macronix AC series support using SET/GET_FEATURES to change
Block Protection and Unprotection.
MTD default _lock/_unlock function replacement by manufacturer
postponed initialization.
Signed-off-by: Mason Yang
---
drivers/mtd/nand/raw/nand_macronix.c | 80
Macronix AD series support using power down command to
enter a minimum power consumption state.
MTD default _suspend/_resume function replacement by
manufacturer postponed initialization.
Signed-off-by: Mason Yang
---
drivers/mtd/nand/raw/nand_macronix.c | 78
Manufacturer postponed initialization is for MTD default call-back
function replacement for vendor soecific operation, i.e.,
_lock/_unlock, _suspend/_resume and so on.
Signed-off-by: Mason Yang
---
drivers/mtd/nand/raw/internals.h | 4
drivers/mtd/nand/raw/nand_base.c | 19
On Sun, Aug 18, 2019 at 7:53 PM Colin King wrote:
>
> From: Colin Ian King
>
> Variable rc is initialized to a value that is never read and it
> is re-assigned later. The initialization is redundant and can be
> removed.
Applied to ntb-next, thanks
> Addresses-Coverity: ("Unused value")
>
On Wed, Apr 10, 2019 at 11:24 AM Mehta, Sanju wrote:
>
> Hi All,
>
> Any comments on below patch?
I wasn't cc'ed, so this one missed my inbox. Applied to ntb-next, thanks.
>
> Thanks & Regards,
> Sanjay Mehta
>
> -Original Message-
> From: Mehta, Sanju
> Sent: Friday, March 29, 2019
ed-off-by: Mason Yang
---
drivers/mtd/nand/raw/nand_macronix.c | 64
1 file changed, 64 insertions(+)
diff --git a/drivers/mtd/nand/raw/nand_macronix.c
b/drivers/mtd/nand/raw/nand_macronix.c
index 58511ae..d5df09a 100644
--- a/drivers/mtd/nand/raw/nand_macronix.c
.
Driver checks byte 167 of Vendor Blocks in ONFI parameter page table
to see if this high-reliability function is supported.
Signed-off-by: Mason Yang
---
drivers/mtd/nand/raw/nand_macronix.c | 54
1 file changed, 54 insertions(+)
diff --git a/drivers/mtd/nand/raw
ps://patchwork.kernel.org/patch/10874679/
thanks for your review.
best regards,
Mason
Mason Yang (2):
mtd: rawnand: Add Macronix raw NAND controller driver
dt-bindings: mtd: Document Macronix raw NAND controller bindings
.../devicetree/bindings/mtd/mxic-nand.txt
Document the bindings used by the Macronix raw NAND controller.
Signed-off-by: Mason Yang
---
.../devicetree/bindings/mtd/mxic-nand.txt | 36 ++
1 file changed, 36 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd/mxic-nand.txt
diff --git
Add a driver for Macronix raw NAND controller.
Signed-off-by: Mason Yang
---
drivers/mtd/nand/raw/Kconfig | 6 +
drivers/mtd/nand/raw/Makefile| 1 +
drivers/mtd/nand/raw/mxic_nand.c | 584 +++
3 files changed, 591 insertions(+)
create mode 100644
On 16 Aug 2019, at 5:15, Andy Grover wrote:
> On 8/16/19 3:06 PM, Gerd Rausch wrote:
>> Hi,
>>
>> Just added the e-mail addresses I found using a simple "google
>> search",
>> in order to reach out to the original authors of these commits:
>&
Hello Linus,
Here is a trivial NTB bug fix for v5.3. Please consider pulling it.
Thanks,
Jon
The following changes since commit e21a712a9685488f5ce80495b37b9fdbe96c230d:
Linux 5.3-rc3 (2019-08-04 18:40:12 -0700)
are available in the Git repository at:
git://github.com/jonmason/ntb
Document the bindings used by the Renesas R-Car Gen3 RPC-IF controller.
Signed-off-by: Mason Yang
Reviewed-by: Rob Herring
---
.../devicetree/bindings/spi/spi-renesas-rpc.txt| 45 ++
1 file changed, 45 insertions(+)
create mode 100644 Documentation/devicetree/bindings
.
5) other coding style and so on.
thanks for your review.
best regards,
Mason
Mason Yang (2):
spi: Add Renesas R-Car Gen3 RPC-IF SPI controller driver
dt-bindings: spi: Document Renesas R-Car Gen3 RPC-IF controller
bindings
.../devicetree/bindings/spi/s
Add a driver for Renesas R-Car Gen3 RPC-IF SPI controller.
Signed-off-by: Mason Yang
Signed-off-by: Sergei Shtylyov
---
drivers/spi/Kconfig | 6 +
drivers/spi/Makefile | 1 +
drivers/spi/spi-renesas-rpc.c | 756 ++
3 files changed
oller which is separated
form previous patchset:
https://patchwork.kernel.org/patch/10874679/
thanks for your review.
best regards,
Mason
Mason Yang (2):
mtd: rawnand: Add Macronix raw NAND controller driver
dt-bindings: mtd: Document Macronix raw NAND controller bindings
.../devicet
Add a driver for Macronix raw NAND controller.
Signed-off-by: Mason Yang
---
drivers/mtd/nand/raw/Kconfig | 6 +
drivers/mtd/nand/raw/Makefile| 1 +
drivers/mtd/nand/raw/mxic_nand.c | 554 +++
3 files changed, 561 insertions(+)
create mode 100644
Document the bindings used by the Macronix raw NAND controller.
Signed-off-by: Mason Yang
---
Documentation/devicetree/bindings/mtd/mxic-nand.txt | 19 +++
1 file changed, 19 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd/mxic-nand.txt
diff --git
.
4) coding style and so on.
v2 patch including:
1) remove RPC clock enable/dis-able control,
2) patch run time PM.
3) add RPC module software reset,
4) add regmap.
5) other coding style and so on.
thanks for your review.
best regards,
Mason
Mason Yang (2):
spi: Add Renesas R-Car Gen3 RPC-IF
Document the bindings used by the Renesas R-Car Gen3 RPC-IF controller.
Signed-off-by: Mason Yang
Reviewed-by: Rob Herring
---
.../devicetree/bindings/spi/spi-renesas-rpc.txt| 45 ++
1 file changed, 45 insertions(+)
create mode 100644 Documentation/devicetree/bindings
Add a driver for Renesas R-Car Gen3 RPC-IF SPI controller.
Signed-off-by: Mason Yang
Signed-off-by: Sergei Shtylyov
---
drivers/spi/Kconfig | 6 +
drivers/spi/Makefile | 1 +
drivers/spi/spi-renesas-rpc.c | 754 ++
3 files changed
Dcument the bindings used by the Renesas R-Car Gen3 RPC-IF controller.
Signed-off-by: Mason Yang
Reviewed-by: Rob Herring
---
.../devicetree/bindings/spi/spi-renesas-rpc.txt| 46 ++
1 file changed, 46 insertions(+)
create mode 100644 Documentation/devicetree/bindings
RPC module software reset,
4) add regmap.
5) other coding style and so on.
thanks for your review.
best regards,
Mason
Mason Yang (2):
spi: Add Renesas R-Car Gen3 RPC-IF SPI controller driver
dt-bindings: spi: Document Renesas R-Car Gen3 RPC-IF controller
bindings
.../devicetree/bi
Add a driver for Renesas R-Car Gen3 RPC-IF SPI controller.
Signed-off-by: Mason Yang
Signed-off-by: Sergei Shtylyov
---
drivers/spi/Kconfig | 6 +
drivers/spi/Makefile | 1 +
drivers/spi/spi-renesas-rpc.c | 754 ++
3 files changed
Hello Linus,
Here are the NTB changes for v5.3. The big change is adding the virtual
MSI interface for NTB (reviewed and acked by Bjorn). Also, there are
some bug fixes. Please consider pulling them.
Thanks,
Jon
The following changes since commit a188339ca5a396acc588e5851ed7e19f66b0ebd9:
Add a driver for Macronix raw NAND controller.
Signed-off-by: Mason Yang
---
drivers/mtd/nand/raw/Kconfig | 6 +
drivers/mtd/nand/raw/Makefile| 1 +
drivers/mtd/nand/raw/mxic_nand.c | 557 +++
3 files changed, 564 insertions(+)
create mode 100644
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