On Wed, Sep 30, 2020 at 09:11:31PM -0500, Samuel Holland wrote:
> Remove a level of indirection by getting the device directly from the
> passed-in struct snd_soc_dai, instead of going through its component.
>
> Signed-off-by: Samuel Holland
Acked-by: Maxime Ripard
Maxime
s
On Wed, Sep 30, 2020 at 09:11:29PM -0500, Samuel Holland wrote:
> Both the left and right side widgets referenced channel 0. This would
> unnecessarily power on the right side widget (and its associated path)
> when a mono stream was active.
>
> Signed-off-by: Samuel Holland
A
Add the support to control this feature from userspace.
>
> Signed-off-by: Samuel Holland
Acked-by: Maxime Ripard
Maxime
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dget type
> for that reason, and so these widgets will match newly-added widgets for
> the other AIFs.
>
> Signed-off-by: Samuel Holland
Acked-by: Maxime Ripard
Maxime
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h the naming scheme of the other widgets.
>
> The mixer controls are not renamed because they are exposed to
> userspace.
>
> Signed-off-by: Samuel Holland
Acked-by: Maxime Ripard
Maxime
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the
> AIF-related widgets from the ADC/DAC widgets, which allows the AIF
> widgets to stay in a logical order as more AIFs are added to the driver.
>
> No widgets are renamed, to ease verification that this commit makes no
> functional change.
>
> Signed-off-by: Samuel Holland
Ac
the
> widget and route arrays (previously they were at opposite ends), and it
> makes it easier to track which parts of which registers are implemented.
>
> Signed-off-by: Samuel Holland
Acked-by: Maxime Ripard
Maxime
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ing DAPM widgets. The DAPM
> widgets unnecessarily change clock parents when the codec goes in/out
> of idle and the supply widgets are powered up/down.
>
> Signed-off-by: Samuel Holland
Acked-by: Maxime Ripard
Maxime
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On Sat, Oct 03, 2020 at 12:03:32PM +0200, Clément Péron wrote:
> When running dtbs_check thermal_zone warn about the
> temperature declared.
>
> thermal-zones: cpu-thermal:trips:cpu-alert0:temperature:0:0: 85 is
> greater than the maximum of 20
>
> It's indeed wrong the real value is
Hi Clément,
On Sat, Oct 03, 2020 at 11:20:01AM +0200, Clément Péron wrote:
> Sunxi MMC driver can't distinguish at runtime what's the I/O voltage
> for HS200 mode.
Unfortunately, that's not true (or at least, that's not related to your patch).
> Add a property in the device-tree to notify MMC
On Fri, Oct 02, 2020 at 05:59:24PM -0500, Rob Herring wrote:
> Some DSI controllers are missing a reference to the recently added
> dsi-controller.yaml schema. Add it and we can drop the duplicate parts.
>
> Cc: Maxime Ripard
Acked-by: Maxime Ripard
Thanks!
Maxime
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On Sun, Oct 04, 2020 at 07:48:42AM +0800, Icenowy Zheng wrote:
> This patchset tries to fix DT schema verification errors that exist in
> V3-series device trees.
>
> The first patch drops bogus properties that is not needed in PineCube
> DT, and the second one adds compatible to the binding.
>
>
On Fri, Oct 02, 2020 at 06:01:21PM +0200, Clément Péron wrote:
> Hi Chen-Yu,
>
> On Mon, 28 Sep 2020 at 07:42, Chen-Yu Tsai wrote:
> >
> > On Mon, Sep 28, 2020 at 1:32 PM Chen-Yu Tsai wrote:
> > >
> > > On Mon, Sep 28, 2020 at 3:29 AM Clément Péron
> > > wrote:
> > > >
> > > > From: Jernej
Hi Tim,
On Thu, Oct 01, 2020 at 11:15:46AM +0100, Tim Gover wrote:
> hdmi_enable_4k60=1 causes the firmware to select 3.3 GHz for the PLLC
> VCO to support a core-frequency of 550 MHz which is the minimum
> frequency required by the HVS at 4Kp60. The side effect is that if the
> display clock
On Thu, Oct 01, 2020 at 11:22:03AM +0200, Nicolas Saenz Julienne wrote:
> On Wed, 2020-09-30 at 09:38 -0700, Nathan Chancellor wrote:
> > On Wed, Sep 30, 2020 at 04:07:58PM +0200, Maxime Ripard wrote:
> > > Hi Nathan,
> > >
> > > On Tue, Sep 29, 2020 at 03:15
On Thu, Oct 01, 2020 at 08:48:43AM +0200, Maxime Ripard wrote:
> Hi Stefan,
>
> On Wed, Sep 30, 2020 at 06:52:13PM +0200, Stefan Wahren wrote:
> > Am 30.09.20 um 18:38 schrieb Nathan Chancellor:
> > > On Wed, Sep 30, 2020 at 04:07:58PM +0200, Maxime Ripard
Hi Stefan,
On Wed, Sep 30, 2020 at 06:52:13PM +0200, Stefan Wahren wrote:
> Am 30.09.20 um 18:38 schrieb Nathan Chancellor:
> > On Wed, Sep 30, 2020 at 04:07:58PM +0200, Maxime Ripard wrote:
> >> Hi Nathan,
> >>
> >> On Tue, Sep 29, 2020 at 03:15:26PM -0700, N
On Thu, Sep 17, 2020 at 04:01:17PM +0200, Ondřej Jirman wrote:
> Hello Maxime,
>
> On Thu, Sep 17, 2020 at 03:19:04PM +0200, Maxime Ripard wrote:
> > Hi,
> >
> > On Sat, Sep 12, 2020 at 01:22:00PM +0200, Ondrej Jirman wrote:
> > > mfd: sun4i-gpadc: I
Hi Nathan,
On Tue, Sep 29, 2020 at 03:15:26PM -0700, Nathan Chancellor wrote:
> On Thu, Sep 03, 2020 at 10:01:52AM +0200, Maxime Ripard wrote:
> > Now that all the drivers have been adjusted for it, let's bring in the
> > necessary device tree changes.
> >
> > T
Hi,
On Mon, Sep 28, 2020 at 05:00:37PM +0200, Clément Péron wrote:
> VQMMC supply is connected to BLDO2 which provides 1.8V.
>
> Let's reflect this in the device-tree.
This commit log doesn't really explain what is going on though?
> Fixes: 089bee8dd119 ("arm64: dts: allwinner: h6: Introduce
On Mon, Sep 28, 2020 at 04:27:42PM +0200, Clément Péron wrote:
> On Mon, 28 Sep 2020 at 10:43, Maxime Ripard wrote:
> >
> > On Mon, Sep 21, 2020 at 08:37:09PM +0200, Jernej Škrabec wrote:
> > > Dne ponedeljek, 21. september 2020 ob 19:23:49 CEST je Clément Péron
>
On Mon, Sep 21, 2020 at 07:15:13PM +0200, Clément Péron wrote:
> Hi Maxime,
>
> On Mon, 21 Sep 2020 at 14:29, Maxime Ripard wrote:
> >
> > On Mon, Sep 21, 2020 at 12:27:11PM +0200, Clément Péron wrote:
> > > As slots and slot_width can be overwritter in case se
On Mon, Sep 21, 2020 at 08:37:09PM +0200, Jernej Škrabec wrote:
> Dne ponedeljek, 21. september 2020 ob 19:23:49 CEST je Clément Péron
> napisal(a):
> > Hi Maxime,
> >
> > On Mon, 21 Sep 2020 at 15:59, Maxime Ripard wrote:
> > >
> > > On Mon, Sep 2
Hi!
On Mon, Sep 28, 2020 at 02:27:39PM +0800, Kevin Tang wrote:
> From: Kevin Tang
>
> Adds MIPI DSI Master and MIPI DSI-PHY (D-PHY)
> support for Unisoc's display subsystem.
>
> RFC v7:
> - Fix DTC unit name warnings
> - Fix the problem of maintainers
>
> Cc: Orson Zhai
> Cc: Chunyan
Hi!
On Mon, Sep 28, 2020 at 02:27:35PM +0800, Kevin Tang wrote:
> From: Kevin Tang
>
> The Unisoc DRM master device is a virtual device needed to list all
> DPU devices or other display interface nodes that comprise the
> graphics subsystem
>
> RFC v7:
> - Fix DTC unit name warnings
> -
Hi,
On Wed, Sep 16, 2020 at 07:59:41PM +0200, Martin Cerveny wrote:
> Add support for "allwinner,simple-framebuffer"
> with "mixer0-lcd0" pipeline from boot loader (u-boot).
> It depends on boot loader implementation of DE2/TCON0
> setup with LCD.
>
> Signed-off-by: Martin Cerveny
queued for
Hi,
On Wed, Sep 23, 2020 at 08:57:02AM +0800, Icenowy Zheng wrote:
> Pine64 PineCube is an IP camera based on Allwinner S3 chip.
>
> This patchset tries to add support for it.
>
> In order to make sure the system do not hang when camera is brought up,
> a fix to AXP209 driver is needed (sent
On Mon, Sep 21, 2020 at 12:27:18PM +0200, Clément Péron wrote:
> From: Jernej Skrabec
>
> Add a simple-soundcard to link audio between HDMI and I2S.
>
> Signed-off-by: Jernej Skrabec
> Signed-off-by: Marcus Cooper
> Signed-off-by: Clément Péron
> ---
>
On Mon, Sep 21, 2020 at 12:27:12PM +0200, Clément Péron wrote:
> We are actually using a complex formula to just return a bunch of
> simple values. Also this formula is wrong for sun4i.
Just like the previous patch, this could use a bit more explanation,
like why it's a good thing, or how it's
On Mon, Sep 21, 2020 at 12:27:11PM +0200, Clément Péron wrote:
> As slots and slot_width can be overwritter in case set_tdm() is
> called. Avoid to have this logic in set_chan_cfg().
>
> Instead pass the required values as params to set_chan_cfg().
It's not really clear here what the issue is,
On Mon, Sep 14, 2020 at 06:19:45AM +0200, Wilken Gottwalt wrote:
> Updated information about H2+ and H3 differences and added a link to a
> slightly newer datasheet.
>
> Signed-off-by: Wilken Gottwalt
> ---
> Changes in v2:
> - addressed comments/proposals from Maxime
> ---
>
Hi,
On Mon, Sep 14, 2020 at 06:00:56AM +0200, Wilken Gottwalt wrote:
> > > > cpufreq OPP misconfiguration on Allwinner SoCs has been known to create
> > > > some errors that are fairly hard to spot and be quite easy to go
> > > > unnoticed (like caches corruptions).
> > >
> > > Yeah, I noticed
On Thu, Sep 17, 2020 at 10:33:39AM +0200, Hans Verkuil wrote:
> Hi Maxime,
>
> On 27/08/2020 17:19, Maxime Ripard wrote:
> > On Tue, Aug 25, 2020 at 07:35:18PM +0200, Jernej Skrabec wrote:
> >> Allwinner R40 SoC contains video engine very similar to that in A33.
> &g
Hi Clement,
On Thu, Sep 17, 2020 at 03:55:45PM +0200, Clément Péron wrote:
> Hi Maxime and Samuel,
>
> On Thu, 17 Sep 2020 at 15:21, Maxime Ripard wrote:
> >
> > Hi,
> >
> > On Sat, Sep 12, 2020 at 03:29:55PM -0500, Samuel Holland wrote:
> > &g
Hi,
On Sat, Sep 12, 2020 at 01:22:00PM +0200, Ondrej Jirman wrote:
> mfd: sun4i-gpadc: Interrupt numbers should start from 1
Why? An hwirq with 0 is totally fine
> This avoids a warning:
>
> [2.891592] [ cut here ]
> [2.895052] WARNING: CPU: 0 PID: 149 at
Hi,
On Sat, Sep 12, 2020 at 03:29:55PM -0500, Samuel Holland wrote:
> On 9/10/20 9:33 AM, Maxime Ripard wrote:
> > On Thu, Sep 03, 2020 at 09:54:39PM -0500, Samuel Holland wrote:
> >> On 9/3/20 3:58 PM, Maxime Ripard wrote:
> >>> On Thu, Sep 03, 2020 at 10:02:3
On Mon, Sep 14, 2020 at 07:14:11PM +0900, Hoegeun Kwon wrote:
> Hi Maxime,
>
> On 9/8/20 9:00 PM, Maxime Ripard wrote:
> > Hi Hoegeun,
> >
> > On Mon, Sep 07, 2020 at 08:49:12PM +0900, Hoegeun Kwon wrote:
> >> On 9/3/20 5:00 PM, Maxime Ripard wrote:
> >&g
Hi,
On Tue, Sep 15, 2020 at 01:37:50PM +0300, Necip Fazil Yildiran wrote:
> When CLK_BCM2711_DVP is enabled and RESET_CONTROLLER is disabled, it
> results in the following Kbuild warning:
>
> WARNING: unmet direct dependencies detected for RESET_SIMPLE
> Depends on [n]: RESET_CONTROLLER [=n]
>
hi,
On Thu, Sep 10, 2020 at 10:05:46PM +0800, Jason Yan wrote:
> Eliminate the following coccicheck warning:
>
> drivers/soc/sunxi/sunxi_sram.c:197:2-3: Unneeded semicolon
>
> Reported-by: Hulk Robot
> Signed-off-by: Jason Yan
Applied, thanks!
Maxime
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On Thu, Sep 10, 2020 at 10:18:32AM -0700, Nathan Chancellor wrote:
> Clang warns:
>
> drivers/gpu/drm/vc4/vc4_plane.c:901:27: warning: operator '?:' has lower
> precedence than '|'; '|' will be evaluated first
> [-Wbitwise-conditional-parentheses]
>
On Thu, Sep 10, 2020 at 10:04:02AM -0700, Nathan Chancellor wrote:
> Clang warns 100+ times in the vc4 driver along the lines of:
>
> drivers/gpu/drm/vc4/vc4_hdmi_phy.c:518:13: warning: implicit conversion
> from enumeration type 'enum vc4_hdmi_field' to different enumeration
> type 'enum
Hi,
On Tue, Sep 08, 2020 at 03:18:08PM +0200, Wilken Gottwalt wrote:
> Updated information about H2+ and H3 difference and added a link to a
> slightly newer datasheet.
>
> Signed-off-by: Wilken Gottwalt
> ---
> Documentation/arm/sunxi.rst | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff
On Tue, Sep 08, 2020 at 06:44:06PM +0200, Martin Cerveny wrote:
> Hello.
>
> On Tue, 8 Sep 2020, Maxime Ripard wrote:
> > On Fri, Sep 04, 2020 at 10:01:06PM +0200, Martin Cerveny wrote:
> > > First patch extends cedrus capability to all decoders
> > >
On Sun, Sep 06, 2020 at 06:21:38PM +0200, Martin Cerveny wrote:
> The secondary video layer (VI) on "Allwinner V3s" displays
> decoded video (YUV) in wrong colors. The secondary
> CSC should be programmed.
> Let's correct CSC register offset and extend regmap size.
Applied both, thanks
Maxime
On Wed, Sep 09, 2020 at 03:54:46PM +0200, Wilken Gottwalt wrote:
> On Wed, 9 Sep 2020 14:08:59 +0200
> Maxime Ripard wrote:
> > Hi!
> >
> > Thanks for contributing
> >
> > The prefix isn't right though.
> >
> > dt-bindings is u
Hi!
Thanks for contributing
The prefix isn't right though.
dt-bindings is used when you're modifying the binding itself, ie the
description of what the node is supposed to look like, not when you
actually use that node in a DT.
In that case, that would be ARM: dts: sunxi:
(we're on the ARM
Hi Hoegeun,
On Mon, Sep 07, 2020 at 08:49:12PM +0900, Hoegeun Kwon wrote:
> On 9/3/20 5:00 PM, Maxime Ripard wrote:
> > Hi everyone,
> >
> > Here's a (pretty long) series to introduce support in the VC4 DRM driver
> > for the display pipeline found in the BCM2711
On Fri, Sep 04, 2020 at 10:01:11PM +0200, Martin Cerveny wrote:
> Allwinner V3s SoC contains video engine. Add compatible for it.
>
> Signed-off-by: Martin Cerveny
The prefix isn't the right one, it shouldn't be media: but dt-bindings: media:
cedrus:
Maxime
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Hi,
On Fri, Sep 04, 2020 at 10:01:06PM +0200, Martin Cerveny wrote:
> First patch extends cedrus capability to all decoders
> because V3s missing MPEG2 decoder.
>
> Next two patches add system control node (SRAM C1) and
> next three patches add support for Cedrus VPU.
How was it tested?
On Mon, Sep 07, 2020 at 06:24:56PM +0200, Martin Cerveny wrote:
> Add support for crypto engine (sun4i-ss) for Allwinner V3s.
> Functionality like A33 so add only compatible and enable
> in device tree.
>
> Regards.
Applied, thanks
Maxime
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On Tue, Sep 08, 2020 at 08:15:56AM +0200, Maxime Ripard wrote:
> On Mon, Sep 07, 2020 at 07:54:37PM +0200, Corentin Labbe wrote:
> > When adding allwinner,sun8i-a33-crypto, I forgot to add that it needs reset.
> > Furthermore, there are no need to use items to list only
ngs: crypto: add new compatible for A33 SS")
> Signed-off-by: Corentin Labbe
Acked-by: Maxime Ripard
Thanks!
Maxime
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Hi,
On Thu, Sep 03, 2020 at 10:00:32AM +0200, Maxime Ripard wrote:
> Hi everyone,
>
> Here's a (pretty long) series to introduce support in the VC4 DRM driver
> for the display pipeline found in the BCM2711 (and thus the RaspberryPi 4).
>
> The main differences are tha
Hi,
On Fri, Sep 04, 2020 at 10:46:26AM +0100, Dave Stevenson wrote:
> On Thu, 3 Sep 2020 at 09:03, Maxime Ripard wrote:
> >
> > From: Hoegeun Kwon
> >
> > The BCM2711 has another clock that needs to be ramped up depending on the
> > pixel rate: the pixel
Hi!
On Fri, Sep 04, 2020 at 06:16:16PM +0800, Jian-Hong Pan wrote:
> Thanks for version 5 patch series!
>
> I applied it based on linux-next tag next-20200828 and build it with
> the config [1] to test on RPi 4
> However, It fails to get HDMI state machine clock and pixel bcb clock.
> Then,
et but not
> used [-Wunused-but-set-variable]
> 890 | phys_addr_t iova;
> | ^~~~
>
> Reported-by: kernel test robot
> Signed-off-by: Joerg Roedel
Acked-by: Maxime Ripard
Thanks!
Maxime
On Thu, Sep 03, 2020 at 04:54:45PM +0200, Corentin Labbe wrote:
> When adding allwinner,sun8i-a33-crypto, I forgot to add that it needs reset.
> Furthermore, there are no need to use items to list only one compatible
> in compatible list.
>
> Fixes: f81547ba7a98 ("dt-bindings: crypto: add new
On Sun, Aug 30, 2020 at 10:48:51PM -0500, Samuel Holland wrote:
> When attached to the regmap, the bus clock is automatically enabled as
> needed to access device registers. This avoids needing code to manage it
> separately in the driver.
>
> Signed-off-by: Samuel Holland
A
Holland
Acked-by: Maxime Ripard
Thanks!
Maxime
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On Wed, Sep 02, 2020 at 12:03:05AM +0200, Jernej Skrabec wrote:
> Function sun8i_vi_layer_get_csc_mode() is supposed to return CSC mode
> but due to inproper return type (bool instead of u32) it returns just 0
> or 1. Colors are wrong for YVU formats because of that.
>
> Fixes: daab3d0e8e2b
On Thu, Sep 03, 2020 at 10:02:31PM +0200, Clément Péron wrote:
> Hi Maxime,
>
> On Wed, 29 Jul 2020 at 17:16, Mark Brown wrote:
> >
> > On Wed, Jul 29, 2020 at 04:39:27PM +0200, Maxime Ripard wrote:
> >
> > > It really looks like the polarity of LRCK is fine
Hi
On Thu, Sep 03, 2020 at 10:30:15PM +0200, Clément Péron wrote:
> This reverts commit dd657eae8164f7e4bafe8b875031a7c6c50646a9.
>
> There was a misinterpretation of the analysis using a scope.
> After rechecking this using a logical analyzer the LRCK polarity is
> fine.
Yes, it's fine indeed,
The vc4 atomic commit loop has an handrolled loop that is basically
identical to for_each_new_crtc_state, let's convert it to that helper.
Tested-by: Chanwoo Choi
Tested-by: Hoegeun Kwon
Tested-by: Stefan Wahren
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_kms.c | 10
no longer
have that luxury.
Tested-by: Chanwoo Choi
Tested-by: Hoegeun Kwon
Tested-by: Stefan Wahren
Signed-off-by: Dave Stevenson
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_plane.c | 17 +
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/drivers
the b-frame marker to the match ALSA's default.
drm/vc4: hdmi: Add audio-related callbacks
Hoegeun Kwon (1):
drm/vc4: hdmi: Add pixel BVB clock control
Maxime Ripard (72):
dt-bindings: display: Add support for the BCM2711 HVS
drm/vc4: hvs: Boost the core clock during modeset
drm/vc4: plane
Some pixelvalves in vc5 use the same interrupt line so let's register our
interrupt handler as a shared one.
Reviewed-by: Eric Anholt
Tested-by: Chanwoo Choi
Tested-by: Hoegeun Kwon
Tested-by: Stefan Wahren
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 4 +++-
1 file
to hvs_output in the
vc4_crtc_data, since a pixelvalve is really connected to an output, and
not to a FIFO.
Reviewed-by: Dave Stevenson
Tested-by: Chanwoo Choi
Tested-by: Hoegeun Kwon
Tested-by: Stefan Wahren
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 8
drivers/gpu
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 18 +++---
drivers/gpu/drm/vc4/vc4_drv.h | 3 +++
2 files changed, 14 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index 6d8fa6118fc1..e55b2208b4b7 100644
The HVS found in the BCM2711 is slightly different from the previous
generations, let's add a compatible for it.
Reviewed-by: Eric Anholt
Tested-by: Chanwoo Choi
Tested-by: Hoegeun Kwon
Tested-by: Stefan Wahren
Signed-off-by: Maxime Ripard
---
Documentation/devicetree/bindings/display/brcm
-by: Hoegeun Kwon
Tested-by: Stefan Wahren
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index 73d918706f7e..00b2c2b011d1 100644
--- a/drivers/gpu/drm
-by: Hoegeun Kwon
Tested-by: Stefan Wahren
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index 2c64efd2d3d9..1d9e3658ae59 100644
-by: Stefan Wahren
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index 41bc61d5a61f..c2ab907611e3 100644
--- a/drivers/gpu/drm
The previous generations were only supporting a single HDMI controller, but
that's about to change, so put an index as well to differentiate between
the two controllers.
Reviewed-by: Eric Anholt
Tested-by: Chanwoo Choi
Tested-by: Hoegeun Kwon
Tested-by: Stefan Wahren
Signed-off-by: Maxime
The HVS5 uses different color matrices. Disable color management support
for now.
Reviewed-by: Eric Anholt
Tested-by: Chanwoo Choi
Tested-by: Hoegeun Kwon
Tested-by: Stefan Wahren
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 17 +++--
drivers/gpu/drm/vc4
The BCM2711 sports a second HDMI controller, so let's add that second HDMI
encoder type.
Reviewed-by: Eric Anholt
Tested-by: Chanwoo Choi
Tested-by: Hoegeun Kwon
Tested-by: Stefan Wahren
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_drv.h | 1 +
1 file changed, 1 insertion
In order to avoid a stale pixel getting stuck on mode change or a disable
/ enable cycle, we need to make sure to flush the PV FIFO on disable.
Reviewed-by: Dave Stevenson
Tested-by: Chanwoo Choi
Tested-by: Hoegeun Kwon
Tested-by: Stefan Wahren
Signed-off-by: Maxime Ripard
---
drivers/gpu
-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 2 +-
drivers/gpu/drm/vc4/vc4_drv.h | 1 +-
drivers/gpu/drm/vc4/vc4_hvs.c | 59 +--
drivers/gpu/drm/vc4/vc4_txp.c | 1 +-
4 files changed, 16 insertions(+), 47 deletions(-)
diff --git a/drivers/gpu/drm/vc4
Stevenson
Tested-by: Chanwoo Choi
Tested-by: Hoegeun Kwon
Tested-by: Stefan Wahren
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index
the first call.
Reviewed-by: Dave Stevenson
Tested-by: Chanwoo Choi
Tested-by: Hoegeun Kwon
Tested-by: Stefan Wahren
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4
Tested-by: Hoegeun Kwon
Tested-by: Stefan Wahren
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index d0b326e1df0a..4c23cf8aefb9 100644
-by: Chanwoo Choi
Tested-by: Hoegeun Kwon
Tested-by: Stefan Wahren
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 19 +++
drivers/gpu/drm/vc4/vc4_drv.h | 7 +++
2 files changed, 26 insertions(+)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu
Now that we only configure the PixelValve in vc4_crtc_config_pv, it doesn't
really make much sense to dump its register content in its caller.
Reviewed-by: Dave Stevenson
Tested-by: Chanwoo Choi
Tested-by: Hoegeun Kwon
Tested-by: Stefan Wahren
Signed-off-by: Maxime Ripard
---
drivers/gpu
Wahren
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index 2c5ff45dc315..b7b0e19e2fe1 100644
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b
In order to make further refactoring easier, let's move the HVS channel
setup / teardown to their own function.
Reviewed-by: Dave Stevenson
Tested-by: Chanwoo Choi
Tested-by: Hoegeun Kwon
Tested-by: Stefan Wahren
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hvs.c | 104
Wahren
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 24 +++-
drivers/gpu/drm/vc4/vc4_hdmi.h | 4 ++--
2 files changed, 25 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index 44126ae55a19
the vc4_hdmi structure so
that we can eventually get rid of that single global pointer.
Reviewed-by: Eric Anholt
Tested-by: Chanwoo Choi
Tested-by: Hoegeun Kwon
Tested-by: Stefan Wahren
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 22 --
drivers/gpu/drm/vc4
as much as
possible.
Let's implement some indirection to wrap around a register and depending on
the variant will lookup the associated register on that particular variant.
Reviewed-by: Dave Stevenson
Tested-by: Chanwoo Choi
Tested-by: Hoegeun Kwon
Tested-by: Stefan Wahren
Signed-off-by: Maxime
The BCM2711 comes with other pixelvalves that have different requirements
and capabilities. Let's document their compatible.
Reviewed-by: Rob Herring
Reviewed-by: Eric Anholt
Tested-by: Chanwoo Choi
Tested-by: Hoegeun Kwon
Tested-by: Stefan Wahren
Signed-off-by: Maxime Ripard
Choi
Tested-by: Hoegeun Kwon
Tested-by: Stefan Wahren
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index ec34c08b16df..ae8c4d53e239 100644
Now that we don't have any users anymore, we can kill that pointer.
Reviewed-by: Eric Anholt
Tested-by: Chanwoo Choi
Tested-by: Hoegeun Kwon
Tested-by: Stefan Wahren
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_drv.h | 1 -
drivers/gpu/drm/vc4/vc4_hdmi.c | 7 ---
2 files
-by: Chanwoo Choi
Tested-by: Hoegeun Kwon
Tested-by: Stefan Wahren
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 41 ++-
drivers/gpu/drm/vc4/vc4_hdmi.h | 16 ++-
2 files changed, 28 insertions(+), 29 deletions(-)
diff --git a/drivers
The vc4_hdmi_connector was only used to switch between drm_connector to
drm_encoder. However, we can now use vc4_hdmi to do the switch, so that
structure is redundant.
Reviewed-by: Eric Anholt
Tested-by: Chanwoo Choi
Tested-by: Hoegeun Kwon
Tested-by: Stefan Wahren
Signed-off-by: Maxime
.
Tested-by: Chanwoo Choi
Tested-by: Hoegeun Kwon
Tested-by: Stefan Wahren
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 72 +++
drivers/gpu/drm/vc4/vc4_hdmi.h | 4 ++-
2 files changed, 44 insertions(+), 32 deletions(-)
diff --git a/drivers/gpu
,
and we'll fix the local variable later.
Reviewed-by: Eric Anholt
Tested-by: Chanwoo Choi
Tested-by: Hoegeun Kwon
Tested-by: Stefan Wahren
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm
Let's continue the implementation of hooks for the parts that change in the
BCM2711 SoC with the PHY RNG setup.
Reviewed-by: Dave Stevenson
Tested-by: Chanwoo Choi
Tested-by: Hoegeun Kwon
Tested-by: Stefan Wahren
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 15
-by: Hoegeun Kwon
Tested-by: Stefan Wahren
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 3 ++-
drivers/gpu/drm/vc4/vc4_hdmi.h | 3 +++
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index 9e2bc6cb690e
-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 79 ---
drivers/gpu/drm/vc4/vc4_hdmi.h | 3 +-
2 files changed, 41 insertions(+), 41 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index 1e6c0e26d186..84273fe650d6 100644
-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index 84273fe650d6..487c04de6b85 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4
-by: Dave Stevenson
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 25 +
drivers/gpu/drm/vc4/vc4_hdmi.h | 4
2 files changed, 21 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index
The BCM2711 has a reworked display pipeline, and the load tracker needs
some adjustment to operate properly. Let's add a compatible for BCM2711
and disable the load tracker until properly supported.
Tested-by: Chanwoo Choi
Tested-by: Hoegeun Kwon
Tested-by: Stefan Wahren
Signed-off-by: Maxime
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