Re: [RFC PATCH v2 12/14] x86/watchdog/hardlockup/hpet: Determine if HPET timer caused NMI

On Tue, Apr 09, 2019 at 01:28:17PM +0200, Peter Zijlstra wrote: > On Wed, Feb 27, 2019 at 08:05:16AM -0800, Ricardo Neri wrote: > > @@ -62,7 +67,18 @@ static inline void set_comparator(struct hpet_hld_data > > *hdata, > > static void kick_timer(struct hpet_hld_da

Re: [RFC PATCH v2 11/14] x86/watchdog/hardlockup: Add an HPET-based hardlockup detector

On Tue, Apr 09, 2019 at 12:59:46PM +0200, Peter Zijlstra wrote: > On Tue, Mar 26, 2019 at 09:49:13PM +0100, Thomas Gleixner wrote: > > So way you should handle this is: > > > > cpumask_set_cpu(cpu, hld_data->cpu_monitored_mask); > > > > if (!hld_data->enabled_cpus++) { > >

Re: [RFC PATCH v2 11/14] x86/watchdog/hardlockup: Add an HPET-based hardlockup detector

On Tue, Apr 09, 2019 at 01:03:40PM +0200, Peter Zijlstra wrote: > On Wed, Feb 27, 2019 at 08:05:15AM -0800, Ricardo Neri wrote: > > diff --git a/arch/x86/include/asm/hpet.h b/arch/x86/include/asm/hpet.h > > index 4d559e0c746f..15dc3b576496 100644 > > --- a/arch/x86/include

Re: [RFC PATCH v2 11/14] x86/watchdog/hardlockup: Add an HPET-based hardlockup detector

er. I'll double check my setup. > > On 2/27/19 11:05 PM, Ricardo Neri wrote: > > .. > > diff --git a/arch/x86/kernel/watchdog_hld_hpet.c > > b/arch/x86/kernel/watchdog_hld_hpet.c > > new file mode 100644 > > index ..cfa284da4bf6 > > --

Re: [RFC PATCH v2 13/14] watchdog/hardlockup/hpet: Only enable the HPET watchdog via a boot parameter

On Tue, Mar 26, 2019 at 10:29:52PM +0100, Thomas Gleixner wrote: > On Wed, 27 Feb 2019, Ricardo Neri wrote: > > + When hpet is specified, the NMI watchdog will be driven > > + by an HPET timer, if available in the sy

Re: [RFC PATCH v2 08/14] watchdog/hardlockup: Decouple the hardlockup detector from perf

On Tue, Mar 26, 2019 at 10:18:32PM +0100, Thomas Gleixner wrote: > On Wed, 27 Feb 2019, Ricardo Neri wrote: > > +// SPDX-License-Identifier: GPL-2.0 > > +/* > > + * Detect hard lockups on a system > > + * > > + * Copyright (C) Intel Corporation 2019 > > +

Re: [RFC PATCH v2 06/14] x86/hpet: Configure the timer used by the hardlockup detector

On Tue, Mar 26, 2019 at 10:13:06PM +0100, Thomas Gleixner wrote: > On Wed, 27 Feb 2019, Ricardo Neri wrote: > > +#ifdef CONFIG_X86_HARDLOCKUP_DETECTOR_HPET > > +struct hpet_hld_data *hpet_hardlockup_detector_assign_timer(void) > > +{ > > + struct hpet_hld_data *hdat

Re: [RFC PATCH v2 03/14] x86/hpet: Calculate ticks-per-second in a separate function

On Tue, Mar 26, 2019 at 10:03:02PM +0100, Thomas Gleixner wrote: > On Wed, 27 Feb 2019, Ricardo Neri wrote: > > int hpet_alloc(struct hpet_data *hdp) > > { > > u64 cap, mcfg; > > @@ -845,7 +868,6 @@ int hpet_alloc(struct hpet_data *hdp) > > size_t siz;

Re: [RFC PATCH v2 05/14] x86/hpet: Relocate flag definitions to a header file

On Tue, Mar 26, 2019 at 10:11:16PM +0100, Thomas Gleixner wrote: > On Wed, 27 Feb 2019, Ricardo Neri wrote: > > > Users of HPET timers (such as the hardlockup detector) need the definitions > > of these flags to interpret the configuration of a timer as passed by > > p

Re: [RFC PATCH v2 12/14] x86/watchdog/hardlockup/hpet: Determine if HPET timer caused NMI

On Tue, Mar 26, 2019 at 09:55:35PM +0100, Thomas Gleixner wrote: > On Wed, 27 Feb 2019, Ricardo Neri wrote: > > @@ -62,7 +67,18 @@ static inline void set_comparator(struct hpet_hld_data > > *hdata, > > static void kick_timer(struct hpet_hld_data *hdata, bool force

Re: [RFC PATCH v2 02/14] x86/hpet: Expose more functions to read and write registers

On Tue, Mar 26, 2019 at 10:00:24PM +0100, Thomas Gleixner wrote: > On Wed, 27 Feb 2019, Ricardo Neri wrote: > > struct irq_data; > > @@ -109,6 +114,11 @@ extern void > > hpet_unregister_irq_handler(rtc_irq_handler handler); > > static inline int hpet_enable(void

Re: [RFC PATCH v2 11/14] x86/watchdog/hardlockup: Add an HPET-based hardlockup detector

On Tue, Mar 26, 2019 at 09:49:13PM +0100, Thomas Gleixner wrote: > On Wed, 27 Feb 2019, Ricardo Neri wrote: > > +/** > > + * get_count() - Get the current count of the HPET timer > > + * > > + * Returns: > > + * > > + * Value of the main counter o

Re: [RFC PATCH v2 09/14] watchdog/hardlockup: Make arch_touch_nmi_watchdog() to hpet-based implementation

On Wed, Feb 27, 2019 at 08:17:58AM -0800, Paul E. McKenney wrote: > On Wed, Feb 27, 2019 at 08:05:13AM -0800, Ricardo Neri wrote: > > CPU architectures that have an NMI watchdog use arch_touch_nmi_watchdog() > > to briefly ignore the hardlockup detector. If the architecture do

[RFC PATCH v2 02/14] x86/hpet: Expose more functions to read and write registers

edanne Cc: Kate Stewart Cc: "Rafael J. Wysocki" Cc: "Ravi V. Shankar" Cc: x...@kernel.org Signed-off-by: Ricardo Neri --- arch/x86/include/asm/hpet.h | 10 ++ arch/x86/kernel/hpet.c | 12 +++- 2 files changed, 21 insertions(+), 1 deletion(-) diff --git a

[RFC PATCH v2 03/14] x86/hpet: Calculate ticks-per-second in a separate function

Cc: x...@kernel.org Signed-off-by: Ricardo Neri --- drivers/char/hpet.c | 31 +-- include/linux/hpet.h | 1 + 2 files changed, 26 insertions(+), 6 deletions(-) diff --git a/drivers/char/hpet.c b/drivers/char/hpet.c index 4a22b4b41aef..b73b68c0e127 100644 --- a/drivers/char/hp

[RFC PATCH v2 05/14] x86/hpet: Relocate flag definitions to a header file

edanne Cc: Kate Stewart Cc: "Rafael J. Wysocki" Cc: "Ravi V. Shankar" Cc: x...@kernel.org Signed-off-by: Ricardo Neri --- arch/x86/include/asm/hpet.h | 6 ++ arch/x86/kernel/hpet.c | 6 -- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/x86

[RFC PATCH v2 01/14] x86/msi: Add definition for NMI delivery mode

edanne Cc: "Eric W. Biederman" Cc: Baoquan He Cc: Dou Liyang Cc: Jan Kiszka Cc: "Ravi V. Shankar" Cc: x...@kernel.org Signed-off-by: Ricardo Neri --- arch/x86/include/asm/msidef.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/include/asm/msidef.h b/arch/

[RFC PATCH v2 09/14] watchdog/hardlockup: Make arch_touch_nmi_watchdog() to hpet-based implementation

"Luis R. Rodriguez" Cc: Waiman Long Cc: Josh Poimboeuf Cc: Randy Dunlap Cc: Davidlohr Bueso Cc: Christoffer Dall Cc: Marc Zyngier Cc: Kai-Heng Feng Cc: Konrad Rzeszutek Wilk Cc: David Rientjes Cc: "Ravi V. Shankar" Cc: x...@kernel.org Cc: sparcli...@vger.kernel.org C

[RFC PATCH v2 06/14] x86/hpet: Configure the timer used by the hardlockup detector

. This condition greatly simplifies the implementation of the detector. Cc: "H. Peter Anvin" Cc: Ashok Raj Cc: Andi Kleen Cc: Tony Luck Cc: Clemens Ladisch Cc: Arnd Bergmann Cc: Philippe Ombredanne Cc: Kate Stewart Cc: "Rafael J. Wysocki" Cc: "Ravi V. Shankar" Cc: x...@ker

[RFC PATCH v2 11/14] x86/watchdog/hardlockup: Add an HPET-based hardlockup detector

Cc: Kate Stewart Cc: "Rafael J. Wysocki" Cc: "Ravi V. Shankar" Cc: Mimi Zohar Cc: Jan Kiszka Cc: Nick Desaulniers Cc: Masahiro Yamada Cc: Nayna Jain Cc: x...@kernel.org Signed-off-by: Ricardo Neri --- arch/x86/Kconfig.debug | 10 + arch/x86/include/as

[RFC PATCH v2 07/14] watchdog/hardlockup: Define a generic function to detect hardlockups

Cc: "Ravi V. Shankar" Cc: x...@kernel.org Cc: sparcli...@vger.kernel.org Cc: linuxppc-...@lists.ozlabs.org Signed-off-by: Ricardo Neri --- include/linux/nmi.h | 1 + kernel/watchdog_hld.c | 18 +++--- 2 files changed, 12 insertions(+), 7 deletions(-) diff --git a/include

[RFC PATCH v2 08/14] watchdog/hardlockup: Decouple the hardlockup detector from perf

: Paul Mackerras Cc: Mathieu Desnoyers Cc: Masami Hiramatsu Cc: Peter Zijlstra Cc: Andrew Morton Cc: Philippe Ombredanne Cc: Colin Ian King Cc: "Luis R. Rodriguez" Cc: "Ravi V. Shankar" Cc: x...@kernel.org Cc: sparcli...@vger.kernel.org Cc: linuxppc-...@lists.ozlabs.org

[RFC PATCH v2 10/14] kernel/watchdog: Add a function to obtain the watchdog_allowed_mask

Kai-Heng Feng Cc: Konrad Rzeszutek Wilk Cc: David Rientjes Cc: "Ravi V. Shankar" Cc: x...@kernel.org Cc: "David S. Miller" Cc: Benjamin Herrenschmidt Cc: sparcli...@vger.kernel.org Cc: linuxppc-...@lists.ozlabs.org Signed-off-by: Ricardo Neri --- include/linux/nmi.

[RFC PATCH v2 13/14] watchdog/hardlockup/hpet: Only enable the HPET watchdog via a boot parameter

edanne Cc: Kate Stewart Cc: "Rafael J. Wysocki" Cc: Mimi Zohar Cc: Jan Kiszka Cc: Nick Desaulniers Cc: Masahiro Yamada Cc: Nayna Jain Cc: "Ravi V. Shankar" Cc: x...@kernel.org Signed-off-by: Ricardo Neri -- checkpatch gives the following warning: CHECK: __setup

[RFC PATCH v2 12/14] x86/watchdog/hardlockup/hpet: Determine if HPET timer caused NMI

rgmann Cc: Philippe Ombredanne Cc: Kate Stewart Cc: "Rafael J. Wysocki" Cc: Mimi Zohar Cc: Jan Kiszka Cc: Nick Desaulniers Cc: Masahiro Yamada Cc: Nayna Jain Cc: "Ravi V. Shankar" Cc: x...@kernel.org Suggested-by: Andi Kleen Signed-off-by: Ricardo Neri --- arch/x86/i

[RFC PATCH v2 00/14] Implement an HPET-based hardlockup detector

(Thomas Gleixner). * Fixed unconditonal return NMI_HANDLED when the HPET timer is programmed for FSB/MSI delivery (Peter Zijlstra). References: [1]. https://lkml.org/lkml/2018/6/12/1027 Ricardo Neri (14): kernel/watchdog: Add a function to obtain the watchdog_allowed_mask watchdog

[RFC PATCH v2 14/14] x86/watchdog: Add a shim hardlockup detector

Jan Kiszka Cc: Nick Desaulniers Cc: Masahiro Yamada Cc: Nayna Jain Cc: "Ravi V. Shankar" Cc: x...@kernel.org Suggested-by: Nicholas Piggin Signed-off-by: Ricardo Neri --- arch/x86/Kconfig.debug | 4 ++ arch/x86/kernel/Makefile | 1 + arch/

[RFC PATCH v2 04/14] x86/hpet: Reserve timer for the HPET hardlockup detector

" Cc: Ashok Raj Cc: Andi Kleen Cc: Tony Luck Cc: Clemens Ladisch Cc: Arnd Bergmann Cc: Philippe Ombredanne Cc: Kate Stewart Cc: "Rafael J. Wysocki" Cc: "Ravi V. Shankar" Cc: x...@kernel.org Signed-off-by: Ricardo Neri --- arch/x86/include/asm/hpet.h | 3 +++ ar

Re: [PATCH] x86/umip: Print UMIP line only once

On Tue, Nov 27, 2018 at 09:59:36PM +0100, Borislav Petkov wrote: > From: Borislav Petkov > > ... instead of issuing it per CPU and flooding dmesg unnecessarily. > > Signed-off-by: Borislav Petkov > Cc: "H. Peter Anvin" > Cc: Ingo Molnar > Cc: Ricardo Neri

Re: [PATCH] x86/umip: Print UMIP line only once

On Tue, Nov 27, 2018 at 09:59:36PM +0100, Borislav Petkov wrote: > From: Borislav Petkov > > ... instead of issuing it per CPU and flooding dmesg unnecessarily. > > Signed-off-by: Borislav Petkov > Cc: "H. Peter Anvin" > Cc: Ingo Molnar > Cc: Ricardo Neri

Re: [PATCH 1/4] genirq: Provide basic NMI management for interrupt lines

On Thu, Aug 02, 2018 at 11:40:55AM +0200, Thomas Gleixner wrote: > On Thu, 2 Aug 2018, Marc Zyngier wrote: > > On Thu, 02 Aug 2018 07:55:49 +0100, > > Thomas Gleixner wrote: > > > > > > On Thu, 2 Aug 2018, Marc Zyngier wrote: > > > > > > > > If we need to distinguish between the two, then we

Re: [PATCH 1/4] genirq: Provide basic NMI management for interrupt lines

On Thu, Aug 02, 2018 at 11:40:55AM +0200, Thomas Gleixner wrote: > On Thu, 2 Aug 2018, Marc Zyngier wrote: > > On Thu, 02 Aug 2018 07:55:49 +0100, > > Thomas Gleixner wrote: > > > > > > On Thu, 2 Aug 2018, Marc Zyngier wrote: > > > > > > > > If we need to distinguish between the two, then we

Re: [PATCH 1/4] genirq: Provide basic NMI management for interrupt lines

On Wed, Aug 01, 2018 at 04:09:59PM +0100, Julien Thierry wrote: > >>+static bool irq_supports_nmi(struct irq_desc *desc) > >>+{ > >>+ struct irq_data *d = irq_desc_get_irq_data(desc); > >>+ > >>+#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY > >>+ /* Only IRQs directly managed by the root irqchip can be

Re: [PATCH 1/4] genirq: Provide basic NMI management for interrupt lines

On Wed, Aug 01, 2018 at 04:09:59PM +0100, Julien Thierry wrote: > >>+static bool irq_supports_nmi(struct irq_desc *desc) > >>+{ > >>+ struct irq_data *d = irq_desc_get_irq_data(desc); > >>+ > >>+#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY > >>+ /* Only IRQs directly managed by the root irqchip can be

Re: [PATCH 2/4] genirq: Provide NMI management for percpu_devid interrupts

On Tue, Jul 24, 2018 at 12:07:05PM +0100, Julien Thierry wrote: > Add support for percpu_devid interrupts treated as NMIs. > > Percpu_devid NMIs need to be setup/torn down on each CPU they target. > > The same restrictions as for global NMIs still apply for percpu_devid NMIs. > > Signed-off-by:

Re: [PATCH 2/4] genirq: Provide NMI management for percpu_devid interrupts

On Tue, Jul 24, 2018 at 12:07:05PM +0100, Julien Thierry wrote: > Add support for percpu_devid interrupts treated as NMIs. > > Percpu_devid NMIs need to be setup/torn down on each CPU they target. > > The same restrictions as for global NMIs still apply for percpu_devid NMIs. > > Signed-off-by:

Re: [PATCH 1/4] genirq: Provide basic NMI management for interrupt lines

On Tue, Jul 24, 2018 at 12:07:04PM +0100, Julien Thierry wrote: Hi Julien, Many thanks for your patchset and I apologize for the late reply. I tried to use your patches on my own use case and I have the following comments... > Add functionality to allocate interrupt lines that will deliver IRQs

Re: [PATCH 1/4] genirq: Provide basic NMI management for interrupt lines

On Tue, Jul 24, 2018 at 12:07:04PM +0100, Julien Thierry wrote: Hi Julien, Many thanks for your patchset and I apologize for the late reply. I tried to use your patches on my own use case and I have the following comments... > Add functionality to allocate interrupt lines that will deliver IRQs

Re: [tip:x86/mpx] x86/insn-eval: Add utility function to get segment descriptor

On Tue, Dec 05, 2017 at 10:29:33PM +0100, Borislav Petkov wrote: > On Tue, Dec 05, 2017 at 07:38:45PM +0100, Peter Zijlstra wrote: > > Sorry what? So either this code is broken because it has IRQs enabled, > > or its broken because its trying to acquire a mutex with IRQs disabled. > > Which is it?

Re: [tip:x86/mpx] x86/insn-eval: Add utility function to get segment descriptor

On Tue, Dec 05, 2017 at 10:29:33PM +0100, Borislav Petkov wrote: > On Tue, Dec 05, 2017 at 07:38:45PM +0100, Peter Zijlstra wrote: > > Sorry what? So either this code is broken because it has IRQs enabled, > > or its broken because its trying to acquire a mutex with IRQs disabled. > > Which is it?

Re: [tip:x86/mpx] x86/insn-eval: Add utility function to get segment descriptor

On Tue, Dec 05, 2017 at 07:14:56PM +0100, Borislav Petkov wrote: > > But, if other code is going to use those functions - and I believe > that's the idea - otherwise they wouldn't be in arch/x86/lib/ At the moment MPX and UMIP are using the insn-eval decoder to determine linear addresses.

Re: [tip:x86/mpx] x86/insn-eval: Add utility function to get segment descriptor

On Tue, Dec 05, 2017 at 07:14:56PM +0100, Borislav Petkov wrote: > > But, if other code is going to use those functions - and I believe > that's the idea - otherwise they wouldn't be in arch/x86/lib/ At the moment MPX and UMIP are using the insn-eval decoder to determine linear addresses.

Re: [PATCH] x86/umip: Fix insn_get_code_seg_params()'s return value

On Thu, Nov 23, 2017 at 10:19:51AM +0100, Borislav Petkov wrote: > From: Borislav Petkov > > In order to save on redundant structs definitions > insn_get_code_seg_params() was made to return two 4-bit values in a char > but clang complains: > > arch/x86/lib/insn-eval.c:780:10:

Re: [PATCH] x86/umip: Fix insn_get_code_seg_params()'s return value

On Thu, Nov 23, 2017 at 10:19:51AM +0100, Borislav Petkov wrote: > From: Borislav Petkov > > In order to save on redundant structs definitions > insn_get_code_seg_params() was made to return two 4-bit values in a char > but clang complains: > > arch/x86/lib/insn-eval.c:780:10: warning:

[tip:x86/urgent] x86/umip: Print a warning into the syslog if UMIP-protected instructions are used

Commit-ID: fd11a6496e12848d4eeb21029c2c288bbc638048 Gitweb: https://git.kernel.org/tip/fd11a6496e12848d4eeb21029c2c288bbc638048 Author: Ricardo Neri <ricardo.neri-calde...@linux.intel.com> AuthorDate: Mon, 20 Nov 2017 19:04:36 -0800 Committer: Ingo Molnar <mi...@kernel.org>

[tip:x86/urgent] x86/umip: Print a warning into the syslog if UMIP-protected instructions are used

Commit-ID: fd11a6496e12848d4eeb21029c2c288bbc638048 Gitweb: https://git.kernel.org/tip/fd11a6496e12848d4eeb21029c2c288bbc638048 Author: Ricardo Neri AuthorDate: Mon, 20 Nov 2017 19:04:36 -0800 Committer: Ingo Molnar CommitDate: Tue, 21 Nov 2017 08:13:43 +0100 x86/umip: Print a warning

[PATCH v3] x86/umip: Warn if UMIP-protected instructions are used

: Ravi V. Shankar <ravi.v.shan...@intel.com> Cc: x...@kernel.org Suggested-by: Linus Torvalds <torva...@linux-foundation.org> Signed-off-by: Ricardo Neri <ricardo.neri-calde...@linux.intel.com> --- Changes since V2: * Dropped patches 1, 2, and 3 as they were applied on the tip rep

[PATCH v3] x86/umip: Warn if UMIP-protected instructions are used

an existing call to the generic rate-limited pr_err() with the new umip_pr_err(). Cc: Andy Lutomirski Cc: H. Peter Anvin Cc: Borislav Petkov Cc: Tony Luck Cc: Paolo Bonzini Cc: Ravi V. Shankar Cc: x...@kernel.org Suggested-by: Linus Torvalds Signed-off-by: Ricardo Neri --- Changes since V2

Re: [RESEND PATCH v2 4/4] x86/umip: Warn if UMIP-protected instructions are used

On Tue, Nov 14, 2017 at 08:34:08AM +0100, Ingo Molnar wrote: > > * Ricardo Neri <ricardo.neri-calde...@linux.intel.com> wrote: > > > +const char * const umip_insns[5] = { > > + [UMIP_INST_SGDT] = "sgdt", > > + [UMIP_INST_SIDT]

Re: [RESEND PATCH v2 4/4] x86/umip: Warn if UMIP-protected instructions are used

On Tue, Nov 14, 2017 at 08:34:08AM +0100, Ingo Molnar wrote: > > * Ricardo Neri wrote: > > > +const char * const umip_insns[5] = { > > + [UMIP_INST_SGDT] = "sgdt", > > + [UMIP_INST_SIDT] = "sidt", > > + [UMIP_INST_SMSW] = "smsw&q

Re: [RESEND PATCH v2 3/4] x86/umip: Identify the str and sldt instructions

On Tue, Nov 14, 2017 at 08:21:57AM +0100, Ingo Molnar wrote: > > * Ricardo Neri <ricardo.neri-calde...@linux.intel.com> wrote: > > > The instructions STR and SLDT are not emulated in any case. Thus, it made > > sense to not implement functionality to identify them

Re: [RESEND PATCH v2 3/4] x86/umip: Identify the str and sldt instructions

On Tue, Nov 14, 2017 at 08:21:57AM +0100, Ingo Molnar wrote: > > * Ricardo Neri wrote: > > > The instructions STR and SLDT are not emulated in any case. Thus, it made > > sense to not implement functionality to identify them. However, a > > subsequent commit will intr

[tip:x86/urgent] x86/umip: Print a line in the boot log that UMIP has been enabled

Commit-ID: 770c77557757873808a474016a3cae4b37690cb2 Gitweb: https://git.kernel.org/tip/770c77557757873808a474016a3cae4b37690cb2 Author: Ricardo Neri <ricardo.neri-calde...@linux.intel.com> AuthorDate: Mon, 13 Nov 2017 22:29:43 -0800 Committer: Ingo Molnar <mi...@kernel.org>

[tip:x86/urgent] x86/umip: Print a line in the boot log that UMIP has been enabled

Commit-ID: 770c77557757873808a474016a3cae4b37690cb2 Gitweb: https://git.kernel.org/tip/770c77557757873808a474016a3cae4b37690cb2 Author: Ricardo Neri AuthorDate: Mon, 13 Nov 2017 22:29:43 -0800 Committer: Ingo Molnar CommitDate: Tue, 14 Nov 2017 08:38:09 +0100 x86/umip: Print a line

[tip:x86/urgent] x86/umip: Select X86_INTEL_UMIP by default

Commit-ID: 796ebc81b9931bfa293b4ca38ae28c21a363f4d0 Gitweb: https://git.kernel.org/tip/796ebc81b9931bfa293b4ca38ae28c21a363f4d0 Author: Ricardo Neri <ricardo.neri-calde...@linux.intel.com> AuthorDate: Mon, 13 Nov 2017 22:29:42 -0800 Committer: Ingo Molnar <mi...@kernel.org>

[tip:x86/urgent] x86/umip: Select X86_INTEL_UMIP by default

Commit-ID: 796ebc81b9931bfa293b4ca38ae28c21a363f4d0 Gitweb: https://git.kernel.org/tip/796ebc81b9931bfa293b4ca38ae28c21a363f4d0 Author: Ricardo Neri AuthorDate: Mon, 13 Nov 2017 22:29:42 -0800 Committer: Ingo Molnar CommitDate: Tue, 14 Nov 2017 08:38:08 +0100 x86/umip: Select

[tip:x86/urgent] x86/umip: Identify the STR and SLDT instructions

Commit-ID: 6e2a3064d6a86094fecc20cd430fd96aaa801687 Gitweb: https://git.kernel.org/tip/6e2a3064d6a86094fecc20cd430fd96aaa801687 Author: Ricardo Neri <ricardo.neri-calde...@linux.intel.com> AuthorDate: Mon, 13 Nov 2017 22:29:44 -0800 Committer: Ingo Molnar <mi...@kernel.org>

[tip:x86/urgent] x86/umip: Identify the STR and SLDT instructions

Commit-ID: 6e2a3064d6a86094fecc20cd430fd96aaa801687 Gitweb: https://git.kernel.org/tip/6e2a3064d6a86094fecc20cd430fd96aaa801687 Author: Ricardo Neri AuthorDate: Mon, 13 Nov 2017 22:29:44 -0800 Committer: Ingo Molnar CommitDate: Tue, 14 Nov 2017 08:38:09 +0100 x86/umip: Identify

[RESEND PATCH v2 2/4] x86/umip: Inform that UMIP has been enabled

<ravi.v.shan...@intel.com> Cc: x...@kernel.org Suggested-by: Ingo Molnar <mi...@kernel.org> Signed-off-by: Ricardo Neri <ricardo.neri-calde...@linux.intel.com> --- arch/x86/kernel/cpu/common.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/x86/kernel/cpu/common.c b/arc

[RESEND PATCH v2 2/4] x86/umip: Inform that UMIP has been enabled

Let us have an indication that this feature has been enabled. Cc: Andy Lutomirski Cc: H. Peter Anvin Cc: Borislav Petkov Cc: Tony Luck Cc: Paolo Bonzini Cc: Ravi V. Shankar Cc: x...@kernel.org Suggested-by: Ingo Molnar Signed-off-by: Ricardo Neri --- arch/x86/kernel/cpu/common.c | 2

[RESEND PATCH v2 4/4] x86/umip: Warn if UMIP-protected instructions are used

t;ravi.v.shan...@intel.com> Cc: x...@kernel.org Suggested-by: Linus Torvalds <torva...@linux-foundation.org> Signed-off-by: Ricardo Neri <ricardo.neri-calde...@linux.intel.com> --- arch/x86/kernel/umip.c | 65 +- 1 file changed, 59 inse

[RESEND PATCH v2 3/4] x86/umip: Identify the str and sldt instructions

Lutomirski <l...@kernel.org> Cc: H. Peter Anvin <h...@zytor.com> Cc: Borislav Petkov <b...@suse.de> Cc: Tony Luck <tony.l...@intel.com> Cc: Paolo Bonzini <pbonz...@redhat.com> Cc: Ravi V. Shankar <ravi.v.shan...@intel.com> Cc: x...@kernel.org Signed-off-

[RESEND PATCH v2 3/4] x86/umip: Identify the str and sldt instructions

Lutomirski Cc: H. Peter Anvin Cc: Borislav Petkov Cc: Tony Luck Cc: Paolo Bonzini Cc: Ravi V. Shankar Cc: x...@kernel.org Signed-off-by: Ricardo Neri --- This patch also corrects the #define of SMSW. This change does not have a functional impact as it is only used as an identifier. --- arch/x86

[RESEND PATCH v2 4/4] x86/umip: Warn if UMIP-protected instructions are used

() in order to have it printing at the same rate and log level. Cc: Andy Lutomirski Cc: H. Peter Anvin Cc: Borislav Petkov Cc: Tony Luck Cc: Paolo Bonzini Cc: Ravi V. Shankar Cc: x...@kernel.org Suggested-by: Linus Torvalds Signed-off-by: Ricardo Neri --- arch/x86/kernel/umip.c | 65

[RESEND PATCH v2 0/4] x86: Tweaks for UMIP

the update to the existing rate-limited pr_err(). Ricardo Neri (4): x86/umip: Select X86_INTEL_UMIP by default x86/umip: Inform that UMIP has been enabled x86/umip: Identify the str and sldt instructions x86/umip: Warn if UMIP-protected instructions are used arch/x86/Kconfig | 10

[RESEND PATCH v2 1/4] x86/umip: Select X86_INTEL_UMIP by default

: x...@kernel.org Suggested-by: Ingo Molnar <mi...@kernel.org> Signed-off-by: Ricardo Neri <ricardo.neri-calde...@linux.intel.com> --- arch/x86/Kconfig | 10 -- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index f08977d..a524

[RESEND PATCH v2 0/4] x86: Tweaks for UMIP

the update to the existing rate-limited pr_err(). Ricardo Neri (4): x86/umip: Select X86_INTEL_UMIP by default x86/umip: Inform that UMIP has been enabled x86/umip: Identify the str and sldt instructions x86/umip: Warn if UMIP-protected instructions are used arch/x86/Kconfig | 10

[RESEND PATCH v2 1/4] x86/umip: Select X86_INTEL_UMIP by default

the instructions protected by UMIP. Cc: Andy Lutomirski Cc: H. Peter Anvin Cc: Borislav Petkov Cc: Tony Luck Cc: Paolo Bonzini Cc: Ravi V. Shankar Cc: x...@kernel.org Suggested-by: Ingo Molnar Signed-off-by: Ricardo Neri --- arch/x86/Kconfig | 10 -- 1 file changed, 8 insertions(+), 2

Re: [PATCH 3/4] x86/umip: Identify the str and sldt instructions

On Mon, Nov 13, 2017 at 09:12:03AM +0100, Ingo Molnar wrote: > > * Ricardo Neri <ricardo.neri-calde...@linux.intel.com> wrote: > > > The instructions str and sldt are not emulated in any case. Thus, it made > > sense to not implement functionality to identify them

Re: [PATCH 3/4] x86/umip: Identify the str and sldt instructions

On Mon, Nov 13, 2017 at 09:12:03AM +0100, Ingo Molnar wrote: > > * Ricardo Neri wrote: > > > The instructions str and sldt are not emulated in any case. Thus, it made > > sense to not implement functionality to identify them. However, a > > subsequent commit will intr

[PATCH 1/4] x86/umip: Select X86_INTEL_UMIP by default

: x...@kernel.org Suggested-by: Ingo Molnar <mi...@kernel.org> Signed-off-by: Ricardo Neri <ricardo.neri-calde...@linux.intel.com> --- arch/x86/Kconfig | 10 -- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index f08977d..a524

[PATCH 1/4] x86/umip: Select X86_INTEL_UMIP by default

the instructions protected by UMIP. Cc: Andy Lutomirski Cc: H. Peter Anvin Cc: Borislav Petkov Cc: Tony Luck Cc: Paolo Bonzini Cc: Ravi V. Shankar Cc: x...@kernel.org Suggested-by: Ingo Molnar Signed-off-by: Ricardo Neri --- arch/x86/Kconfig | 10 -- 1 file changed, 8 insertions(+), 2

[PATCH 2/4] x86/umip: Inform that UMIP has been enabled

<ravi.v.shan...@intel.com> Cc: x...@kernel.org Suggested-by: Ingo Molnar <mi...@kernel.org> Signed-off-by: Ricardo Neri <ricardo.neri-calde...@linux.intel.com> --- arch/x86/kernel/cpu/common.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/x86/kernel/cpu/common.c b/arc

[PATCH 2/4] x86/umip: Inform that UMIP has been enabled

Let us have an indication that this feature has been enabled. Cc: Andy Lutomirski Cc: H. Peter Anvin Cc: Borislav Petkov Cc: Tony Luck Cc: Paolo Bonzini Cc: Ravi V. Shankar Cc: x...@kernel.org Suggested-by: Ingo Molnar Signed-off-by: Ricardo Neri --- arch/x86/kernel/cpu/common.c | 2

[PATCH 4/4] x86/umip: Warn if UMIP-protected instructions are used

Cc: Borislav Petkov <b...@suse.de> Cc: Tony Luck <tony.l...@intel.com> Cc: Paolo Bonzini <pbonz...@redhat.com> Cc: Ravi V. Shankar <ravi.v.shan...@intel.com> Cc: x...@kernel.org Suggested-by: Linus Torvalds <torva...@linux-foundation.org> Signed-off-by: Ricardo N

[PATCH 0/4] x86: Tweaks for UMIP

and BR, Ricardo [1]. https://lkml.org/lkml/2017/10/27/699 [2]. https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1523438.html [3]. https://lkml.org/lkml/2017/11/8/238 [4]. https://lkml.org/lkml/2017/11/8/593 Ricardo Neri (4): x86/umip: Select X86_INTEL_UMIP by default x86/umip

[PATCH 3/4] x86/umip: Identify the str and sldt instructions

Lutomirski <l...@kernel.org> Cc: H. Peter Anvin <h...@zytor.com> Cc: Borislav Petkov <b...@suse.de> Cc: Tony Luck <tony.l...@intel.com> Cc: Paolo Bonzini <pbonz...@redhat.com> Cc: Ravi V. Shankar <ravi.v.shan...@intel.com> Cc: x...@kernel.org Signed-off-

[PATCH 0/4] x86: Tweaks for UMIP

and BR, Ricardo [1]. https://lkml.org/lkml/2017/10/27/699 [2]. https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1523438.html [3]. https://lkml.org/lkml/2017/11/8/238 [4]. https://lkml.org/lkml/2017/11/8/593 Ricardo Neri (4): x86/umip: Select X86_INTEL_UMIP by default x86/umip

[PATCH 3/4] x86/umip: Identify the str and sldt instructions

Lutomirski Cc: H. Peter Anvin Cc: Borislav Petkov Cc: Tony Luck Cc: Paolo Bonzini Cc: Ravi V. Shankar Cc: x...@kernel.org Signed-off-by: Ricardo Neri --- This patch also corrects the #define of SMSW. This change does not have a functional impact as it is only used as an identifier. --- arch/x86

[PATCH 4/4] x86/umip: Warn if UMIP-protected instructions are used

Bonzini Cc: Ravi V. Shankar Cc: x...@kernel.org Suggested-by: Linus Torvalds Signed-off-by: Ricardo Neri --- arch/x86/kernel/umip.c | 65 +- 1 file changed, 59 insertions(+), 6 deletions(-) diff --git a/arch/x86/kernel/umip.c b/arch/x86/kernel

Re: [tip:x86/asm] x86/umip: Add emulation code for UMIP instructions

On Wed, Nov 08, 2017 at 06:14:12PM +0100, Paolo Bonzini wrote: > On 08/11/2017 18:09, Denys Vlasenko wrote: > > On 11/08/2017 05:57 PM, Linus Torvalds wrote: > >> On Wed, Nov 8, 2017 at 8:53 AM, Denys Vlasenko > >> wrote: > >>> We can postpone enabling UMIP by default by a

Re: [tip:x86/asm] x86/umip: Add emulation code for UMIP instructions

On Wed, Nov 08, 2017 at 06:14:12PM +0100, Paolo Bonzini wrote: > On 08/11/2017 18:09, Denys Vlasenko wrote: > > On 11/08/2017 05:57 PM, Linus Torvalds wrote: > >> On Wed, Nov 8, 2017 at 8:53 AM, Denys Vlasenko > >> wrote: > >>> We can postpone enabling UMIP by default by a year or so. > >>> By

Re: [tip:x86/asm] x86/umip: Add emulation code for UMIP instructions

On Wed, Nov 08, 2017 at 08:34:45AM -0800, Linus Torvalds wrote: > On Wed, Nov 8, 2017 at 8:14 AM, Denys Vlasenko wrote: > > > > Can we avoid maintain emulation of these isns, by asking Wine to remove > > their use instead? > > If we ask the Wine people to remove the

Re: [tip:x86/asm] x86/umip: Add emulation code for UMIP instructions

On Wed, Nov 08, 2017 at 08:34:45AM -0800, Linus Torvalds wrote: > On Wed, Nov 8, 2017 at 8:14 AM, Denys Vlasenko wrote: > > > > Can we avoid maintain emulation of these isns, by asking Wine to remove > > their use instead? > > If we ask the Wine people to remove the instruction use, that may

Re: [tip:x86/asm] x86/umip: Add emulation code for UMIP instructions

On Wed, Nov 08, 2017 at 05:14:33PM +0100, Denys Vlasenko wrote: > On 11/08/2017 12:00 PM, tip-bot for Ricardo Neri wrote: > >Commit-ID: 1e5db223696afa55e6a038fac638f759e1fdcc01 > >Gitweb: > >https://git.kernel.org/tip/1e5db223696afa55e6a038fac638f759e1fdcc01 > &

Re: [tip:x86/asm] x86/umip: Add emulation code for UMIP instructions

On Wed, Nov 08, 2017 at 05:14:33PM +0100, Denys Vlasenko wrote: > On 11/08/2017 12:00 PM, tip-bot for Ricardo Neri wrote: > >Commit-ID: 1e5db223696afa55e6a038fac638f759e1fdcc01 > >Gitweb: > >https://git.kernel.org/tip/1e5db223696afa55e6a038fac638f759e1fdcc01 > &

Re: [PATCH v11 09/12] x86: Enable User-Mode Instruction Prevention at runtime

On Wed, Nov 08, 2017 at 10:52:59AM +0100, Ingo Molnar wrote: > > * Ricardo Neri <ricardo.neri-calde...@linux.intel.com> wrote: > > > User-Mode Instruction Prevention (UMIP) is enabled by setting/clearing a > > bit in %cr4. > > > > It makes sense to

Re: [PATCH v11 09/12] x86: Enable User-Mode Instruction Prevention at runtime

On Wed, Nov 08, 2017 at 10:52:59AM +0100, Ingo Molnar wrote: > > * Ricardo Neri wrote: > > > User-Mode Instruction Prevention (UMIP) is enabled by setting/clearing a > > bit in %cr4. > > > > It makes sense to enable UMIP at some point while booting, before u

Re: [PATCH v11 00/12] x86: Enable User-Mode Instruction Prevention

On Wed, Nov 08, 2017 at 11:00:13AM +0100, Thomas Gleixner wrote: > On Sun, 5 Nov 2017, Ricardo Neri wrote: > > Changes since V10: > > *Patch 1 ("x86/insn-eval: Extend get_seg_base_addr() to also obtain segment > > limit") of v10 has been dropped has it

Re: [PATCH v11 00/12] x86: Enable User-Mode Instruction Prevention

On Wed, Nov 08, 2017 at 11:00:13AM +0100, Thomas Gleixner wrote: > On Sun, 5 Nov 2017, Ricardo Neri wrote: > > Changes since V10: > > *Patch 1 ("x86/insn-eval: Extend get_seg_base_addr() to also obtain segment > > limit") of v10 has been dropped has it

[tip:x86/asm] selftests/x86: Add tests for the STR and SLDT instructions

Commit-ID: a9e017d5619eb371460c8e516f4684def62bef3a Gitweb: https://git.kernel.org/tip/a9e017d5619eb371460c8e516f4684def62bef3a Author: Ricardo Neri <ricardo.neri-calde...@linux.intel.com> AuthorDate: Sun, 5 Nov 2017 18:27:57 -0800 Committer: Ingo Molnar <mi...@kernel.org>

[tip:x86/asm] selftests/x86: Add tests for the STR and SLDT instructions

Commit-ID: a9e017d5619eb371460c8e516f4684def62bef3a Gitweb: https://git.kernel.org/tip/a9e017d5619eb371460c8e516f4684def62bef3a Author: Ricardo Neri AuthorDate: Sun, 5 Nov 2017 18:27:57 -0800 Committer: Ingo Molnar CommitDate: Wed, 8 Nov 2017 11:16:25 +0100 selftests/x86: Add tests

[tip:x86/asm] selftests/x86: Add tests for User-Mode Instruction Prevention

Commit-ID: 9390afebe1d3f5a0be18b1afdd0ce09d67cebf9e Gitweb: https://git.kernel.org/tip/9390afebe1d3f5a0be18b1afdd0ce09d67cebf9e Author: Ricardo Neri <ricardo.neri-calde...@linux.intel.com> AuthorDate: Sun, 5 Nov 2017 18:27:56 -0800 Committer: Ingo Molnar <mi...@kernel.org>

[tip:x86/asm] selftests/x86: Add tests for User-Mode Instruction Prevention

Commit-ID: 9390afebe1d3f5a0be18b1afdd0ce09d67cebf9e Gitweb: https://git.kernel.org/tip/9390afebe1d3f5a0be18b1afdd0ce09d67cebf9e Author: Ricardo Neri AuthorDate: Sun, 5 Nov 2017 18:27:56 -0800 Committer: Ingo Molnar CommitDate: Wed, 8 Nov 2017 11:16:24 +0100 selftests/x86: Add tests

[tip:x86/asm] x86/umip: Add emulation code for UMIP instructions

Commit-ID: 1e5db223696afa55e6a038fac638f759e1fdcc01 Gitweb: https://git.kernel.org/tip/1e5db223696afa55e6a038fac638f759e1fdcc01 Author: Ricardo Neri <ricardo.neri-calde...@linux.intel.com> AuthorDate: Sun, 5 Nov 2017 18:27:52 -0800 Committer: Ingo Molnar <mi...@kernel.org>

[tip:x86/asm] x86/umip: Add emulation code for UMIP instructions

Commit-ID: 1e5db223696afa55e6a038fac638f759e1fdcc01 Gitweb: https://git.kernel.org/tip/1e5db223696afa55e6a038fac638f759e1fdcc01 Author: Ricardo Neri AuthorDate: Sun, 5 Nov 2017 18:27:52 -0800 Committer: Ingo Molnar CommitDate: Wed, 8 Nov 2017 11:16:22 +0100 x86/umip: Add emulation

[tip:x86/asm] x86/umip: Enable User-Mode Instruction Prevention at runtime

Commit-ID: aa35f896979d9610bb11df485cf7bb6ca241febb Gitweb: https://git.kernel.org/tip/aa35f896979d9610bb11df485cf7bb6ca241febb Author: Ricardo Neri <ricardo.neri-calde...@linux.intel.com> AuthorDate: Sun, 5 Nov 2017 18:27:54 -0800 Committer: Ingo Molnar <mi...@kernel.org>

[tip:x86/asm] x86/traps: Fix up general protection faults caused by UMIP

Commit-ID: 6fc9dc81bff0ea461db534e2672acfdaf76f3e4e Gitweb: https://git.kernel.org/tip/6fc9dc81bff0ea461db534e2672acfdaf76f3e4e Author: Ricardo Neri <ricardo.neri-calde...@linux.intel.com> AuthorDate: Sun, 5 Nov 2017 18:27:55 -0800 Committer: Ingo Molnar <mi...@kernel.org>

[tip:x86/asm] x86/umip: Enable User-Mode Instruction Prevention at runtime

Commit-ID: aa35f896979d9610bb11df485cf7bb6ca241febb Gitweb: https://git.kernel.org/tip/aa35f896979d9610bb11df485cf7bb6ca241febb Author: Ricardo Neri AuthorDate: Sun, 5 Nov 2017 18:27:54 -0800 Committer: Ingo Molnar CommitDate: Wed, 8 Nov 2017 11:16:23 +0100 x86/umip: Enable User-Mode

[tip:x86/asm] x86/traps: Fix up general protection faults caused by UMIP

Commit-ID: 6fc9dc81bff0ea461db534e2672acfdaf76f3e4e Gitweb: https://git.kernel.org/tip/6fc9dc81bff0ea461db534e2672acfdaf76f3e4e Author: Ricardo Neri AuthorDate: Sun, 5 Nov 2017 18:27:55 -0800 Committer: Ingo Molnar CommitDate: Wed, 8 Nov 2017 11:16:24 +0100 x86/traps: Fix up general

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