Re: IOMMU vs Ryzen embedded EMMC controller

2019-09-27 Thread Shah, Nehal-bakulchandra
Hi Kurf On 9/27/2019 3:17 PM, Kurt Garloff wrote: > Hi Jörg, > > On 25/09/2019 17:42, Joerg Roedel wrote: >> On Wed, Sep 25, 2019 at 05:27:32PM +0200, Jiri >> Kosina wrote: >>> On Sat, 21 Sep 2019, Kurt Garloff wrote: [12916.740274] mmc0: sdhci:

Re: [PATCH v17] i2c: Add drivers for the AMD PCIe MP2 I2C controller

2019-03-21 Thread Shah, Nehal-bakulchandra
Hi Elie, On 3/5/2019 8:43 PM, Elie Morisse wrote: > MP2 controllers have two separate busses, so may accommodate up to two I2C > adapters. Those adapters are listed in the ACPI namespace with the > "AMDI0011" HID, and probed by a platform driver. > > Communication with the MP2 takes place

Re: [PATCH v16] i2c: Add drivers for the AMD PCIe MP2 I2C controller

2019-02-28 Thread Shah, Nehal-bakulchandra
Hi Elie, On 2/26/2019 10:20 PM, Wolfram Sang wrote: > Hi Elie, > >> My apologies for the time it took to apply those changes. > > No worries. I am super happy that you are still around and willing to > continue the work! > >> I will also start working on an alternate (v17?) version with only

Re: [PATCH v15] i2c: Add drivers for the AMD PCIe MP2 I2C controller

2019-02-07 Thread Shah, Nehal-bakulchandra
Hi Bjorn and Wolfram, On 2/7/2019 9:23 PM, Wolfram Sang wrote: > Hi Bjorn, > > thanks a lot for your additional information! > >> IMHO the split into two drivers is a bit of a mess and doesn't really >> correspond with the hardware, as I mentioned at [1]. The PCI device >> is the real

Re: [PATCH v6 09/11] mmc: sdhci-acpi: Make PCI dependency explicit

2019-01-07 Thread Shah, Nehal-bakulchandra
Hi On 1/7/2019 6:12 PM, Adrian Hunter wrote: > On 7/01/19 1:17 PM, Rafael J. Wysocki wrote: >> On Sat, Jan 5, 2019 at 11:06 AM Sinan Kaya wrote: >>> >>> After 'commit 5d32a66541c4 ("PCI/ACPI: Allow ACPI to be built without >>> CONFIG_PCI set")' dependencies on CONFIG_PCI that previously were >>>

Re: [PATCH v15] i2c: Add drivers for the AMD PCIe MP2 I2C controller

2018-12-31 Thread Shah, Nehal-bakulchandra
Hi Elie, On 12/27/2018 4:52 AM, Elie Morisse wrote: > MP2 controllers have two separate busses, so may accommodate up to two I2C > adapters. Those adapters are listed in the ACPI namespace with the > "AMDI0011" HID, and probed by a platform driver. > > Communication with the MP2 takes place

Re: [PATCH v10] i2c: Add drivers for the AMD PCIe MP2 I2C controller

2018-12-03 Thread Shah, Nehal-bakulchandra
driver be owner. > Btw I'll submit a v11 version of the patch which definitely fixes the > timeouts on Lenovo Ideapad 530s soon (already fixed in > https://github.com/Syniurge/i2c-amd-mp2). > > Elie Just received will have a look :) thanks for the same. Nehal > Le lun. 26 nov. 2018 à

Re: [PATCH v10] i2c: Add drivers for the AMD PCIe MP2 I2C controller

2018-12-03 Thread Shah, Nehal-bakulchandra
driver be owner. > Btw I'll submit a v11 version of the patch which definitely fixes the > timeouts on Lenovo Ideapad 530s soon (already fixed in > https://github.com/Syniurge/i2c-amd-mp2). > > Elie Just received will have a look :) thanks for the same. Nehal > Le lun. 26 nov. 2018 à

Re: [PATCH v10] i2c: Add drivers for the AMD PCIe MP2 I2C controller

2018-11-26 Thread Shah, Nehal-bakulchandra
Hi Elie Morisse, On 11/14/2018 10:00 PM, Elie Morisse wrote: > I2C communication takes place through iomapped registers, or through DMA > for more than 32 bytes transfers. > > MP2 controllers have two separate buses, so may accommodate up to two I2C > adapters. Those adapters are listed in the

Re: [PATCH v10] i2c: Add drivers for the AMD PCIe MP2 I2C controller

2018-11-26 Thread Shah, Nehal-bakulchandra
Hi Elie Morisse, On 11/14/2018 10:00 PM, Elie Morisse wrote: > I2C communication takes place through iomapped registers, or through DMA > for more than 32 bytes transfers. > > MP2 controllers have two separate buses, so may accommodate up to two I2C > adapters. Those adapters are listed in the

Re: [PATCH] pinctrl/amd: poll InterruptEnable bits in enable_irq

2018-03-27 Thread Shah, Nehal-bakulchandra
Hi On 3/26/2018 2:42 PM, Linus Walleij wrote: > On Mon, Mar 12, 2018 at 5:45 PM, Daniel Kurtz wrote: > >> In certain cases interrupt enablement will be delayed relative to when >> the InterruptEnable bits are written. One example of this is when >> a GPIO's "debounce"

Re: [PATCH] pinctrl/amd: poll InterruptEnable bits in enable_irq

2018-03-27 Thread Shah, Nehal-bakulchandra
Hi On 3/26/2018 2:42 PM, Linus Walleij wrote: > On Mon, Mar 12, 2018 at 5:45 PM, Daniel Kurtz wrote: > >> In certain cases interrupt enablement will be delayed relative to when >> the InterruptEnable bits are written. One example of this is when >> a GPIO's "debounce" logice is first enabled.

RE: [PATCH] pinctrl/amd: Use regular interrupt instead of chained

2017-05-26 Thread Shah, Nehal-bakulchandra
Hi Thomas, Thanks for the prompt reply. Agree on points. we will validate at our end and shall provide the update. Nehal -Original Message- From: Thomas Gleixner [mailto:t...@linutronix.de] Sent: Friday, May 26, 2017 12:19 PM To: Shah, Nehal-bakulchandra <nehal-bakulchandr

RE: [PATCH] pinctrl/amd: Use regular interrupt instead of chained

2017-05-26 Thread Shah, Nehal-bakulchandra
Hi Thomas, Thanks for the prompt reply. Agree on points. we will validate at our end and shall provide the update. Nehal -Original Message- From: Thomas Gleixner [mailto:t...@linutronix.de] Sent: Friday, May 26, 2017 12:19 PM To: Shah, Nehal-bakulchandra Cc: LKML ; Linus Walleij

RE: [PATCH] pinctrl/amd: Use regular interrupt instead of chained

2017-05-25 Thread Shah, Nehal-bakulchandra
Hi Thomas, Thanks for the patch. However, we have received this issue from multiple people and different disro but it occurs only on Gigabyte hardware. With reference AM4 ryzen board we are not facing this issue. We are in discussion with gigabyte to check the BIOS part. Once we have clarity

RE: [PATCH] pinctrl/amd: Use regular interrupt instead of chained

2017-05-25 Thread Shah, Nehal-bakulchandra
Hi Thomas, Thanks for the patch. However, we have received this issue from multiple people and different disro but it occurs only on Gigabyte hardware. With reference AM4 ryzen board we are not facing this issue. We are in discussion with gigabyte to check the BIOS part. Once we have clarity

Kernel without RTC

2017-03-06 Thread Shah, Nehal-bakulchandra
Hi, Currently we are having hardware which does not have RTC. It is single processor system. However it does have TSC timer. Now, how to use scheduler with only TSC as current kernel scheduler leverage the RTC for scheduling? I had seen one old patch

Kernel without RTC

2017-03-06 Thread Shah, Nehal-bakulchandra
Hi, Currently we are having hardware which does not have RTC. It is single processor system. However it does have TSC timer. Now, how to use scheduler with only TSC as current kernel scheduler leverage the RTC for scheduling? I had seen one old patch

RE: [PATCH] i2c: designware: Fix regression when dynamic TAR update is disabled

2017-02-12 Thread Shah, Nehal-bakulchandra
mika.westerb...@linux.intel.com; andriy.shevche...@linux.intel.com; Shah, Nehal-bakulchandra <nehal-bakulchandra.s...@amd.com> Cc: w...@the-dreams.de; linux-kernel@vger.kernel.org; linux-...@vger.kernel.org; S-k, Shyam-sundar <shyam-sundar@amd.com> Subject: Re: [PATCH] i2c: designware: Fix

RE: [PATCH] i2c: designware: Fix regression when dynamic TAR update is disabled

2017-02-12 Thread Shah, Nehal-bakulchandra
, Nehal-bakulchandra Cc: w...@the-dreams.de; linux-kernel@vger.kernel.org; linux-...@vger.kernel.org; S-k, Shyam-sundar Subject: Re: [PATCH] i2c: designware: Fix regression when dynamic TAR update is disabled On 10.02.2017 08:38, Suravee Suthikulpanit wrote: > At this points, my understand

[PATCH] i2c: designware: Fix regression when dynamic TAR update is disabled

2017-02-09 Thread Shah Nehal-Bakulchandra
t's trying to detect dynamic TAR update.The original value of DW_IC_CON_10BITADDR_MASTER bit should be restored. Signed-off-by: Shah Nehal-Bakulchandra <nehal-bakulchandra.s...@amd.com> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> --- drivers/i2c/busses/i2c

[PATCH] i2c: designware: Fix regression when dynamic TAR update is disabled

2017-02-09 Thread Shah Nehal-Bakulchandra
t's trying to detect dynamic TAR update.The original value of DW_IC_CON_10BITADDR_MASTER bit should be restored. Signed-off-by: Shah Nehal-Bakulchandra Signed-off-by: Suravee Suthikulpanit --- drivers/i2c/busses/i2c-designware-core.c | 5 + 1 file changed, 5 insertions(+) diff --git a/d

RE: [PATCH] pinctrl: amd: fix compilation warning

2017-01-03 Thread Shah, Nehal-bakulchandra
all...@linaro.org>; S-k, Shyam-sundar <shyam-sundar@amd.com>; Shah, Nehal-bakulchandra <nehal-bakulchandra.s...@amd.com> Subject: [PATCH] pinctrl: amd: fix compilation warning 3bfd44306c65 ("pinctrl: amd: Add support for additional GPIO") created the following warning: d

RE: [PATCH] pinctrl: amd: fix compilation warning

2017-01-03 Thread Shah, Nehal-bakulchandra
; Shah, Nehal-bakulchandra Subject: [PATCH] pinctrl: amd: fix compilation warning 3bfd44306c65 ("pinctrl: amd: Add support for additional GPIO") created the following warning: drivers/pinctrl/pinctrl-amd.c: In function 'amd_gpio_dbg_show': drivers/pinctrl/pinctrl-amd.c:210:3: warning

RE: ATA failure regression

2016-09-27 Thread Shah, Nehal-bakulchandra
Hi Can someone please help me to debug this issue? Regards Nehal -Original Message- From: Shah, Nehal-bakulchandra Sent: Monday, September 26, 2016 3:45 PM To: 'Bharat Kumar Gogada' <bharat.kumar.gog...@xilinx.com> Cc: Deucher, Alexander <alexander.deuc...@amd.co

RE: ATA failure regression

2016-09-27 Thread Shah, Nehal-bakulchandra
Hi Can someone please help me to debug this issue? Regards Nehal -Original Message- From: Shah, Nehal-bakulchandra Sent: Monday, September 26, 2016 3:45 PM To: 'Bharat Kumar Gogada' Cc: Deucher, Alexander ; linux-...@vger.kernel.org; hol...@ahsoftware.de; t...@kernel.org; linux

RE: ATA failure regression

2016-09-23 Thread Shah, Nehal-bakulchandra
Hi All, Resending this wider audience Currently I am working on AMD future platform. I am hitting the same bug of ATA Failure Regression reported in past. (https://patchwork.kernel.org/patch/6875661/) or http://lkml.iu.edu/hypermail/linux/kernel/1507.3/01961.html I am newbie to this and

RE: ATA failure regression

2016-09-23 Thread Shah, Nehal-bakulchandra
Hi All, Resending this wider audience Currently I am working on AMD future platform. I am hitting the same bug of ATA Failure Regression reported in past. (https://patchwork.kernel.org/patch/6875661/) or http://lkml.iu.edu/hypermail/linux/kernel/1507.3/01961.html I am newbie to this and

ATA failure regression

2016-09-22 Thread Shah, Nehal-bakulchandra
Hi Jiang, Currently I am working on AMD future platform. I am hitting the same bug of ATA Failure Regression reported in past. (https://patchwork.kernel.org/patch/6875661/) or http://lkml.iu.edu/hypermail/linux/kernel/1507.3/01961.html I am newbie to this and because of this Ubuntu 16.04 is

ATA failure regression

2016-09-22 Thread Shah, Nehal-bakulchandra
Hi Jiang, Currently I am working on AMD future platform. I am hitting the same bug of ATA Failure Regression reported in past. (https://patchwork.kernel.org/patch/6875661/) or http://lkml.iu.edu/hypermail/linux/kernel/1507.3/01961.html I am newbie to this and because of this Ubuntu 16.04 is

ACPI/APD Making Module

2016-09-11 Thread Shah, Nehal-bakulchandra
Hi, Current implementation of acpi_apd.c makes AMD I2C,GPIO and UART from acpi devices to platform devices. This is done as part of boot sequence. For some reason i would like to make it kernel module. The current implementation calls acpi_apd_create_device as part of attach callback. Now this

ACPI/APD Making Module

2016-09-11 Thread Shah, Nehal-bakulchandra
Hi, Current implementation of acpi_apd.c makes AMD I2C,GPIO and UART from acpi devices to platform devices. This is done as part of boot sequence. For some reason i would like to make it kernel module. The current implementation calls acpi_apd_create_device as part of attach callback. Now this