These add device tree entry for qspi controller driver on dra7-evm.
Signed-off-by: Sourav Poddar
---
Depends on sricharan's irq crossbar.
arch/arm/boot/dts/dra7-evm.dts | 80
arch/arm/boot/dts/dra7.dtsi| 14 +++
2 files changed, 94
These add device tree entry for qspi controller driver on dra7-evm.
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
Depends on sricharan's irq crossbar.
arch/arm/boot/dts/dra7-evm.dts | 80
arch/arm/boot/dts/dra7.dtsi| 14 +++
2 files
This patch adds qspi nodes for am43xx SOC devices.
Signed-off-by: Sourav Poddar
---
Note,
checpatch gives 1 warning on flash compatible string
"mx66l51235l". This flash is supported in m25p80 driver and
the driver is used for other flash devices also. Hence, each
flash
This patch adds qspi nodes for am43xx SOC devices.
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
Note,
checpatch gives 1 warning on flash compatible string
mx66l51235l. This flash is supported in m25p80 driver and
the driver is used for other flash devices also. Hence, each
flash
On Monday 18 November 2013 11:02 PM, Lee Jones wrote:
On Mon, 18 Nov 2013, Mark Brown wrote:
On Mon, Nov 18, 2013 at 04:02:26PM +, Lee Jones wrote:
On Mon, 18 Nov 2013, Mark Brown wrote:
Like I say I'm suggesting that the bit of the code that understands the
flash chip is separate to the
On Monday 18 November 2013 11:02 PM, Lee Jones wrote:
On Mon, 18 Nov 2013, Mark Brown wrote:
On Mon, Nov 18, 2013 at 04:02:26PM +, Lee Jones wrote:
On Mon, 18 Nov 2013, Mark Brown wrote:
Like I say I'm suggesting that the bit of the code that understands the
flash chip is separate to the
Hi,
On Tuesday 27 August 2013 11:45 AM, Stephen Rothwell wrote:
Hi Mark,
After merging the spi tree, today's linux-next build (x86_64 allmodconfig)
failed like this:
In file included from drivers/spi/spi-ti-qspi.c:19:0:
include/linux/module.h:87:32: error: '__mod_of_device_table' aliased to
Hi,
On Tuesday 27 August 2013 11:45 AM, Stephen Rothwell wrote:
Hi Mark,
After merging the spi tree, today's linux-next build (x86_64 allmodconfig)
failed like this:
In file included from drivers/spi/spi-ti-qspi.c:19:0:
include/linux/module.h:87:32: error: '__mod_of_device_table' aliased to
once the ongoing discussion in the
community is freezed.
This patch is posted to demonstrate how patch 1 of the series will support
quad read.
[1]: http://comments.gmane.org/gmane.linux.kernel.spi.devel/14047
Signed-off-by: Sourav Poddar
---
drivers/spi/spi-ti-qspi.c | 22
.
- All iterations went through without failure.
Test2: Use mtd utilities:
- flash_erase to erase the flash device
- nanddump to read data back.
- nandwrite to write to the data flash.
diff between the write and read data shows zero.
Signed-off-by: Sourav Poddar
---
I have kept few more than 80
This patch series add support for ti qspi controller.
Adapted this series on top of Mark brown series[1]:
[1]: https://patchwork.kernel.org/patch/2834694/
Sourav Poddar (2):
drivers: spi: Add qspi flash controller
driver: spi: Add quad spi read support
Documentation/devicetree/bindings
This patch series add support for ti qspi controller.
Adapted this series on top of Mark brown series[1]:
[1]: https://patchwork.kernel.org/patch/2834694/
Sourav Poddar (2):
drivers: spi: Add qspi flash controller
driver: spi: Add quad spi read support
Documentation/devicetree/bindings
.
- All iterations went through without failure.
Test2: Use mtd utilities:
- flash_erase to erase the flash device
- nanddump to read data back.
- nandwrite to write to the data flash.
diff between the write and read data shows zero.
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
I have
once the ongoing discussion in the
community is freezed.
This patch is posted to demonstrate how patch 1 of the series will support
quad read.
[1]: http://comments.gmane.org/gmane.linux.kernel.spi.devel/14047
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
drivers/spi/spi-ti-qspi.c | 22
Hi Mark,
On Thursday 18 July 2013 04:12 PM, Mark Brown wrote:
On Thu, Jul 18, 2013 at 03:31:26PM +0530, Sourav Poddar wrote:
QSPI is a kind of spi module that allows single,
dual and quad read access to external spi devices. The module
has a memory mapped interface which provide direct
Hi Felipe,
On Thursday 18 July 2013 04:54 PM, Felipe Balbi wrote:
On Thu, Jul 18, 2013 at 04:48:41PM +0530, Sourav Poddar wrote:
+static void qspi_write_msg(struct ti_qspi *qspi, struct spi_transfer *t)
+{
+ const u8 *txbuf;
+ int wlen, count;
+
+ count = t->len;
+ tx
Hi Felipe,
On Thursday 18 July 2013 04:54 PM, Felipe Balbi wrote:
On Thu, Jul 18, 2013 at 04:48:41PM +0530, Sourav Poddar wrote:
+static void qspi_write_msg(struct ti_qspi *qspi, struct spi_transfer *t)
+{
+ const u8 *txbuf;
+ int wlen, count;
+
+ count = t-len;
+ txbuf
Hi Mark,
On Thursday 18 July 2013 04:12 PM, Mark Brown wrote:
On Thu, Jul 18, 2013 at 03:31:26PM +0530, Sourav Poddar wrote:
QSPI is a kind of spi module that allows single,
dual and quad read access to external spi devices. The module
has a memory mapped interface which provide direct
On Friday 19 July 2013 12:38 AM, Trent Piepho wrote:
On Thu, Jul 18, 2013 at 3:01 AM, Sourav Poddar wrote:
+Required properties:
+- compatible : should be "ti,dra7xxx-qspi".
+- reg: Should contain QSPI registers location and length.
+- #address-cells, #size-cells : Must
Hi Mark,
On Thursday 18 July 2013 08:12 PM, Mark Brown wrote:
On Thu, Jul 18, 2013 at 04:31:58PM +0300, Felipe Balbi wrote:
On Thu, Jul 18, 2013 at 02:18:22PM +0100, Mark Brown wrote:
So why do we report that we handled the interrupt then? Shouldn't we at
least warn if we're getting spurious
On Thursday 18 July 2013 04:54 PM, Felipe Balbi wrote:
On Thu, Jul 18, 2013 at 04:48:41PM +0530, Sourav Poddar wrote:
+static void qspi_write_msg(struct ti_qspi *qspi, struct spi_transfer *t)
+{
+ const u8 *txbuf;
+ int wlen, count;
+
+ count = t->len;
+ txbuf
On Thursday 18 July 2013 04:14 PM, Mark Brown wrote:
On Thu, Jul 18, 2013 at 03:31:27PM +0530, Sourav Poddar wrote:
Since, qspi controller uses quad read.
Configuring the command register, if the transfer of data needs
dual or quad lines.
This patch has been done on top of the following patch
On Thursday 18 July 2013 04:12 PM, Mark Brown wrote:
On Thu, Jul 18, 2013 at 03:31:26PM +0530, Sourav Poddar wrote:
QSPI is a kind of spi module that allows single,
dual and quad read access to external spi devices. The module
has a memory mapped interface which provide direct interface
Hi Felipe,
On Thursday 18 July 2013 03:54 PM, Felipe Balbi wrote:
Hi,
it might be just me, but ...
On Thu, Jul 18, 2013 at 03:31:26PM +0530, Sourav Poddar wrote:
+static inline unsigned long ti_qspi_readl_data(struct ti_qspi *qspi,
+ unsigned long reg, int wlen
Make spi core calculate the message length while
populating the other transfer parameters.
Usecase, driver can use it to populate framelength filed in their
controller.
Signed-off-by: Sourav Poddar
---
drivers/spi/spi.c |1 +
include/linux/spi/spi.h |1 +
2 files changed, 2
as the parent patch goes[1]
[1]: http://comments.gmane.org/gmane.linux.kernel.spi.devel/14047
Signed-off-by: Sourav Poddar
---
v1->v2
Added support for dual also.
drivers/spi/spi-ti-qspi.c | 17 +++--
1 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/
will configure controller clocks, device control
register and for defining low level transfer apis which
will be used by the spi framework to transfer data to
the slave spi device(flash in this case).
Signed-off-by: Sourav Poddar
---
v3->v4
- Did miscellaneous cleanup
- Added power management supp
Add support for calculating message length in spi framework.
Add support for quad spi controller.
Patch 2 of this series had been posted before. Sending along
with the series along with ather propsed change.
Sourav Poddar (3):
driver: spi: Modify core to compute the message length
drivers
Add support for calculating message length in spi framework.
Add support for quad spi controller.
Patch 2 of this series had been posted before. Sending along
with the series along with ather propsed change.
Sourav Poddar (3):
driver: spi: Modify core to compute the message length
drivers
as the parent patch goes[1]
[1]: http://comments.gmane.org/gmane.linux.kernel.spi.devel/14047
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
v1-v2
Added support for dual also.
drivers/spi/spi-ti-qspi.c | 17 +++--
1 files changed, 15 insertions(+), 2 deletions(-)
diff --git
will configure controller clocks, device control
register and for defining low level transfer apis which
will be used by the spi framework to transfer data to
the slave spi device(flash in this case).
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
v3-v4
- Did miscellaneous cleanup
- Added power
Make spi core calculate the message length while
populating the other transfer parameters.
Usecase, driver can use it to populate framelength filed in their
controller.
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
drivers/spi/spi.c |1 +
include/linux/spi/spi.h |1 +
2
Hi Felipe,
On Thursday 18 July 2013 03:54 PM, Felipe Balbi wrote:
Hi,
it might be just me, but ...
On Thu, Jul 18, 2013 at 03:31:26PM +0530, Sourav Poddar wrote:
+static inline unsigned long ti_qspi_readl_data(struct ti_qspi *qspi,
+ unsigned long reg, int wlen
On Thursday 18 July 2013 04:12 PM, Mark Brown wrote:
On Thu, Jul 18, 2013 at 03:31:26PM +0530, Sourav Poddar wrote:
QSPI is a kind of spi module that allows single,
dual and quad read access to external spi devices. The module
has a memory mapped interface which provide direct interface
On Thursday 18 July 2013 04:14 PM, Mark Brown wrote:
On Thu, Jul 18, 2013 at 03:31:27PM +0530, Sourav Poddar wrote:
Since, qspi controller uses quad read.
Configuring the command register, if the transfer of data needs
dual or quad lines.
This patch has been done on top of the following patch
On Thursday 18 July 2013 04:54 PM, Felipe Balbi wrote:
On Thu, Jul 18, 2013 at 04:48:41PM +0530, Sourav Poddar wrote:
+static void qspi_write_msg(struct ti_qspi *qspi, struct spi_transfer *t)
+{
+ const u8 *txbuf;
+ int wlen, count;
+
+ count = t-len;
+ txbuf = t-tx_buf
Hi Mark,
On Thursday 18 July 2013 08:12 PM, Mark Brown wrote:
On Thu, Jul 18, 2013 at 04:31:58PM +0300, Felipe Balbi wrote:
On Thu, Jul 18, 2013 at 02:18:22PM +0100, Mark Brown wrote:
So why do we report that we handled the interrupt then? Shouldn't we at
least warn if we're getting spurious
On Friday 19 July 2013 12:38 AM, Trent Piepho wrote:
On Thu, Jul 18, 2013 at 3:01 AM, Sourav Poddarsourav.pod...@ti.com wrote:
+Required properties:
+- compatible : should be ti,dra7xxx-qspi.
+- reg: Should contain QSPI registers location and length.
+- #address-cells, #size-cells : Must be
On Monday 08 July 2013 08:02 PM, Felipe Balbi wrote:
Hi,
On Mon, Jul 08, 2013 at 07:12:59PM +0530, Sourav Poddar wrote:
+static inline unsigned long dra7xxx_readl(struct dra7xxx_qspi *qspi,
+ unsigned long reg)
+{
+ return readl(qspi->base + reg);
+}
+
+static inline v
On Monday 08 July 2013 08:02 PM, Felipe Balbi wrote:
Hi,
On Mon, Jul 08, 2013 at 07:12:59PM +0530, Sourav Poddar wrote:
+static inline unsigned long dra7xxx_readl(struct dra7xxx_qspi *qspi,
+ unsigned long reg)
+{
+ return readl(qspi-base + reg);
+}
+
+static inline void
On Monday 08 July 2013 08:02 PM, Felipe Balbi wrote:
Hi,
On Mon, Jul 08, 2013 at 07:12:59PM +0530, Sourav Poddar wrote:
+static inline unsigned long dra7xxx_readl(struct dra7xxx_qspi *qspi,
+ unsigned long reg)
+{
+ return readl(qspi->base + reg);
+}
+
+static inline v
On Tuesday 09 July 2013 02:03 AM, Nishanth Menon wrote:
On 19:12-20130708, Sourav Poddar wrote:
[..]
generic comment, given our historical mistakes of making drivers
specific to a SoC family, it never is.
Now, ti-qspi in file name is a step in the right direction, but, rest
of the code(function
On Tuesday 09 July 2013 02:03 AM, Nishanth Menon wrote:
On 19:12-20130708, Sourav Poddar wrote:
[..]
generic comment, given our historical mistakes of making drivers
specific to a SoC family, it never is.
Now, ti-qspi in file name is a step in the right direction, but, rest
of the code(function
On Monday 08 July 2013 08:02 PM, Felipe Balbi wrote:
Hi,
On Mon, Jul 08, 2013 at 07:12:59PM +0530, Sourav Poddar wrote:
+static inline unsigned long dra7xxx_readl(struct dra7xxx_qspi *qspi,
+ unsigned long reg)
+{
+ return readl(qspi-base + reg);
+}
+
+static inline void
://comments.gmane.org/gmane.linux.kernel.spi.devel/14047
Signed-off-by: Sourav Poddar
---
drivers/spi/spi-ti-qspi.c |8 ++--
1 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti-qspi.c
index 430de9c..307cbed 100644
--- a/drivers/spi/spi-ti
will configure controller clocks, device control
register and for defining low level transfer apis which
will be used by the spi framework to transfer data to
the slave spi device(flash in this case).
Signed-off-by: Sourav Poddar
---
v2->v3
1. Add threaded irq support
2. made the driver more generic in te
Make spi core calculate the message length while
populating the other transfer parameters. This will
be useful in cases where controller driver need to configure its
framelength field without iterating through the linklist again in the
driver controller.
Signed-off-by: Sourav Poddar
Add support for calculating message length in spi framework.
Add support for quad spi controller.
Patch 2 of this series had been posted before. Sending along
with the series along with ather propsed change.
Sourav Poddar (3):
driver: spi: Modify core to compute the message length
drivers
Add support for calculating message length in spi framework.
Add support for quad spi controller.
Patch 2 of this series had been posted before. Sending along
with the series along with ather propsed change.
Sourav Poddar (3):
driver: spi: Modify core to compute the message length
drivers
Make spi core calculate the message length while
populating the other transfer parameters. This will
be useful in cases where controller driver need to configure its
framelength field without iterating through the linklist again in the
driver controller.
Signed-off-by: Sourav Poddar sourav.pod
will configure controller clocks, device control
register and for defining low level transfer apis which
will be used by the spi framework to transfer data to
the slave spi device(flash in this case).
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
v2-v3
1. Add threaded irq support
2. made the driver
://comments.gmane.org/gmane.linux.kernel.spi.devel/14047
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
drivers/spi/spi-ti-qspi.c |8 ++--
1 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti-qspi.c
index 430de9c..307cbed 100644
Hi,
On Wednesday 03 July 2013 10:47 PM, Florian Fainelli wrote:
Hello,
2013/7/3 Sourav Poddar:
From: Mona Anonuevo
This patch adds support for a generic spinand framework(spinand_mtd.c).
This frameowrk can be used for other spi based flash devices. The idea
is to have a common model under
simply attaches itself to
it.)
Signed-off-by: Mona Anonuevo
Signed-off-by: Tuan Nguyen
Signed-off-by: Sourav Poddar
This patch was sent as a part of a series[1];
but this can go in as a standalone patch.
[1]: https://lkml.org/lkml/2013/6/26/83
v1->v2:
seperated the specific micron dri
framework and device part simply attaches itself to
it.)
Signed-off-by: Mona Anonuevo manonu...@micron.com
Signed-off-by: Tuan Nguyen tqngu...@micron.com
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
This patch was sent as a part of a series[1];
but this can go in as a standalone patch.
[1
Hi,
On Wednesday 03 July 2013 10:47 PM, Florian Fainelli wrote:
Hello,
2013/7/3 Sourav Poddarsourav.pod...@ti.com:
From: Mona Anonuevomanonu...@micron.com
This patch adds support for a generic spinand framework(spinand_mtd.c).
This frameowrk can be used for other spi based flash devices. The
Hi Sekhar,
On Tuesday 02 July 2013 04:27 PM, Sekhar Nori wrote:
On 7/2/2013 2:26 PM, Sourav Poddar wrote:
The patch add basic support for the quad spi controller.
QSPI is a kind of spi module that allows single,
dual and quad read access to external spi devices. The module
has a memory mapped
On Tuesday 02 July 2013 04:01 PM, Felipe Balbi wrote:
Hi,
On Tue, Jul 02, 2013 at 03:53:49PM +0530, Sourav Poddar wrote:
On Tuesday 02 July 2013 03:46 PM, Felipe Balbi wrote:
Hi,
On Tue, Jul 02, 2013 at 03:30:42PM +0530, Sourav Poddar wrote:
+static int dra7xxx_qspi_setup(struct spi_device
Hi Mark,
On Tuesday 02 July 2013 03:47 PM, Mark Brown wrote:
On Tue, Jul 02, 2013 at 12:44:04PM +0300, Felipe Balbi wrote:
On Tue, Jul 02, 2013 at 10:32:47AM +0100, Mark Brown wrote:
Does this hardware really support anything other than 8 bits per word?
There is no code in the driver which
On Tuesday 02 July 2013 03:46 PM, Felipe Balbi wrote:
Hi,
On Tue, Jul 02, 2013 at 03:30:42PM +0530, Sourav Poddar wrote:
+static int dra7xxx_qspi_setup(struct spi_device *spi)
+{
+ struct dra7xxx_qspi *qspi =
+ spi_master_get_devdata(spi->master);
+
+
Hi Felipe,
On Tuesday 02 July 2013 02:54 PM, Felipe Balbi wrote:
Hi,
On Tue, Jul 02, 2013 at 02:26:39PM +0530, Sourav Poddar wrote:
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 33f9c09..ea14eff 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -46,6 +46,7 @@ obj
will configure controller clocks, device control
register and for defining low level transfer apis which
will be used by the spi framework to transfer data to
the slave spi device(flash in this case).
Signed-off-by: Sourav Poddar
---
This patch was sent as a part of a series[1];
but this can go
will configure controller clocks, device control
register and for defining low level transfer apis which
will be used by the spi framework to transfer data to
the slave spi device(flash in this case).
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
This patch was sent as a part of a series[1
Hi Felipe,
On Tuesday 02 July 2013 02:54 PM, Felipe Balbi wrote:
Hi,
On Tue, Jul 02, 2013 at 02:26:39PM +0530, Sourav Poddar wrote:
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 33f9c09..ea14eff 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -46,6 +46,7 @@ obj
On Tuesday 02 July 2013 03:46 PM, Felipe Balbi wrote:
Hi,
On Tue, Jul 02, 2013 at 03:30:42PM +0530, Sourav Poddar wrote:
+static int dra7xxx_qspi_setup(struct spi_device *spi)
+{
+ struct dra7xxx_qspi *qspi =
+ spi_master_get_devdata(spi-master);
+
+ int
Hi Mark,
On Tuesday 02 July 2013 03:47 PM, Mark Brown wrote:
On Tue, Jul 02, 2013 at 12:44:04PM +0300, Felipe Balbi wrote:
On Tue, Jul 02, 2013 at 10:32:47AM +0100, Mark Brown wrote:
Does this hardware really support anything other than 8 bits per word?
There is no code in the driver which
On Tuesday 02 July 2013 04:01 PM, Felipe Balbi wrote:
Hi,
On Tue, Jul 02, 2013 at 03:53:49PM +0530, Sourav Poddar wrote:
On Tuesday 02 July 2013 03:46 PM, Felipe Balbi wrote:
Hi,
On Tue, Jul 02, 2013 at 03:30:42PM +0530, Sourav Poddar wrote:
+static int dra7xxx_qspi_setup(struct spi_device
Hi Sekhar,
On Tuesday 02 July 2013 04:27 PM, Sekhar Nori wrote:
On 7/2/2013 2:26 PM, Sourav Poddar wrote:
The patch add basic support for the quad spi controller.
QSPI is a kind of spi module that allows single,
dual and quad read access to external spi devices. The module
has a memory mapped
Hi Mark,
Thanks for the review.
Comments in lined.
On Monday 01 July 2013 04:26 PM, Mark Brown wrote:
On Wed, Jun 26, 2013 at 01:11:11PM +0530, Sourav Poddar wrote:
+static int dra7xxx_qspi_prepare_xfer(struct spi_master *master)
+{
+ return 0;
+}
+
+static int
Hi Mark,
Thanks for the review.
Comments in lined.
On Monday 01 July 2013 04:26 PM, Mark Brown wrote:
On Wed, Jun 26, 2013 at 01:11:11PM +0530, Sourav Poddar wrote:
+static int dra7xxx_qspi_prepare_xfer(struct spi_master *master)
+{
+ return 0;
+}
+
+static int
+ Artem
On Wednesday 26 June 2013 01:11 PM, Sourav Poddar wrote:
The patch add basic support for the quad spi controller.
QSPI is a kind of spi module that allows single,
dual and quad read access to external spi devices. The module
has a memory mapped interface which provide direct interface
+ Artem
On Wednesday 26 June 2013 01:11 PM, Sourav Poddar wrote:
The patch adds support for spansion s25fl256s spi flash controller.
Currently, the patch supports only SPI based transaction.
As, the qspi to which flash is attached supports memory mapped interface,
support will be added
+ Artem
On Wednesday 26 June 2013 01:11 PM, Sourav Poddar wrote:
This patch series add support for the generic spi based flash
framework(spinand_mtd), which can be used used by any spi based flash device to
attach itself to mtd framework.
The first patch of this series includes both the generic
+ Artem
On Wednesday 26 June 2013 01:11 PM, Sourav Poddar wrote:
From: Mona Anonuevo
This patch adds support for a generic spinand framework(spinand_mtd.c).
This frameowrk can be used for other spi based flash devices also. The idea
is to have a common model under drivers/mtd, as also present
+ Artem
On Wednesday 26 June 2013 01:11 PM, Sourav Poddar wrote:
This patch series add support for the generic spi based flash
framework(spinand_mtd), which can be used used by any spi based flash device to
attach itself to mtd framework.
The first patch of this series includes both the generic
+ Artem
On Wednesday 26 June 2013 01:11 PM, Sourav Poddar wrote:
From: Mona Anonuevomanonu...@micron.com
This patch adds support for a generic spinand framework(spinand_mtd.c).
This frameowrk can be used for other spi based flash devices also. The idea
is to have a common model under drivers
+ Artem
On Wednesday 26 June 2013 01:11 PM, Sourav Poddar wrote:
The patch adds support for spansion s25fl256s spi flash controller.
Currently, the patch supports only SPI based transaction.
As, the qspi to which flash is attached supports memory mapped interface,
support will be added
+ Artem
On Wednesday 26 June 2013 01:11 PM, Sourav Poddar wrote:
The patch add basic support for the quad spi controller.
QSPI is a kind of spi module that allows single,
dual and quad read access to external spi devices. The module
has a memory mapped interface which provide direct interface
Hi Kamlakant,
On Wednesday 26 June 2013 08:52 PM, Kamlakant Patel wrote:
On Wed, Jun 26, 2013 at 01:11:10PM +0530, Sourav Poddar wrote:
From: Mona Anonuevo
This patch adds support for a generic spinand framework(spinand_mtd.c).
This frameowrk can be used for other spi based flash devices also
to the generic spinand mtd framework proposed in the
first patch of the series.
Signed-off-by: Sourav Poddar
---
drivers/mtd/spinand/Kconfig |7 +
drivers/mtd/spinand/Makefile|2 +-
drivers/mtd/spinand/ti-qspi-flash.c | 373 +++
3 files
part simply attaches itself to
it.)
The generic frework will be used later by me for a SPI based spansion S25FL256
device.
The patch also contains a micron driver attaching itself to generic framework.
Signed-off-by: Mona Anonuevo
Signed-off-by: Tuan Nguyen
Signed-off-by: Sourav Poddar
[I
:
Tested the generic framework(spinand_mtd.c) along with patch(2&3) on my dra7xx
board
for write/erase/read using nand utils.
Compile tested(spinand_lld.c).
Mona Anonuevo (1):
drivers: mtd: spinand: Add generic spinand frameowrk and micron
driver.
Sourav Poddar (2):
drivers: spi: Add
will configure controller clocks, device control
register and for defining low level transfer apis which
will be used by the spi framework to transfer data to
the slave spi device(flash in this case).
Signed-off-by: Sourav Poddar
---
drivers/spi/Kconfig |6 +
drivers/spi/Makefile |1 +
drivers
will configure controller clocks, device control
register and for defining low level transfer apis which
will be used by the spi framework to transfer data to
the slave spi device(flash in this case).
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
drivers/spi/Kconfig |6 +
drivers/spi/Makefile
:
Tested the generic framework(spinand_mtd.c) along with patch(23) on my dra7xx
board
for write/erase/read using nand utils.
Compile tested(spinand_lld.c).
Mona Anonuevo (1):
drivers: mtd: spinand: Add generic spinand frameowrk and micron
driver.
Sourav Poddar (2):
drivers: spi: Add qspi
tqngu...@micron.com
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
[I picked this as a standalone patch, can split it into generic and device part
based on community feedback.]
drivers/mtd/Kconfig |2 +
drivers/mtd/Makefile |2 +
drivers/mtd/spinand
to the generic spinand mtd framework proposed in the
first patch of the series.
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
drivers/mtd/spinand/Kconfig |7 +
drivers/mtd/spinand/Makefile|2 +-
drivers/mtd/spinand/ti-qspi-flash.c | 373
Hi Kamlakant,
On Wednesday 26 June 2013 08:52 PM, Kamlakant Patel wrote:
On Wed, Jun 26, 2013 at 01:11:10PM +0530, Sourav Poddar wrote:
From: Mona Anonuevomanonu...@micron.com
This patch adds support for a generic spinand framework(spinand_mtd.c).
This frameowrk can be used for other spi based
On Monday 24 June 2013 05:09 PM, Sekhar Nori wrote:
Sourav,
On 6/24/2013 3:49 PM, Tony Lindgren wrote:
Hi,
For merging this series, I suggest the following sets:
* Joel A Fernandes [130620 14:13]:
spi: omap2-mcspi: add generic DMA request support to the DT binding
spi: omap2-mcspi:
On Monday 24 June 2013 05:09 PM, Sekhar Nori wrote:
Sourav,
On 6/24/2013 3:49 PM, Tony Lindgren wrote:
Hi,
For merging this series, I suggest the following sets:
* Joel A Fernandesjoelag...@ti.com [130620 14:13]:
spi: omap2-mcspi: add generic DMA request support to the DT binding
Hi Mark,
On Friday 21 June 2013 04:58 PM, Mark Brown wrote:
On Fri, Jun 21, 2013 at 04:07:51PM +0530, Sekhar Nori wrote:
We can resend the patch if you don't have it from the mailing list.
I'll probably have it assuming it's been sent to some mailing list I
read (the CC list here looks
cells =<1>;
+#size-cells =<0>;
+compatible = "ti,omap4-mcspi";
+ti,hwmods = "mcspi1";
+ti,spi-num-cs =<2>;
+dmas =< 42
+43
+44
+45>;
+dma-names = "tx0", "rx0", "tx1", "
status = -ENODEV;
+ break;
+ }
- mcspi->dma_channels[i].dma_tx_sync_dev = dma_res->start;
+ mcspi->dma_channels[i].dma_tx_sync_dev =
+ dma_res->start;
+ }
;
+ }
- mcspi-dma_channels[i].dma_tx_sync_dev = dma_res-start;
+ mcspi-dma_channels[i].dma_tx_sync_dev =
+ dma_res-start;
+ }
}
if (status 0)
Acked-by: Sourav Poddar sourav.pod...@ti.com
Tested-by: Sourav Poddar
.
Reviewed-by: Sourav Poddar sourav.pod...@ti.com
~Sourav
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Hi Mark,
On Friday 21 June 2013 04:58 PM, Mark Brown wrote:
On Fri, Jun 21, 2013 at 04:07:51PM +0530, Sekhar Nori wrote:
We can resend the patch if you don't have it from the mailing list.
I'll probably have it assuming it's been sent to some mailing list I
read (the CC list here looks
Hi Arnd,
On Saturday 01 June 2013 02:48 PM, Arnd Bergmann wrote:
A recent bug fix in 3.10, ddd85e225c "serial: omap: prevent runtime PM for
"no_console_suspend"", introduced a regression from an obvious typo:
drivers/tty/serial/omap-serial.c:1677:14: error: 'serial_omap_complete'
Hi Arnd,
On Saturday 01 June 2013 02:48 PM, Arnd Bergmann wrote:
A recent bug fix in 3.10, ddd85e225c serial: omap: prevent runtime PM for
no_console_suspend, introduced a regression from an obvious typo:
drivers/tty/serial/omap-serial.c:1677:14: error: 'serial_omap_complete'
undeclared
ajendra nayak
Cc: Grygorii Strashko
Signed-off-by: Sourav Poddar
Reviewed-by: Felipe Balbi
---
arch/arm/mach-omap2/omap_device.c |9 ++---
arch/arm/mach-omap2/omap_device.h | 10 --
2 files changed, 2 insertions(+), 17 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_device.
"no_console_suspend" is no longer handled in platform file,
Since the omap serial driver is now adapted to prevent
console UART idleing during suspend.
Cc: Santosh Shilimkar
Cc: Felipe Balbi
Cc: Rajendra nayak
Signed-off-by: Sourav Poddar
Reviewed-by: Felipe Balbi
---
arch/arm/
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