hardware table walks in
the future
Signed-off-by: Stephane Viau
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c
b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c
index bbab6e6..14ac20a 100644
could also overwrite those values for
optimization.
In some hardware (eg: MDP5 v1.7), software *must* program those
values since they are not handled in hardware.
Change-Id: I4900165e770f8da702a4f938044616daf5aa81af
Signed-off-by: Stephane Viau
---
rnndb/mdp/mdp5.xml | 24
messages during the
probe.
Signed-off-by: Stephane Viau
---
Documentation/devicetree/bindings/drm/msm/mdp.txt | 3 ++-
drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c | 27 ++-
2 files changed, 18 insertions(+), 12 deletions(-)
diff --git a/Documentation/devicetree/bindings
The HDMI controller is new in MDP5 v1.7. As of now, this change
doesn't reflect the novelty and only adds the basics so the probe
gets triggered.
Signed-off-by: Stephane Viau
---
Documentation/devicetree/bindings/drm/msm/hdmi.txt | 3 +++
drivers/gpu/drm/msm/hdmi/hdmi.c| 17
msm_iommu_new() can fail and this change makes sure that we
detect the failure and free the allocated domain before going
any further.
Signed-off-by: Stephane Viau
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c | 1 +
drivers/gpu/drm/msm/msm_gpu.c | 8
2 files changed, 9
-by: Stephane Viau
---
Documentation/devicetree/bindings/drm/msm/mdp.txt | 3 ++
drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c | 65 +++
drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h | 3 ++
3 files changed, 71 insertions(+)
diff --git a/Documentation/devicetree/bindings/drm/msm
This change adds the basic MDP5 support for MSM8996.
Signed-off-by: Stephane Viau
---
Documentation/devicetree/bindings/drm/msm/mdp.txt | 2 +
drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c | 95 ++-
drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h | 9 ++-
drivers/gpu
This change is the output of Envytools change:
"rnndb: Add Pixel Extension registers"
Signed-off-by: Stephane Viau
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5.xml.h | 82 +++-
drivers/gpu/drm/msm/mdp/mdp_common.xml.h | 11 -
2 files changed, 90
by software. For some targets (e.g.: msm8996),
software *must* program those registers.
In order to ease this computation, let's always use bilinear
filters, which are easier to program from kernel. Eventually,
all of these values will come down from user space for better
quality.
Signed-off-by: Stephane
When calculating phase steps, let's use the same enum
mdp_component_type in order to ease the readability; 0/1 indexes
are a bit confusing and we now have explicit values to index
this type of arrays.
Signed-off-by: Stephane Viau
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c | 25
We want to make sure we control all the information being passed
down to SMP block. Having access to the cfg pointer here may create
bad things in the future.
Signed-off-by: Stephane Viau
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h | 2 +-
drivers/gpu/drm/msm/mdp/mdp5/mdp5_smp.c | 8
2
This series of patches adds support for MSM8996, including MDP5 v1.7.
Note that only the HDMI interface is supported for now.
Stephane Viau (10):
drm/msm/mdp5: remove the cfg pointer from SMP struct
drm/msm/mdp5: Disable hardware translation table walks (MSM8996)
drm/msm: Fix IOMMU clean
We want to make sure we control all the information being passed
down to SMP block. Having access to the cfg pointer here may create
bad things in the future.
Signed-off-by: Stephane Viau <sv...@codeaurora.org>
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h | 2 +-
drivers/gpu/drm/msm/md
This series of patches adds support for MSM8996, including MDP5 v1.7.
Note that only the HDMI interface is supported for now.
Stephane Viau (10):
drm/msm/mdp5: remove the cfg pointer from SMP struct
drm/msm/mdp5: Disable hardware translation table walks (MSM8996)
drm/msm: Fix IOMMU clean
msm_iommu_new() can fail and this change makes sure that we
detect the failure and free the allocated domain before going
any further.
Signed-off-by: Stephane Viau <sv...@codeaurora.org>
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c | 1 +
drivers/gpu/drm/msm/msm_gpu.c | 8 +
The HDMI controller is new in MDP5 v1.7. As of now, this change
doesn't reflect the novelty and only adds the basics so the probe
gets triggered.
Signed-off-by: Stephane Viau <sv...@codeaurora.org>
---
Documentation/devicetree/bindings/drm/msm/hdmi.txt | 3 +++
drivers/gpu/drm/msm/hdmi/
-by: Stephane Viau <sv...@codeaurora.org>
---
Documentation/devicetree/bindings/drm/msm/mdp.txt | 3 ++
drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c | 65 +++
drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h | 3 ++
3 files changed, 71 insertions(+)
diff --git a/Documen
This change adds the basic MDP5 support for MSM8996.
Signed-off-by: Stephane Viau <sv...@codeaurora.org>
---
Documentation/devicetree/bindings/drm/msm/mdp.txt | 2 +
drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c | 95 ++-
drivers/gpu/drm/msm/mdp/mdp5/mdp5
This change is the output of Envytools change:
"rnndb: Add Pixel Extension registers"
Signed-off-by: Stephane Viau <sv...@codeaurora.org>
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5.xml.h | 82 +++-
drivers/gpu/drm/msm/mdp/mdp_common.xml.h | 1
by software. For some targets (e.g.: msm8996),
software *must* program those registers.
In order to ease this computation, let's always use bilinear
filters, which are easier to program from kernel. Eventually,
all of these values will come down from user space for better
quality.
Signed-off-by: Stephane
When calculating phase steps, let's use the same enum
mdp_component_type in order to ease the readability; 0/1 indexes
are a bit confusing and we now have explicit values to index
this type of arrays.
Signed-off-by: Stephane Viau <sv...@codeaurora.org>
---
drivers/gpu/drm/msm/md
could also overwrite those values for
optimization.
In some hardware (eg: MDP5 v1.7), software *must* program those
values since they are not handled in hardware.
Change-Id: I4900165e770f8da702a4f938044616daf5aa81af
Signed-off-by: Stephane Viau <sv...@codeaurora.org>
---
rnndb/mdp/md
hardware table walks in
the future
Signed-off-by: Stephane Viau <sv...@codeaurora.org>
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c
b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c
index b
messages during the
probe.
Signed-off-by: Stephane Viau <sv...@codeaurora.org>
---
Documentation/devicetree/bindings/drm/msm/mdp.txt | 3 ++-
drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c | 27 ++-
2 files changed, 18 insertions(+), 12 deletions(-)
diff --git a/Documen
The current names were guessed based on downstream driver.
This change replaces the filter fields' names to avoid any
confusion.
Signed-off-by: Stephane Viau
---
rnndb/mdp/mdp5.xml | 15 +++
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/rnndb/mdp/mdp5.xml b/rnndb/mdp
enum mdp_chroma_samp_type's first value (0) is actually shared by
all non-subsampled formats; that is RGB but also some YUV formats
(eg: YUV444). This change makes the name a little less confusing.
Signed-off-by: Stephane Viau
Signed-off-by: Wentao Xu
---
rnndb/mdp/mdp_common.xml | 2 +-
1
From: Wentao Xu
Newer MDP5 uses 2 shared memory pool clients for certain YUV formats.
For example, if VIG0 is used to fetch data in YUYV format, it will use
VIG0_Y for Y component, and VIG0_Cr for UV packed.
Signed-off-by: Wentao Xu
[rebase]
Signed-off-by: Stephane Viau
Change-Id
Add packed YUV422 and planar YUV420 formats to MDP supported
formats.
Signed-off-by: Stephane Viau
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c | 105 +-
drivers/gpu/drm/msm/mdp/mdp_format.c | 19 ++
2 files changed, 77 insertions(+), 47 deletions(-)
diff
From: Wentao Xu
This makes it easy to determine if a format is YUV. The old
method of using chroma sample type incorrectly marks YUV444 as
RGB format.
Signed-off-by: Wentao Xu
[rebase]
Signed-off-by: Stephane Viau
Change-Id: I3e1fa4473be8421fac8d79100f30bff5823be5f4
---
drivers/gpu/drm/msm
See envytools commit: "rnndb: Rename scalers' filter fields"
Signed-off-by: Stephane Viau
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5.xml.h | 58 -
1 file changed, 29 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5.xml.h
b/d
See Envytools patch:
rnndb: Rename 1st Source Chroma Sampling option
Signed-off-by: Wentao Xu
Signed-off-by: Stephane Viau
---
drivers/gpu/drm/msm/mdp/mdp_common.xml.h | 37 +++-
1 file changed, 3 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm
The current names were guessed based on downstream driver.
This change replaces the filter fields' names to avoid any
confusion.
Signed-off-by: Stephane Viau
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers
,
Stephane.
Stephane Viau (4):
drm/msm/mdp5: Update generated headers (filter fieds)
drm/msm/mdp5: Rename scalers' filter fields
drm/msm/mdp: Update generated headers (chroma_samp)
drm/msm/mdp5: add more YUV formats for MDP5
Wentao Xu (2):
drm/msm/mdp: mark if a MDP format is YUV
The current names were guessed based on downstream driver.
This change replaces the filter fields' names to avoid any
confusion.
Signed-off-by: Stephane Viau sv...@codeaurora.org
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions
See Envytools patch:
rnndb: Rename 1st Source Chroma Sampling option
Signed-off-by: Wentao Xu went...@codeaurora.org
Signed-off-by: Stephane Viau sv...@codeaurora.org
---
drivers/gpu/drm/msm/mdp/mdp_common.xml.h | 37 +++-
1 file changed, 3 insertions(+), 34
,
Stephane.
Stephane Viau (4):
drm/msm/mdp5: Update generated headers (filter fieds)
drm/msm/mdp5: Rename scalers' filter fields
drm/msm/mdp: Update generated headers (chroma_samp)
drm/msm/mdp5: add more YUV formats for MDP5
Wentao Xu (2):
drm/msm/mdp: mark if a MDP format is YUV
From: Wentao Xu went...@codeaurora.org
This makes it easy to determine if a format is YUV. The old
method of using chroma sample type incorrectly marks YUV444 as
RGB format.
Signed-off-by: Wentao Xu went...@codeaurora.org
[rebase]
Signed-off-by: Stephane Viau sv...@codeaurora.org
Change-Id
See envytools commit: rnndb: Rename scalers' filter fields
Signed-off-by: Stephane Viau sv...@codeaurora.org
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5.xml.h | 58 -
1 file changed, 29 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5.xml.h
Add packed YUV422 and planar YUV420 formats to MDP supported
formats.
Signed-off-by: Stephane Viau sv...@codeaurora.org
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c | 105 +-
drivers/gpu/drm/msm/mdp/mdp_format.c | 19 ++
2 files changed, 77 insertions
The current names were guessed based on downstream driver.
This change replaces the filter fields' names to avoid any
confusion.
Signed-off-by: Stephane Viau sv...@codeaurora.org
---
rnndb/mdp/mdp5.xml | 15 +++
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/rnndb/mdp
-off-by: Stephane Viau sv...@codeaurora.org
Change-Id: I24df222372b6cea5e67d2331e2c842c4faba383e
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c | 2 +-
drivers/gpu/drm/msm/mdp/mdp5/mdp5_smp.c | 26 ++
drivers/gpu/drm/msm/mdp/mdp5/mdp5_smp.h | 3 ++-
3 files changed, 25
enum mdp_chroma_samp_type's first value (0) is actually shared by
all non-subsampled formats; that is RGB but also some YUV formats
(eg: YUV444). This change makes the name a little less confusing.
Signed-off-by: Stephane Viau sv...@codeaurora.org
Signed-off-by: Wentao Xu went...@codeaurora.org
This change adds the MDP and HDMI support for msm8x94.
Note that HDMI PHY registers are not being accessed anymore from
the driver.
Signed-off-by: Stephane Viau
---
drivers/gpu/drm/msm/hdmi/hdmi.c | 30 -
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c| 8 +++-
drivers/gpu/drm
igned-off-by: Stephane Viau
---
drivers/gpu/drm/msm/hdmi/hdmi.h | 1 -
drivers/gpu/drm/msm/hdmi/hdmi_connector.c | 51 ++-
drivers/gpu/drm/msm/hdmi/hdmi_phy_8960.c | 52
drivers/gpu/drm/msm/hdmi/hdmi_phy_8x60.c | 32 -
driver
This it to follow up with my RFC sent a few days ago[1].
Since the RFC got discussed and approved through IRC, here are the actual
patches.
Rgds,
Stephane.
[1] http://lists.freedesktop.org/archives/dri-devel/2015-June/084788.html
Stephane Viau (2):
drm/msm/hdmi: remove ->reset() from H
This change adds the MDP and HDMI support for msm8x94.
Note that HDMI PHY registers are not being accessed anymore from
the driver.
Signed-off-by: Stephane Viau sv...@codeaurora.org
---
drivers/gpu/drm/msm/hdmi/hdmi.c | 30 -
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c| 8
for which no PHY registers
accesses are done (-phy_init == NULL) but the HDMI PHY reset
from HDMI core still needs to be done.
Note:
SW_RESET_PLL bit is not written in hdmi_phy_8x60_reset(); this
write should not affect anything if the corresponding field is
not writable.
Signed-off-by: Stephane
This it to follow up with my RFC sent a few days ago[1].
Since the RFC got discussed and approved through IRC, here are the actual
patches.
Rgds,
Stephane.
[1] http://lists.freedesktop.org/archives/dri-devel/2015-June/084788.html
Stephane Viau (2):
drm/msm/hdmi: remove -reset() from HDMI PHY
igned-off-by: Stephane Viau
---
drivers/gpu/drm/msm/hdmi/hdmi.h | 1 -
drivers/gpu/drm/msm/hdmi/hdmi_connector.c | 51 ++-
drivers/gpu/drm/msm/hdmi/hdmi_phy_8960.c | 52
drivers/gpu/drm/msm/hdmi/hdmi_phy_8x60.c | 32 -
driver
This change adds the MDP and HDMI support for msm8x94.
Note that HDMI PHY registers are not being accessed anymore from
the driver.
Signed-off-by: Stephane Viau
---
drivers/gpu/drm/msm/hdmi/hdmi.c | 30 -
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c| 8 +++-
drivers/gpu/drm
n't change the current
functionality.
Stephane Viau (2):
[RFC] drm/msm/hdmi: remove ->reset() from HDMI PHY
drm/msm: Add support for msm8x94
drivers/gpu/drm/msm/hdmi/hdmi.c | 30 ++
drivers/gpu/drm/msm/hdmi/hdmi.h | 1 -
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
This change adds the MDP and HDMI support for msm8x94.
Note that HDMI PHY registers are not being accessed anymore from
the driver.
Signed-off-by: Stephane Viau sv...@codeaurora.org
---
drivers/gpu/drm/msm/hdmi/hdmi.c | 30 -
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c| 8
for which no PHY registers
accesses are done (-phy_init == NULL) but the HDMI PHY reset
from HDMI core still needs to be done.
Note:
SW_RESET_PLL bit is not written in hdmi_phy_8x60_reset(); this
write should not affect anything if the corresponding field is
not writable.
Signed-off-by: Stephane
change the current
functionality.
Stephane Viau (2):
[RFC] drm/msm/hdmi: remove -reset() from HDMI PHY
drm/msm: Add support for msm8x94
drivers/gpu/drm/msm/hdmi/hdmi.c | 30 ++
drivers/gpu/drm/msm/hdmi/hdmi.h | 1 -
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c| 8
DRM device's dev (hdmi->dev->dev) points to the mdss_mdp device
handle. Instead, we should get a reference to the mdss_hdmi
handle.
Signed-off-by: Stephane Viau
---
drivers/gpu/drm/msm/hdmi/hdmi_connector.c | 32 +++
1 file changed, 16 insertions(+), 16 del
Some targets (eg: msm8994) use the pinctrl framework to configure
interface pins. This change adds support for initialization and
pinctrl active/sleep state control for the HDMI driver.
Signed-off-by: Stephane Viau
---
v3:
- Use pins binding handled in driver really_probe() [Ivan]
v2
Pinctrl support for HDMI needs a small fix before the actual implementation...
Stephane Viau (2):
drm/msm/hdmi: Point to the right struct device
drm/msm/hdmi: Use pinctrl in HDMI driver
Documentation/devicetree/bindings/drm/msm/hdmi.txt | 6 +++
drivers/gpu/drm/msm/hdmi/hdmi_connector.c
DRM device's dev (hdmi-dev-dev) points to the mdss_mdp device
handle. Instead, we should get a reference to the mdss_hdmi
handle.
Signed-off-by: Stephane Viau sv...@codeaurora.org
---
drivers/gpu/drm/msm/hdmi/hdmi_connector.c | 32 +++
1 file changed, 16 insertions
Some targets (eg: msm8994) use the pinctrl framework to configure
interface pins. This change adds support for initialization and
pinctrl active/sleep state control for the HDMI driver.
Signed-off-by: Stephane Viau sv...@codeaurora.org
---
v3:
- Use pins binding handled in driver really_probe
Pinctrl support for HDMI needs a small fix before the actual implementation...
Stephane Viau (2):
drm/msm/hdmi: Point to the right struct device
drm/msm/hdmi: Use pinctrl in HDMI driver
Documentation/devicetree/bindings/drm/msm/hdmi.txt | 6 +++
drivers/gpu/drm/msm/hdmi/hdmi_connector.c
That will complete the lists of Alpha + RGB formats.
Signed-off-by: Stephane Viau
---
drivers/gpu/drm/msm/mdp/mdp_format.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/msm/mdp/mdp_format.c
b/drivers/gpu/drm/msm/mdp/mdp_format.c
index f683433..7b0524d 100644
That will complete the lists of Alpha + RGB formats.
Signed-off-by: Stephane Viau sv...@codeaurora.org
---
drivers/gpu/drm/msm/mdp/mdp_format.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/msm/mdp/mdp_format.c
b/drivers/gpu/drm/msm/mdp/mdp_format.c
index f683433
Some targets (eg: msm8994) use the pinctrl framework to configure
interface pins. This change adds support for initialization and
pinctrl active/sleep state control for the HDMI driver.
Signed-off-by: Stephane Viau
---
v2:
- Add devicetree binding documentation for pinctrl property [Ivan]
- Use
Some targets (eg: msm8994) use the pinctrl framework to configure
interface pins. This change adds support for initialization and
pinctrl active/sleep state control for the HDMI driver.
Signed-off-by: Stephane Viau sv...@codeaurora.org
---
v2:
- Add devicetree binding documentation for pinctrl
Some targets (eg: msm8994) use the pinctrl framework to configure
interface pins. This change adds support for initialization and
pinctrl active/sleep state control for the HDMI driver.
Signed-off-by: Stephane Viau
---
drivers/gpu/drm/msm/hdmi/hdmi.c | 25
Some targets (eg: msm8994) use the pinctrl framework to configure
interface pins. This change adds support for initialization and
pinctrl active/sleep state control for the HDMI driver.
Signed-off-by: Stephane Viau sv...@codeaurora.org
---
drivers/gpu/drm/msm/hdmi/hdmi.c | 25
The index of ->planes[] array (3rd parameter) cannot be equal to MAX_PLANE.
This looks like a typo that is now fixed.
Signed-off-by: Stephane Viau
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/mdp/m
The index of -planes[] array (3rd parameter) cannot be equal to MAX_PLANE.
This looks like a typo that is now fixed.
Signed-off-by: Stephane Viau sv...@codeaurora.org
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm
When CONFIG_DRM_MSM_FBDEV is not defined,
CONFIG_DRM_KMS_FB_HELPER does not get selected and
drm_fb_helper_*() helper functions are thus not available.
This change fixes these link issues.
Signed-off-by: Stephane Viau
---
drivers/gpu/drm/msm/msm_drv.c | 4
1 file changed, 4 insertions
When CONFIG_DRM_MSM_FBDEV is not defined,
CONFIG_DRM_KMS_FB_HELPER does not get selected and
drm_fb_helper_*() helper functions are thus not available.
This change fixes these link issues.
Signed-off-by: Stephane Viau sv...@codeaurora.org
---
drivers/gpu/drm/msm/msm_drv.c | 4
1 file
[]
(internal_framebuffer_create+0x67c/0x7b4)
[ 247.877537] [] (internal_framebuffer_create) from []
(drm_mode_addfb2+0x20/0x98)
[ 247.886650] [] (drm_mode_addfb2) from []
(drm_ioctl+0x240/0x420)
[ 247.894378] [] (drm_ioctl) from []
(do_vfs_ioctl+0x4e4/0x5a4)
...
Signed-off-by: Stephane Viau
---
drivers/gpu
+0x240/0x420)
[ 247.894378] [c034071c] (drm_ioctl) from [c011df7c]
(do_vfs_ioctl+0x4e4/0x5a4)
...
Signed-off-by: Stephane Viau sv...@codeaurora.org
---
drivers/gpu/drm/msm/msm_fb.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_fb.c b/drivers/gpu/drm
Each interface (DSI/eDP/HDMI) has to control its own PLL.
This change only add the register description for each one of them.
Let's not make the register description common as some registers
may not be implemented the same way for each interface PHY.
Signed-off-by: Stephane Viau
---
rnndb/dsi
registers
may not be implemented the same way for each interface PHY.
Signed-off-by: Stephane Viau
---
drivers/gpu/drm/msm/dsi/dsi.xml.h | 118 +++-
drivers/gpu/drm/msm/edp/edp.xml.h | 104 +++
drivers/gpu/drm/msm/hdmi
registers
may not be implemented the same way for each interface PHY.
Signed-off-by: Stephane Viau sv...@codeaurora.org
---
drivers/gpu/drm/msm/dsi/dsi.xml.h | 118 +++-
drivers/gpu/drm/msm/edp/edp.xml.h | 104 +++
drivers/gpu
Each interface (DSI/eDP/HDMI) has to control its own PLL.
This change only add the register description for each one of them.
Let's not make the register description common as some registers
may not be implemented the same way for each interface PHY.
Signed-off-by: Stephane Viau sv
once i reaches hw_cfg->intf.count (== 1),
we will miss the test for intfs[1].
Actually, this hw_cfg->intf.count entry is quite confusing and is not
(or *should not be*) used anywhere else; let's remove it.
Signed-off-by: Stephane Viau
---
drivers/gpu/drm/msm/mdp/mdp5/mdp
Avoid such errors at compilation time:
format '%d' expects argument of type 'int', but argument 3 has type
'size_t'
Signed-off-by: Stephane Viau
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi
Avoid such errors at compilation time:
format '%d' expects argument of type 'int', but argument 3 has type
'size_t'
Signed-off-by: Stephane Viau sv...@codeaurora.org
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers
hw_cfg-intf.count (== 1),
we will miss the test for intfs[1].
Actually, this hw_cfg-intf.count entry is quite confusing and is not
(or *should not be*) used anywhere else; let's remove it.
Signed-off-by: Stephane Viau sv...@codeaurora.org
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c | 34
Add the GDSC instances that exist as part of apq8084 MMCC block.
Signed-off-by: Stephane Viau
---
drivers/clk/qcom/Kconfig | 1 +
drivers/clk/qcom/mmcc-apq8084.c | 56 ++-
include/dt-bindings/clock/qcom,mmcc-apq8084.h | 8
3
Add the GDSC instances that exist as part of apq8084 MMCC block.
Signed-off-by: Stephane Viau sv...@codeaurora.org
---
drivers/clk/qcom/Kconfig | 1 +
drivers/clk/qcom/mmcc-apq8084.c | 56 ++-
include/dt-bindings/clock/qcom,mmcc-apq8084
, the
client ID list is passed through the MDP5 config module rather
than using a list of hard-coded enum values.
Signed-off-by: Stephane Viau
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c | 20 ---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h | 1 +
drivers/gpu/drm/msm/mdp/mdp5/mdp5_smp.c
This change contains the generated header file for the following
change "drm/msm/mdp5: Separate MDP5 domain from MDSS domain".
Signed-off-by: Stephane Viau
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5.xml.h | 203 +++-
1 file changed, 118 insertions(+), 85
This patch contains the generated header file of the following
change "drm/msm/mdp5: Get SMP client list from mdp5_cfg".
Signed-off-by: Stephane Viau
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5.xml.h | 41 ++---
1 file changed, 7 insertions(+), 34 deletions(-)
the
MDSS HW version is read.
Signed-off-by: Stephane Viau
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c | 8
drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h | 1 +
drivers/gpu/drm/msm/mdp/mdp5/mdp5_ctl.c | 20 ++--
drivers/gpu/drm/msm/mdp/mdp5/mdp5_irq.c | 26
This patch set contains a couple modifications of the MDP5 register
description, followed by the MDP hw configuration of the msm8016 and
msm8916 chipsets.
v2: add CTL flush register's hardware mask [pointed by Archit]
Stephane Viau (5):
drm/msm/mdp5: Update headers (introduce MDP5 domain
mask [pointed by Archit]
Signed-off-by: Stephane Viau
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c | 52 -
1 file changed, 51 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c
b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c
index 96ea6dd
This TODO can now be removed and replaced by the previous patch
"drm/msm/mdp5: Update headers (add CTL flush bits)"
Signed-off-by: Stephane Viau
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_ctl.c | 11 ---
1 file changed, 11 deletions(-)
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp
Some upcoming targets have more bits to set in CTL_FLUSH
registers.
Example: msm8x16 needs to set TIMING1 bit so that some of the
INTF1's interface registers get flushed.
Signed-off-by: Stephane Viau
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5.xml.h | 12 ++--
1 file changed, 10 insertions
Some upcoming targets have more bits to set in CTL_FLUSH registers.
Example: msm8x16 needs to set TIMING1 bit so that some of the
INTF1's interface registers get flushed.
Signed-off-by: Stephane Viau
---
rnndb/mdp/mdp5.xml | 8
1 file changed, 8 insertions(+)
diff --git a/rnndb/mdp
This patchset proposes in a couple of changes (separate generated header)
to remove the temporary defined symbols in the code and place them into
the generated header file.
Stephane Viau (2):
drm/msm/mdp5: Update headers (add CTL flush bits)
drm/msm/mdp5: Remove CTL flush dummy bits
drivers
This TODO can now be removed and replaced by the previous patch
drm/msm/mdp5: Update headers (add CTL flush bits)
Signed-off-by: Stephane Viau sv...@codeaurora.org
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_ctl.c | 11 ---
1 file changed, 11 deletions(-)
diff --git a/drivers/gpu/drm/msm/mdp
This patchset proposes in a couple of changes (separate generated header)
to remove the temporary defined symbols in the code and place them into
the generated header file.
Stephane Viau (2):
drm/msm/mdp5: Update headers (add CTL flush bits)
drm/msm/mdp5: Remove CTL flush dummy bits
drivers
Some upcoming targets have more bits to set in CTL_FLUSH registers.
Example: msm8x16 needs to set TIMING1 bit so that some of the
INTF1's interface registers get flushed.
Signed-off-by: Stephane Viau sv...@codeaurora.org
---
rnndb/mdp/mdp5.xml | 8
1 file changed, 8 insertions(+)
diff
Some upcoming targets have more bits to set in CTL_FLUSH
registers.
Example: msm8x16 needs to set TIMING1 bit so that some of the
INTF1's interface registers get flushed.
Signed-off-by: Stephane Viau sv...@codeaurora.org
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5.xml.h | 12 ++--
1 file
This patch contains the generated header file of the following
change drm/msm/mdp5: Get SMP client list from mdp5_cfg.
Signed-off-by: Stephane Viau sv...@codeaurora.org
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5.xml.h | 41 ++---
1 file changed, 7 insertions(+), 34
, the
client ID list is passed through the MDP5 config module rather
than using a list of hard-coded enum values.
Signed-off-by: Stephane Viau sv...@codeaurora.org
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c | 20 ---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h | 1 +
drivers/gpu/drm/msm/mdp
This change contains the generated header file for the following
change drm/msm/mdp5: Separate MDP5 domain from MDSS domain.
Signed-off-by: Stephane Viau sv...@codeaurora.org
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5.xml.h | 203 +++-
1 file changed, 118 insertions(+), 85
the
MDSS HW version is read.
Signed-off-by: Stephane Viau sv...@codeaurora.org
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c | 8
drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h | 1 +
drivers/gpu/drm/msm/mdp/mdp5/mdp5_ctl.c | 20 ++--
drivers/gpu/drm/msm/mdp/mdp5/mdp5_irq.c | 26
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