* To test, select CONFIG_SYNTH_EVENT_GEN_TEST and build the module.
> * Then:
> *
> * # insmod kernel/trace/synth_event_gen_test.ko
> * # cat /sys/kernel/tracing/trace
> *
> * You should see several events in the trace buffer -
> * "create_synth_test",
id *key,
> bool lookup_only)
> }
>
> memcpy(elt->key, key, map->key_size);
> - entry->val = elt;
> + /*
> + * Ensure the initialization is visible and
> + * publish the elt.
> + */
> + smp_wmb();
> + WRITE_ONCE(entry->val, elt);
> atomic64_inc(>hits);
>
> return entry->val;
>
> base-commit: 9d1694dc91ce7b80bc96d6d8eaf1a1eca668d847
Makes sense, thanks for fixing this!
Acked-by: Tom Zanussi
Tom
On Sat, Dec 9, 2023 at 6:18 PM Masahiro Yamada wrote:
> On Fri, Dec 8, 2023 at 8:14 PM Tom Cook wrote:
> >
> > I'm trying to build a signed .deb kernel package of
> > https://github.com/torvalds/linux/tree/v6.6. I've copied
> > certs/default_x509.genkey to cert
Smatch reports this issue
security.c:416:6: warning: symbol '__nvdimm_security_overwrite_query' was not
declared. Should it be static?
__nvdimm_security_overwrite_query is only used in security.c so change
its storage-class specifier to static
Signed-off-by: Tom Rix
---
drivers/nvdimm
if (offset >= len) {
+ dev_warn(>dev, "bad port offset %u >=
%pa\n",
+offset, );
why %pa, for instead of %u,len ?
Tom
+ continue;
+ }
+ len -= offset;
+
Hi Vinod,
On 4/20/2021 6:11 AM, Vinod Koul wrote:
On 03-04-21, 11:45, Tom Zanussi wrote:
+config INTEL_IDXD_PERFMON
+ bool "Intel Data Accelerators performance monitor support"
+ depends on INTEL_IDXD
+ default y
default y..?
Will change to n.
/* IDX
-rt55 by applying the incremental patch:
https://www.kernel.org/pub/linux/kernel/projects/rt/5.4/incr/patch-5.4.109-rt55-rt56.patch.xz
Enjoy!
Tom
Changes from v5.4.109-rt55:
---
Sebastian Andrzej Siewior (1):
mm: slub: Don't resize the location tracking cache on PREEMPT_RT
Tom Zanussi
On 4/15/21 11:09 AM, Paolo Bonzini wrote:
> On 07/04/21 20:00, Tom Lendacky wrote:
>> For the series:
>>
>> Acked-by: Tom Lendacky
>
> Shall I take this as a request (or permission, whatever :)) to merge it
> through the KVM tree?
Adding Herbert. Here'
m/Xilinx/dma_ip_drivers
Maybe its kernel or dpdk driver has what you need.
Tom
_LEGACY_INVALID 0x
+/* Secure update doorbell register, in system register region */
+#define M10BMC_DOORBELL0x400
To be consistent with the existing register #defines,
The bit values for the register should follow the register and have a
M10BMC_ prefix
To
On 4/9/21 11:50 AM, Max Zhen wrote:
Hi Tom,
On 3/31/21 6:03 AM, Tom Rix wrote:
On 3/23/21 10:29 PM, Lizhi Hou wrote:
The PCIE device driver which attaches to management function on Alveo
devices. It instantiates one or more group drivers which, in turn,
instantiate platform drivers
Acked-by: Lee Jones
lgtm
Reviewed-by: Tom Rix
---
v2: change variable name from m10bmc_bmc_subdevs to m10bmc_d5005_subdevs
added Acked-by: Lee Jones
---
drivers/hwmon/intel-m10-bmc-hwmon.c | 122
drivers/mfd/intel-m10-bmc.c | 10 +++
2
regbus_cfg);
+ if (IS_ERR(aspi->regmap))
+ return PTR_ERR(aspi->regmap);
+
+ aspi->altr_spi = create_cntrl(dev, aspi->base, _bmc_info);
it does not seem like this can fail for device reasons. is there a
sanity check on the reg values that could be done ?
Tom
On 4/12/2021 6:48 PM, Jason Gunthorpe wrote:
On Mon, Apr 12, 2021 at 04:20:47PM -0400, Tom Talpey wrote:
So the issue is only in testing all the providers and platforms,
to be sure this new behavior isn't tickling anything that went
unnoticed all along, because no RDMA provider ever issued RO
moving this function.
It should have been used in xlnx_pr_decoupler_enable_show() instead of
the bare readl().
So use it in this function, and for consistency rename to
xlnx_pr_decoupler_read()
that is 'decouple' -> 'decoupler'
Tom
static int xlnx_pr_decoupler_enable_set(struct fpga_bridg
On 4/12/2021 2:32 PM, Haakon Bugge wrote:
On 10 Apr 2021, at 15:30, David Laight wrote:
From: Tom Talpey
Sent: 09 April 2021 18:49
On 4/9/2021 12:27 PM, Haakon Bugge wrote:
On 9 Apr 2021, at 17:32, Tom Talpey wrote:
On 4/9/2021 10:45 AM, Chuck Lever III wrote:
On Apr 9, 2021, at 10
1a353f4b127ed57279279f851c6b4917
> Suggested-by: Simon Glass
> Signed-off-by: Nathan Chancellor
Reviewed-by: Tom Rini
--
Tom
signature.asc
Description: PGP signature
On 4/9/2021 12:27 PM, Haakon Bugge wrote:
On 9 Apr 2021, at 17:32, Tom Talpey wrote:
On 4/9/2021 10:45 AM, Chuck Lever III wrote:
On Apr 9, 2021, at 10:26 AM, Tom Talpey wrote:
On 4/6/2021 7:49 AM, Jason Gunthorpe wrote:
On Mon, Apr 05, 2021 at 11:42:31PM +, Chuck Lever III wrote
On 4/9/2021 12:40 PM, Jason Gunthorpe wrote:
On Fri, Apr 09, 2021 at 10:26:21AM -0400, Tom Talpey wrote:
My belief is that the biggest risk is from situations where completions
are batched, and therefore polling is used to detect them without
interrupts (which explicitly).
We don't do
On 4/9/21 9:38 AM, Tom Lendacky wrote:
> From: Tom Lendacky
>
> Access to the GHCB is mainly in the VMGEXIT path and it is known that the
> GHCB will be mapped. But there are two paths where it is possible the GHCB
> might not be mapped.
>
> The sev_vcpu_deliver_
On 4/9/2021 10:45 AM, Chuck Lever III wrote:
On Apr 9, 2021, at 10:26 AM, Tom Talpey wrote:
On 4/6/2021 7:49 AM, Jason Gunthorpe wrote:
On Mon, Apr 05, 2021 at 11:42:31PM +, Chuck Lever III wrote:
We need to get a better idea what correctness testing has been done,
and whether
On 4/8/21 2:48 PM, Sean Christopherson wrote:
> On Thu, Apr 08, 2021, Tom Lendacky wrote:
>>
>>
>> On 4/8/21 12:37 PM, Sean Christopherson wrote:
>>> On Thu, Apr 08, 2021, Tom Lendacky wrote:
>>>> On 4/8/21 12:10 PM, Sean Christopherson wrote:
>
From: Tom Lendacky
Access to the GHCB is mainly in the VMGEXIT path and it is known that the
GHCB will be mapped. But there are two paths where it is possible the GHCB
might not be mapped.
The sev_vcpu_deliver_sipi_vector() routine will update the GHCB to inform
the caller of the AP Reset Hold
on the platforms they have.
Yes, and "test" be taken seriously with focus on ULP data integrity.
Speedups will mean nothing if the data is ever damaged.
Tom.
On 4/8/21 12:37 PM, Sean Christopherson wrote:
> On Thu, Apr 08, 2021, Tom Lendacky wrote:
>> On 4/8/21 12:10 PM, Sean Christopherson wrote:
>>> On Thu, Apr 08, 2021, Tom Lendacky wrote:
>>>> diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c
>>
On 4/8/21 12:10 PM, Sean Christopherson wrote:
> On Thu, Apr 08, 2021, Tom Lendacky wrote:
>> From: Tom Lendacky
>>
>> Access to the GHCB is mainly in the VMGEXIT path and it is known that the
>> GHCB will be mapped. But there are two paths where it is possible the
F(VIRT_SSBD) |
> - F(AMD_SSB_NO) | F(AMD_STIBP) | F(AMD_STIBP_ALWAYS_ON)
> + F(AMD_SSB_NO) | F(AMD_STIBP) | F(AMD_STIBP_ALWAYS_ON) |
> F(AMD_PSFD)
Please note that this patch has a pre-req against the PSFD support that
defines this feature:
https://lore.kernel.org/lkml/20210406155004.230790-2-rsari...@amd.com/#t
Thanks,
Tom
> );
>
> /*
>
From: Tom Lendacky
Access to the GHCB is mainly in the VMGEXIT path and it is known that the
GHCB will be mapped. But there are two paths where it is possible the GHCB
might not be mapped.
The sev_vcpu_deliver_sipi_vector() routine will update the GHCB to inform
the caller of the AP Reset Hold
On 4/8/21 11:14 AM, Paolo Bonzini wrote:
> On 08/04/21 18:04, Tom Lendacky wrote:
>>>>> + if (!err || !sev_es_guest(vcpu->kvm) ||
>>>>> !WARN_ON_ONCE(svm->ghcb))
>>>> This should be WARN_ON_ONCE(!svm->ghcb), otherwise you'll get th
On 4/7/21 4:07 PM, Sean Christopherson wrote:
> On Wed, Apr 07, 2021, Tom Lendacky wrote:
>> On 4/7/21 3:08 PM, Sean Christopherson wrote:
>>> On Wed, Apr 07, 2021, Tom Lendacky wrote:
>>>> From: Tom Lendacky
>>>>
>>>> The sev_vcpu_delive
On 4/7/21 2:45 PM, Borislav Petkov wrote:
> On Wed, Apr 07, 2021 at 01:25:55PM +0200, Borislav Petkov wrote:
>> On Tue, Apr 06, 2021 at 02:42:43PM -0500, Tom Lendacky wrote:
>>> The GHCB spec only defines the "0" reason code set. We could provide Linux
>>> it
On 4/7/21 3:08 PM, Sean Christopherson wrote:
> On Wed, Apr 07, 2021, Tom Lendacky wrote:
>> From: Tom Lendacky
>>
>> The sev_vcpu_deliver_sipi_vector() routine will update the GHCB to inform
>> the caller of the AP Reset Hold NAE event that a SIPI has been deliv
From: Tom Lendacky
The sev_vcpu_deliver_sipi_vector() routine will update the GHCB to inform
the caller of the AP Reset Hold NAE event that a SIPI has been delivered.
However, if a SIPI is performed without a corresponding AP Reset Hold,
then the GHCB may not be mapped, which will result
patch (definitely feel free to drop the patch if it's not worth
> backporting). [Christophe]
> - s/intput/input/. [Tom]
> - Add a patch to free "sev" if init fails. This is not strictly
> necessary (I think; I suck horribly when it comes to the driver
>
SEV-SNP guests.
The final version of the spec documents that and should be published
within the next few days.
Thanks,
Tom
>
>
>>
>>> because the hypervisor may prefer that a guest use a consistent and/or
>>> specific GPA for the GHCB associated with a vCPU. For
.
> While exiting from the decompression the sev_es_shutdown_ghcb() is
> called to deinit the GHCB.
>
> sev_es_shutdown_ghcb()
>
> set_page_encrypted()
>
> sev_snp_set_page_private()
>
> Now that sev_snp_set_private() is called after the GHCB is established.
I believe
+#
+
+config FPGA_XRT_XMGMT
+ tristate "Xilinx Alveo Management Driver"
+ depends on FPGA_XRT_LIB
+ select FPGA_XRT_METADATA
If the XRT driver depends on these other two configs and it does not
make sense to build these two seperately, could you remove these configs
an
E)
+ return;
ok
+
+ leaf = xleaf_get_leaf_by_id(pdev, id, instance);
+ if (!leaf)
+ return;
+
+ res = platform_get_resource(leaf, IORESOURCE_MEM, 0);
+ if (!res || !strncmp(res->name, gate->ep_name, strlen(res->name) + 1)) {
+
break;
+ msleep(XRT_CALIB_READ_INTERVAL);
ok
Reviewed-by: Tom Rix
+ times--;
+ }
+
+ if (!times) {
+ xrt_err(calib->pdev,
+ "MIG calibration timeout after bitstream download");
+
obj, _attr_group);
+ if (ret) {
+ CLKFREQ_ERR(clkfreq, "create clkfreq attrs failed: %d", ret);
+ goto failed;
+ }
+
+ CLKFREQ_INFO(clkfreq, "successfully initialized clkfreq subdev");
+
+ return 0;
+
+failed:
+ return ret;
+}
+
+ int err = 0;
+
+ err = xrt_md_get_prop(DEV(clock->pdev), pdata->xsp_dtb,
+ clock->clock_ep_name, NULL, XRT_MD_PROP_CLK_FREQ,
+ (const void **), NULL);
+ if (err) {
+ xrt_info(clock->pdev, "no default freq");
+
cial like
>>
>> GHCB_SEV_ES_REASON_PSC_FAILURE
>>
>> or so, so that users know what has happened?
>
>
> Current GHCB does not have special code for this. But I think Linux
> guest can define a special code which can be used to indicate the
> termination reason.
>
*, even ignoring TDX.
>
> BTW, I'm pretty sure I know the answer to the "why would you expose this
> to userspace" question: it's what QEMU/KVM did alreadhy for
> non-encrypted memory, so this was the quickest way to get SEV working.
>
> So, I don't like the #MC either. But, this series is a step in the
> right direction for TDX *AND* SEV.
So, yes, this is a step in the right direction.
Thanks,
Tom
>
p_bulk_read(devctl->regmap[rw_arg->xdr_id],
rw_arg->xdr_offset,
+ rw_arg->xdr_buf,
+ rw_arg->xdr_len /
devctl_regmap_config.reg_stride);
+ break;
+ }
ok, *_WRITE removed.
Thanks for
+
+ return err;
+}
+
+/*
+ * Discover the FPGA IDCODE using special sequence of canned commands
+ */
+static int icap_probe_chip(struct icap *icap)
+{
+ int err;
+ u32 val = 0;
ok, thanks for demagic-ing this function.
Looks good overall, only a few minor things.
Reviewed-by: T
aham I
> ---
> .../pci/controller/cadence/pcie-cadence-ep.c | 207 --
> drivers/pci/controller/cadence/pcie-cadence.h | 7 +
> 2 files changed, 197 insertions(+), 17 deletions(-)
>
Acked-by: Tom Joseph
://www.kernel.org/pub/linux/kernel/projects/rt/5.4/patch-5.4.109-rt55.patch.xz
Enjoy!
Tom
f (acc & ~IB_ACCESS_LOCAL_WRITE) {
dev_warn(>pdev->dev,
"unsupported dma mr access flags %#x\n", acc);
Why does the pvrdma driver require relaxed ordering to be off?
Tom.
ult behavior
without extensive testing.
Tom.
On 4/5/21 11:33 AM, Sean Christopherson wrote:
> On Mon, Apr 05, 2021, Tom Lendacky wrote:
>> On 4/2/21 6:36 PM, Sean Christopherson wrote:
>>> diff --git a/drivers/crypto/ccp/sev-dev.c b/drivers/crypto/ccp/sev-dev.c
>>> index 6556d220713b..4c513318f16a 100644
>&
-zero length and are not known to the kernel. This is not an
> explicit goal, but arguably the side effect is a good thing from the
> kernel's perspective.
>
> Cc: Brijesh Singh
> Cc: Borislav Petkov
> Cc: Tom Lendacky
> Signed-off-by: Sean Christopherson
> ---
>
From: Tom Zanussi
Hi,
This is v2 of the IDXD pmu support patch, which is the same as v1 but
removes a few assigned-but-unused variables reported by kernel test
robot .
Thanks,
Tom
-- original v1 text --
Hi,
This patchset implements initial pmu support for the Intel DSA (Data
Streaming
. ]
Reviewed-by: Dave Jiang
Reviewed-by: Kan Liang
Signed-off-by: Tom Zanussi
---
drivers/dma/Kconfig | 13 +
drivers/dma/idxd/Makefile| 2 +
drivers/dma/idxd/idxd.h | 45 +++
drivers/dma/idxd/init.c | 9 +
drivers/dma/idxd/irq.c | 5 +-
drivers/dma/idxd/perfmon.c
. ]
Reviewed-by: Dave Jiang
Reviewed-by: Kan Liang
Signed-off-by: Tom Zanussi
---
drivers/dma/Kconfig | 13 +
drivers/dma/idxd/Makefile| 2 +
drivers/dma/idxd/idxd.h | 45 +++
drivers/dma/idxd/init.c | 9 +
drivers/dma/idxd/irq.c | 5 +-
drivers/dma/idxd/perfmon.c
if there would be
some interest in it, especially considering there will probably be
future pmu support added that could benefit from it.
Thanks,
Tom
[1]:
https://software.intel.com/content/www/us/en/develop/download/intel-data-streaming-accelerator-preliminary-architecture
Please add to this patch cover letter what you want to discuss.
Got this new feature, not sure about ...
Tom
On 4/2/21 2:09 AM, Nava kishore Manne wrote:
> Nava kishore Manne (3):
> fpga: region: Add fpga-region property 'fpga-config-from-dmabuf'
> fpga: support loading from a pre-
XRT_SUBDEV_CLOCK, instance);
> + if (!leaf) {
> + xrt_err(pdev, "does not get clock subdev");
> + return;
> + }
> +
> + xleaf_call(leaf, XRT_CLOCK_VERIFY, NULL);
> + xleaf_put_leaf(pdev, leaf);
> +}
ok on removing ucs_check.
vsec->regmap = devm_regmap_init_mmio(>pdev->dev, base,
> _regmap_config);
> + if (IS_ERR(vsec->regmap)) {
> + xrt_err(vsec->pdev, "regmap %pR failed", res);
> + return PTR_ERR(vsec->regmap);
> + }
> +
> + ret = r
that wrappers around core memory allocators are to
be avoided.
Tom.
}
> + break;
> + }
> + case XRT_MGMT_MAIN_GET_VBNV: {
> + char **vbnv_p = (char **)arg;
> +
> + *vbnv_p = xmgmt_get_vbnv(pdev);
> + if (!*vbnv_p)
> + ret = -EINVAL;
ok
> + break;
> +
if (!compat_region) {
> + xrt_err(pdev, "failed to get compatible region");
> + rc = -ENOENT;
> + goto failed;
> + }
> +
> + xmgmt_region_cleanup(compat_region);
> +
> +
_read_config_byte(bus->self, PCI_BRIDGE_CONTROL, _bctl);
> + pci_write_config_byte(bus->self, PCI_BRIDGE_CONTROL, pci_bctl |
> PCI_BRIDGE_CTL_BUS_RESET);
ok
> + msleep(100);
> + pci_write_config_byte(bus->self, PCI_BRIDGE_CONTROL, pci_bctl);
> + ssleep(1);
>
pl(spool, XRT_SUBDEV_MATCH_NEXT,
> + tgt, spool->xsp_owner, )) {
> + tgt = sdev->xs_pdev;
> + evt.xe_evt = e;
> + evt.xe_subdev.xevt_subdev_id = sdev->xs_id;
> + evt.
s.bringup_work, xroot_bringup_group_work);
> + atomic_set(>groups.bringup_pending, 0);
> + atomic_set(>groups.bringup_failed, 0);
> + init_completion(>groups.bringup_comp);
> +}
> +
> +static void xroot_groups_fini(struct xroot *xr)
> +{
> + flush_s
file_name);
> + }
> + } else {
> + snprintf(fname, sizeof(fname), "%s/%s/%s.%s", XRT_CDEV_DIR,
> + DEV_PDATA(pdev)->xsp_root_name, file_name, inst_name);
> + }
> + sysdev = device_create(xrt_class, N
}
> + if (!dtb) {
> + /*
> + * No more dtb to cut or bad things happened
> for this instance,
> + * switch to the next one.
> +
d comment to effect that dynamically adding drivers/ID's are not supported.
> +static void (*leaf_init_fini_cbs[])(bool) = {
> + group_leaf_init_fini,
> + vsec_leaf_init_fini,
> + devctl_leaf_init_fini,
> + axigate_leaf_init_fini,
> + icap_leaf_init_fini,
> +
On Fri, Mar 26, 2021 at 09:46:36AM -0600, Jens Axboe wrote:
> On 3/26/21 9:45 AM, Tom Saeger wrote:
> > On Fri, Mar 26, 2021 at 09:41:49AM -0600, Jens Axboe wrote:
> >> On 3/25/21 9:04 PM, Tom Saeger wrote:
> >>>
> >>> s/Additonal/Additional/
> &g
/* axlf's uniqueId, use it to */
> + /* skip redownload etc */
> + struct axlf_header header; /* Inline header */
> + struct axlf_section_header sections[1]; /* One or more section */
> +
I'm not really a fan of using device-tree overlays for this (and
> again, apologies, I should've voiced this earlier ...).
>
> Anyways, let's find a common API for this and Russ' work, they're trying
> to achieve the same / similar thing, they should use the same API.
>
> I'd like to re-invetigate the possiblity to extend FPGA Manager with
> 'secure update' ops that work for both these use-cases (and I susspect
> hte XRT patchset will follow with a similar requirement, right after).
The xrt patchset makes heavy use of device trees.
What is the general guidance for device tree usage ?
Tom
>
> - Moritz
>
INVAL;
> + }
> +
> + ret = xrt_md_overlay(dev, blob, target, src_blob, offset, 0);
> + if (ret)
> + dev_err(dev, "overlay failed, ret = %d", ret);
> +
> + return ret;
> +}
> +EXPORT_SYMBOL_GPL(xrt_md_copy_endpoint);
> +
> +int xrt_md_get_next_endpoint(struct device *dev, const char *blob,
> + const char *ep_name, const char *regmap_name,
> + char **next_ep, char **next_regmap)
> +{
> + int offset, ret;
> +
> + *next_ep = NULL;
> + *next_regmap = NULL;
> + if (!ep_name) {
> + ret = xrt_md_get_endpoint(dev, blob, XRT_MD_NODE_ENDPOINTS,
> NULL,
> + );
> + } else {
> + ret = xrt_md_get_endpoint(dev, blob, ep_name, regmap_name,
> + );
> + }
> +
> + if (ret)
> + return -EINVAL;
> +
> + offset = ep_name ? fdt_next_subnode(blob, offset) :
> + fdt_first_subnode(blob, offset);
tristate with function calls is harder to follow, convert this to if-else logic
> + if (offset < 0)
> + return -EINVAL;
> +
> + *next_ep = (char *)fdt_get_name(blob, offset, NULL);
> + *next_regmap = (char *)fdt_stringlist_get(blob, offset,
> XRT_MD_PROP_COMPATIBLE,
> + 0, NULL);
> +
> + return 0;
> +}
> +EXPORT_SYMBOL_GPL(xrt_md_get_next_endpoint);
> +
> +int xrt_md_get_compatible_endpoint(struct device *dev, const char *blob,
> +const char *regmap_name, const char
> **ep_name)
> +{
> + int ep_offset;
> +
> + ep_offset = fdt_node_offset_by_compatible(blob, -1, regmap_name);
> + if (ep_offset < 0) {
> + *ep_name = NULL;
> + return -ENOENT;
> + }
> +
> + *ep_name = fdt_get_name(blob, ep_offset, NULL);
> +
> + return 0;
> +}
> +EXPORT_SYMBOL_GPL(xrt_md_get_compatible_endpoint);
> +
> +int xrt_md_pack(struct device *dev, char *blob)
> +{
> + int ret;
> +
> + ret = fdt_pack(blob);
> + if (ret)
> + dev_err(dev, "pack failed %d", ret);
> +
> + return ret;
> +}
> +EXPORT_SYMBOL_GPL(xrt_md_pack);
> +
> +int xrt_md_get_interface_uuids(struct device *dev, const char *blob,
ok
> +u32 num_uuids, uuid_t *interface_uuids)
> +{
> + int offset, count = 0;
> + const char *uuid_str;
> + int ret;
> +
> + ret = xrt_md_get_endpoint(dev, blob, XRT_MD_NODE_INTERFACES, NULL,
> );
> + if (ret)
> + return -ENOENT;
> +
> + for (offset = fdt_first_subnode(blob, offset);
> + offset >= 0;
> + offset = fdt_next_subnode(blob, offset), count++) {
> + uuid_str = fdt_getprop(blob, offset, XRT_MD_PROP_INTERFACE_UUID,
> +NULL);
> + if (!uuid_str) {
> + dev_err(dev, "empty interface uuid node");
> + return -EINVAL;
> + }
> +
> + if (!num_uuids)
> + continue;
> +
> + if (count == num_uuids) {
ok
> + dev_err(dev, "too many interface uuid in blob");
> + return -EINVAL;
> + }
> +
> + if (interface_uuids && count < num_uuids) {
> + ret = xrt_md_trans_str2uuid(dev, uuid_str,
> + _uuids[count]);
> + if (ret)
> + return -EINVAL;
> + }
> + }
> + if (!count)
> + count = -ENOENT;
> +
> + return count;
> +}
> +EXPORT_SYMBOL_GPL(xrt_md_get_interface_uuids);
Thanks for the changes,
Tom
.git.tom.sae...@oracle.com/
Signed-off-by: Tom Saeger
---
Changes in v2:
* drop entry `readded||read`, "readded" is in fact "readded"
* Link to v1:
https://lore.kernel.org/lkml/14c54ee47bf0e9aebfe71e97cefd11b2b8f0332f.1616784384.git.tom.sae...@oracl
On Fri, Mar 26, 2021 at 04:36:01PM -0600, Jens Axboe wrote:
> On 3/26/21 1:22 PM, Tom Saeger wrote:
> > @@ -1153,6 +1170,7 @@ quering||querying
> > queus||queues
> > randomally||randomly
> > raoming||roaming
> > +readded||read
> > reasearcher||re
gt; +reg = <0x00 0x00 0x00 0x2>;
> +pcie_physical_function = <0x00>;
> +compatible = "xilinx.com,reg_abs-msix-1.0\0msix";
> +
On Wed, Mar 24, 2021 at 10:55:27AM +0100, Greg Kroah-Hartman wrote:
> On Tue, Mar 23, 2021 at 01:28:38PM -0700, Nick Desaulniers wrote:
> > On Tue, Mar 23, 2021 at 12:05 PM Greg Kroah-Hartman
> > wrote:
> > >
> > > The only time git gets involved is when we do a -rc release or when we
> > > do a
.git.tom.sae...@oracle.com/
Signed-off-by: Tom Saeger
---
scripts/spelling.txt | 27 ++-
1 file changed, 26 insertions(+), 1 deletion(-)
diff --git a/scripts/spelling.txt b/scripts/spelling.txt
index 2e3ba91a5072..f7a3bfd75787 100644
--- a/scripts/spelling.txt
+++ b
On Fri, Mar 26, 2021 at 09:41:49AM -0600, Jens Axboe wrote:
> On 3/25/21 9:04 PM, Tom Saeger wrote:
> >
> > s/Additonal/Additional/
> > s/assocaited/associated/
> > s/assocaited/associated/
> > s/assocating/associating/
> > s/becasue/because/
> > s/co
/
s/Secion/Section/
s/soley/solely/
Cc: triv...@kernel.org
Signed-off-by: Tom Saeger
---
block/bfq-iosched.c | 4 ++--
block/blk-cgroup-rwstat.c | 2 +-
block/blk-cgroup.c| 6 +++---
block/blk-core.c | 2 +-
block/blk-iocost.c| 12 ++--
block/blk
://www.kernel.org/pub/linux/kernel/projects/rt/4.19/patch-4.19.182-rt74.patch.xz
Enjoy!
Tom
, lock);
> - if (status != SUCCESS) return ERROR;
> -
> - status = PC4500_readrid(ai, RID_RSSI,_rid,
> sizeof(rssi_rid), lock);
This is reading into a stack temp
> - if (status == SUCCESS) {
> -
("x86: Add support for changing memory encryption
> attribute in early boot")
> Reviewed-by: Kirill A. Shutemov
> Signed-off-by: Isaku Yamahata
Reviewed-by: Tom Lendacky
> ---
> arch/x86/mm/mem_encrypt.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
>
This was for a different reason.
imo, you do not need to include what another patch did.
so you could also just remove this bit from the commit log.
The change itself looks good.
Reviewed-by: Tom Rix
>
> Fixes: 0b437e64e0af ("drm/amdgpu: remove h from printk format specifier&quo
On 3/21/21 2:05 PM, Richard Gong wrote:
>
> Hi Tom,
>
>>
>>
>> On 3/19/21 4:22 PM, Richard Gong wrote:
>>>
>>> Hi Moritz,
>>>
>>> Thanks for approving the 1st patch of my version 5 patchest, which
>>> submitted on 02/09
MWARE DRIVERS
M: Richard Gong
-L: linux-kernel@vger.kernel.org
+R: Tom Rix
+L: linux-f...@vger.kernel.org
S: Maintained
F: Documentation/ABI/testing/sysfs-devices-platform-stratix10-rsu
F: Documentation/devicetree/bindings/firmware/intel,stratix10-svc.txt
I also added myself as
/**
> > - * blk_mq_tagset_wait_completed_request - wait until all completed req's
> > - * complete funtion is run
completion function
That's my read of it.
--Tom
> > + * blk_mq_tagset_wait_completed_request - wait until all the req's
>
>
LGTM feel free to add
Reviewed-By: Tom Talpey
On 3/19/2021 9:57 AM, Vincent Whitchurch wrote:
Make SMB2 not print out an error when an oplock break is received for an
unknown handle, similar to SMB1. The debug message which is printed for
these unknown handles may also be misleading, so fix
On 3/16/21 4:54 PM, Lizhi Hou wrote:
>
>
> On 03/04/2021 05:39 AM, Tom Rix wrote:
>> CAUTION: This message has originated from an External Source. Please use
>> proper judgment and caution when opening attachments, clicking links, or
>> responding to this email.
&
On 3/16/21 2:23 PM, Lizhi Hou wrote:
> Hi Tom,
>
>
> On 02/26/2021 09:22 AM, Tom Rix wrote:
>> On 2/17/21 10:40 PM, Lizhi Hou wrote:
>>> platform driver that handles IOCTLs, such as hot reset and xclbin download.
>>>
>>> Signed-off-by: Sonal Santan
On 3/16/21 1:29 PM, Max Zhen wrote:
> Hi Tom,
>
>
> On 2/26/21 7:01 AM, Tom Rix wrote:
>> CAUTION: This message has originated from an External Source. Please use
>> proper judgment and caution when opening attachments, clicking links, or
>> responding to this e
the SME path. This will fail, but it is also not considered
> a problem because non-encrypted guests have no protection
> against the hypervisor anyway.
>
> Signed-off-by: Joerg Roedel
Acked-by: Tom Lendacky
> ---
> arch/x86/boot/compressed/mem_encryp
| 38 +-
> kernel/trace/trace.h | 9 +--
> kernel/trace/trace_events_hist.c| 100 +-
> kernel/trace/trace_events_trigger.c | 45 +++-
> 7 files changed, 239 insertions(+), 99 deletions(-)
This all looks fine to me.
Reviewed-by: Tom Zanussi
eview"? Both threads are active on the
mailing list. If you or others have something to discuss, please
post it and don't leave us out of the discussion.
Tom.
Regards,
Rohith
On Tue, Mar 16, 2021 at 9:33 PM Tom Talpey wrote:
On 3/16/2021 8:48 AM, Vincent Whitchurch via samba-techn
ot;.
Opportunistically re-flow paragraph for changed lines.
Link:
https://lore.kernel.org/lkml/1563475054-10680-1-git-send-email-thomas....@oracle.com/
Signed-off-by: Tom Saeger
---
Documentation/arm64/acpi_object_usage.rst | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
di
g(FYI, "No file id matched, oplock break ignored\n");
?
Tom.
On Mon, Mar 15, 2021 at 13:18:24 +0100, Guillaume Nault wrote:
> On Fri, Mar 12, 2021 at 10:47:53PM +0800, lyl2...@mail.ustc.edu.cn wrote:
> >
> >
> >
> > > -原始邮件-
> > > 发件人: "Tom Parkin"
> > > 发送时间: 2021-03-12 18:12:
On Fri, Mar 12, 2021 at 22:47:53 +0800, lyl2...@mail.ustc.edu.cn wrote:
>
>
>
> > -原始邮件-----
> > 发件人: "Tom Parkin"
> > 发送时间: 2021-03-12 18:12:58 (星期五)
> > 收件人: lyl2...@mail.ustc.edu.cn
> > 抄送: pau...@samba.org, da...@davemloft.net, linux
On 3/12/21 11:36 AM, Russ Weight wrote:
> Extend the MAX10 BMC Secure Update driver to provide sysfs
> files to expose the canceled code signing key (CSK) bit
> vectors. These use the standard bitmap list format
> (e.g. 1,2-6,9).
>
> Signed-off-by: Russ Weight
>
> create mode 100644
> Documentation/ABI/testing/sysfs-driver-intel-m10-bmc-secure
> create mode 100644 drivers/fpga/intel-m10-bmc-secure.c
>
> diff --git a/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc-secure
> b/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc-secure
>
uses?
> *
> - * The varous i_flctx lists are ordered by:
> + * The various i_flctx lists are ordered by:
> *
> * 1) lock owner
> * 2) lock range start
> --
> 2.26.2
>
How about a few more?
found by running:
codespell -w -i 3 include/linux/fs.h
'specialy' could be 'special' or 's
On Sat, Mar 13, 2021 at 09:19:51AM +0530, Bhaskar Chowdhury wrote:
>
> Trivial spelling fixes throughout the file.
>
LGTM
Reviewed-by: Tom Saeger
> Signed-off-by: Bhaskar Chowdhury
> ---
> Changes from V2:
> Incoporated the findings of Tom Saeger
>
> driver
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