On Thu, 2015-09-17 at 17:13 +0100, Sudeep Holla wrote:
>
> On 17/09/15 15:56, Yingjoe Chen wrote:
> > On Thu, 2015-09-17 at 14:51 +0100, Sudeep Holla wrote:
> >>
> >> On 16/09/15 03:04, Yingjoe Chen wrote:
> >>> From: Daniel Kurtz
> >>>
On Sat, 2015-09-26 at 10:38 +0100, Russell King - ARM Linux wrote:
> On Thu, Sep 24, 2015 at 11:38:58PM +0800, Yingjoe Chen wrote:
> > +struct mtk_smp_boot_info {
> > + unsigned long smp_base;
> ...
> > +static const struct mtk_smp_boot_info mtk_mt8135_tz_boot = {
&
On Thu, 2015-09-17 at 17:13 +0100, Sudeep Holla wrote:
>
> On 17/09/15 15:56, Yingjoe Chen wrote:
> > On Thu, 2015-09-17 at 14:51 +0100, Sudeep Holla wrote:
> >>
> >> On 16/09/15 03:04, Yingjoe Chen wrote:
> >>> From: Daniel Kurtz <djku...@chromium.o
On Thu, 2015-09-17 at 17:41 +0100, Mark Rutland wrote:
> On Thu, Sep 17, 2015 at 03:56:56PM +0100, Yingjoe Chen wrote:
> > On Thu, 2015-09-17 at 14:51 +0100, Sudeep Holla wrote:
> > >
> > > On 16/09/15 03:04, Yingjoe Chen wrote:
> > > > F
On Sat, 2015-09-26 at 10:38 +0100, Russell King - ARM Linux wrote:
> On Thu, Sep 24, 2015 at 11:38:58PM +0800, Yingjoe Chen wrote:
> > +struct mtk_smp_boot_info {
> > + unsigned long smp_base;
> ...
> > +static const struct mtk_smp_boot_info mtk_mt8135_tz_boot = {
&
On Thu, 2015-09-24 at 23:38 +0800, Yingjoe Chen wrote:
> Add arch timer node to enable arch-timer support. MT8135 firmware
> doesn't correctly setup arch-timer frequency and CNTVOFF, add
> properties to workaround this.
>
> This also set cpu enable-method to enable SMP.
On Fri, 2015-08-07 at 18:50 +0800, Yingjoe Chen wrote:
> On Wed, 2015-08-05 at 23:31 +0100, Russell King - ARM Linux wrote:
> > The problem is that this patch series uses memblock_reserve() way after
> > the memory has been transitioned out of memblock's control, so actually
> &g
Add arch timer node to enable arch-timer support. MT8127 firmware
doesn't correctly setup arch-timer frequency and CNTVOFF, add
properties to workaround this.
This also set cpu enable-method to enable SMP.
Signed-off-by: Yingjoe Chen
---
arch/arm/boot/dts/mt8127.dtsi | 27
This commit add new cpu enable method "mediatek,mt65xx-smp" and
"mediatek,mt81xx-tz-smp".
Signed-off-by: Yingjoe Chen
---
Documentation/devicetree/bindings/arm/cpus.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/cpus.
Add arch timer node to enable arch-timer support. MT8135 firmware
doesn't correctly setup arch-timer frequency and CNTVOFF, add
properties to workaround this.
This also set cpu enable-method to enable SMP.
Signed-off-by: Yingjoe Chen
---
arch/arm/boot/dts/mt8135.dtsi | 27
Add support for booting secondary CPUs on mt6589, mt8127
and mt8135.
Signed-off-by: Yingjoe Chen
---
arch/arm/mach-mediatek/Makefile | 3 +
arch/arm/mach-mediatek/platsmp.c | 141 +++
2 files changed, 144 insertions(+)
create mode 100644 arch/arm/mach
From: Matthias Brugger
We enable GTP6 which ungates the arch timer clock.
In the future this should be done in the bootloader.
Signed-off-by: Matthias Brugger
Signed-off-by: Yingjoe Chen
---
arch/arm/mach-mediatek/mediatek.c | 27 +++
1 file changed, 27 insertions
ml
v1:
http://lists.infradead.org/pipermail/linux-mediatek/2015-May/000528.html
[1]
http://lists.infradead.org/pipermail/linux-mediatek/2015-July/001570.html
[2]
http://lists.infradead.org/pipermail/linux-mediatek/2015-July/001544.html
Matthias Brugger (1):
ARM: mediatek: enable gpt6 on boot up t
ml
v1:
http://lists.infradead.org/pipermail/linux-mediatek/2015-May/000528.html
[1]
http://lists.infradead.org/pipermail/linux-mediatek/2015-July/001570.html
[2]
http://lists.infradead.org/pipermail/linux-mediatek/2015-July/001544.html
Matthias Brugger (1):
ARM: mediatek: enable gpt6 on boot up t
Add support for booting secondary CPUs on mt6589, mt8127
and mt8135.
Signed-off-by: Yingjoe Chen <yingjoe.c...@mediatek.com>
---
arch/arm/mach-mediatek/Makefile | 3 +
arch/arm/mach-mediatek/platsmp.c | 141 +++
2 files changed, 144 insertions(+)
From: Matthias Brugger <matthias@gmail.com>
We enable GTP6 which ungates the arch timer clock.
In the future this should be done in the bootloader.
Signed-off-by: Matthias Brugger <matthias@gmail.com>
Signed-off-by: Yingjoe Chen <yingjoe.c...@mediatek.com>
---
arch
This commit add new cpu enable method "mediatek,mt65xx-smp" and
"mediatek,mt81xx-tz-smp".
Signed-off-by: Yingjoe Chen <yingjoe.c...@mediatek.com>
---
Documentation/devicetree/bindings/arm/cpus.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentati
Add arch timer node to enable arch-timer support. MT8135 firmware
doesn't correctly setup arch-timer frequency and CNTVOFF, add
properties to workaround this.
This also set cpu enable-method to enable SMP.
Signed-off-by: Yingjoe Chen <yingjoe.c...@mediatek.com>
---
arch/arm/boot/dts/mt813
Add arch timer node to enable arch-timer support. MT8127 firmware
doesn't correctly setup arch-timer frequency and CNTVOFF, add
properties to workaround this.
This also set cpu enable-method to enable SMP.
Signed-off-by: Yingjoe Chen <yingjoe.c...@mediatek.com>
---
arch/arm/boot/dts/mt812
On Fri, 2015-08-07 at 18:50 +0800, Yingjoe Chen wrote:
> On Wed, 2015-08-05 at 23:31 +0100, Russell King - ARM Linux wrote:
> > The problem is that this patch series uses memblock_reserve() way after
> > the memory has been transitioned out of memblock's control, so actually
> &g
On Thu, 2015-09-24 at 23:38 +0800, Yingjoe Chen wrote:
> Add arch timer node to enable arch-timer support. MT8135 firmware
> doesn't correctly setup arch-timer frequency and CNTVOFF, add
> properties to workaround this.
>
> This also set cpu enable-method to enable SMP.
On Thu, 2015-09-17 at 14:51 +0100, Sudeep Holla wrote:
>
> On 16/09/15 03:04, Yingjoe Chen wrote:
> > From: Daniel Kurtz
> >
> > Add device node to enable GPT timer. This timer will be
> > used as sched clock source.
> >
>
> Interesting any known iss
On Thu, 2015-09-17 at 14:51 +0100, Sudeep Holla wrote:
>
> On 16/09/15 03:04, Yingjoe Chen wrote:
> > From: Daniel Kurtz <djku...@chromium.org>
> >
> > Add device node to enable GPT timer. This timer will be
> > used as sched clock source.
> >
>
>
On Wed, 2015-09-16 at 10:04 +0800, Yingjoe Chen wrote:
> Enable MTK_TIMER for MediaTek plaform, which will be used as
> schedule clock.
Sorry, sending this series too early without cover letter and removing
Change-Id. Here's the cover letter:
This is actually v3 of "add GPT ti
From: Daniel Kurtz
Add device node to enable GPT timer. This timer will be
used as sched clock source.
Change-Id: Idc4e3f0ee80b5c36cae6f0f2328f94aafcca1253
Signed-off-by: Daniel Kurtz
Signed-off-by: Eddie Huang
Signed-off-by: Yingjoe Chen
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 9
Enable MTK_TIMER for MediaTek plaform, which will be used as
schedule clock.
Change-Id: Ib77a0bf01193102c755077b6e72e73e477b18e5f
Signed-off-by: Yingjoe Chen
---
arch/arm64/Kconfig.platforms | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64
Node name in device tree should describe general class of the
device. Correct incorrect i2c node names.
Signed-off-by: Yingjoe Chen
---
This is based on v4.3-rc1.
All the other i2c node names are correct.
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 6 +++---
1 file changed, 3 insertions
On Wed, 2015-09-16 at 10:04 +0800, Yingjoe Chen wrote:
> Enable MTK_TIMER for MediaTek plaform, which will be used as
> schedule clock.
Sorry, sending this series too early without cover letter and removing
Change-Id. Here's the cover letter:
This is actually v3 of "add GPT ti
Node name in device tree should describe general class of the
device. Correct incorrect i2c node names.
Signed-off-by: Yingjoe Chen <yingjoe.c...@mediatek.com>
---
This is based on v4.3-rc1.
All the other i2c node names are correct.
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 6 +++---
Enable MTK_TIMER for MediaTek plaform, which will be used as
schedule clock.
Change-Id: Ib77a0bf01193102c755077b6e72e73e477b18e5f
Signed-off-by: Yingjoe Chen <yingjoe.c...@mediatek.com>
---
arch/arm64/Kconfig.platforms | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch
com>
Signed-off-by: Yingjoe Chen <yingjoe.c...@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index d18ee42..d763803 100644
--- a/arch
Hi Alexandre, Thierry,
On Thu, 2015-09-03 at 21:08 +0800, YH Huang wrote:
<...>
> From Alexandre Courbot <>
> Subject [PATCH 2/2] pwm-backlight: switch to gpiod interface
> Date Thu, 27 Feb 2014 14:53:34 +0900
>
> Switch to the new gpiod interface, which allows to handle GPIO
>
Hi Alexandre, Thierry,
On Thu, 2015-09-03 at 21:08 +0800, YH Huang wrote:
<...>
> From Alexandre Courbot <>
> Subject [PATCH 2/2] pwm-backlight: switch to gpiod interface
> Date Thu, 27 Feb 2014 14:53:34 +0900
>
> Switch to the new gpiod interface, which allows to handle GPIO
>
On Wed, 2015-08-26 at 16:25 +0200, Daniel Lezcano wrote:
> On 08/25/2015 03:21 PM, Yingjoe Chen wrote:
> > Tested-by: Yingjoe Chen
>
> Applied to my tree for 4.4.
>
>-- Daniel
>
Hi Daniel,
I can't find this patch in
https://git.linaro.org/people/daniel.lezcan
On Wed, 2015-08-26 at 16:25 +0200, Daniel Lezcano wrote:
> On 08/25/2015 03:21 PM, Yingjoe Chen wrote:
> > Tested-by: Yingjoe Chen<yingjoe.c...@mediatek.com>
>
> Applied to my tree for 4.4.
>
>-- Daniel
>
Hi Daniel,
I can't find this patch in
https://git.li
On Wed, 2015-08-26 at 09:37 +0200, Daniel Lezcano wrote:
> On 07/13/2015 11:32 AM, Yingjoe Chen wrote:
> > This series add GPT timer support for mt8173. This is based on v4.2-rc1
> > and Matthias' next branch (for dts parts).
> >
> > The first 2 patches comes fr
On Wed, 2015-08-26 at 09:37 +0200, Daniel Lezcano wrote:
On 07/13/2015 11:32 AM, Yingjoe Chen wrote:
This series add GPT timer support for mt8173. This is based on v4.2-rc1
and Matthias' next branch (for dts parts).
The first 2 patches comes from 'Add SMP bringup support for mt65xx socs
On Mon, 2015-08-24 at 23:57 +0200, Daniel Lezcano wrote:
> After analysis done by Yingjoe Chen, the timer appears to have a pending
> interrupt when it is enabled.
>
> Fix this by acknowledging the pending interrupt when enabling the timer
> interrupt.
>
> Signed-o
On Mon, 2015-08-24 at 23:57 +0200, Daniel Lezcano wrote:
After analysis done by Yingjoe Chen, the timer appears to have a pending
interrupt when it is enabled.
Fix this by acknowledging the pending interrupt when enabling the timer
interrupt.
Signed-off-by: Daniel Lezcano daniel.lezc
On Mon, 2015-08-24 at 15:30 +0200, Daniel Lezcano wrote:
> After analysis done by Yingjoe Chen, the timer appears to have a pending
> interrupt when it is enabled.
>
> Fix this by acknowledging the pending interrupt when enabling the timer
> interrupt.
>
> Signed-off-by: Danie
On Mon, 2015-08-24 at 09:51 +0200, Daniel Lezcano wrote:
> On 08/21/2015 04:39 PM, Yingjoe Chen wrote:
>
> [ ... ]
>
> >>- Does the spurious interrupt occurs *every* time ? at each boot ?
> >
> > Yes. If you applied this series to enable mtk timer without thi
On Mon, 2015-08-24 at 09:51 +0200, Daniel Lezcano wrote:
On 08/21/2015 04:39 PM, Yingjoe Chen wrote:
[ ... ]
- Does the spurious interrupt occurs *every* time ? at each boot ?
Yes. If you applied this series to enable mtk timer without this fix on
mt8173 or mt8135 you can
On Mon, 2015-08-24 at 15:30 +0200, Daniel Lezcano wrote:
After analysis done by Yingjoe Chen, the timer appears to have a pending
interrupt when it is enabled.
Fix this by acknowledging the pending interrupt when enabling the timer
interrupt.
Signed-off-by: Daniel Lezcano daniel.lezc
On Thu, 2015-08-20 at 16:28 +0200, Daniel Lezcano wrote:
> On 08/17/2015 04:10 PM, Yingjoe Chen wrote:
> > On Thu, 2015-08-13 at 10:35 +0200, Daniel Lezcano wrote:
> >> On 07/22/2015 10:14 AM, Yingjoe Chen wrote:
> >>> Spurious mtk timer interrupt is noticed at boo
On Thu, 2015-08-20 at 16:28 +0200, Daniel Lezcano wrote:
On 08/17/2015 04:10 PM, Yingjoe Chen wrote:
On Thu, 2015-08-13 at 10:35 +0200, Daniel Lezcano wrote:
On 07/22/2015 10:14 AM, Yingjoe Chen wrote:
Spurious mtk timer interrupt is noticed at boot and cause kernel
crash. It seems if GPT
On Thu, 2015-08-13 at 10:35 +0200, Daniel Lezcano wrote:
> On 07/22/2015 10:14 AM, Yingjoe Chen wrote:
> > Spurious mtk timer interrupt is noticed at boot and cause kernel
> > crash. It seems if GPT is enabled, it will latch irq status even
> > when its IRQ is disabled
On Mon, 2015-08-17 at 17:09 +0800, Daniel Kurtz wrote:
> On Mon, Aug 17, 2015 at 3:52 PM, Yingjoe Chen
> wrote:
> > On Fri, 2015-08-14 at 16:38 +0800, maoguang.m...@mediatek.com wrote:
> >> From: Maoguang Meng
> >>
> >> This patch implement i
On Fri, 2015-08-14 at 16:38 +0800, maoguang.m...@mediatek.com wrote:
> From: Maoguang Meng
>
> This patch implement irq_set_wake to get who is wakeup source and
> setup on suspend resume.
>
> Signed-off-by: Maoguang Meng
>
> ---
> changes since v3:
> -add a comment in mtk_eint_chip_read_mask.
On Mon, 2015-08-17 at 17:09 +0800, Daniel Kurtz wrote:
On Mon, Aug 17, 2015 at 3:52 PM, Yingjoe Chen yingjoe.c...@mediatek.com
wrote:
On Fri, 2015-08-14 at 16:38 +0800, maoguang.m...@mediatek.com wrote:
From: Maoguang Meng maoguang.m...@mediatek.com
This patch implement irq_set_wake
On Thu, 2015-08-13 at 10:35 +0200, Daniel Lezcano wrote:
On 07/22/2015 10:14 AM, Yingjoe Chen wrote:
Spurious mtk timer interrupt is noticed at boot and cause kernel
crash. It seems if GPT is enabled, it will latch irq status even
when its IRQ is disabled. When irq is enabled afterward, we
On Fri, 2015-08-14 at 16:38 +0800, maoguang.m...@mediatek.com wrote:
From: Maoguang Meng maoguang.m...@mediatek.com
This patch implement irq_set_wake to get who is wakeup source and
setup on suspend resume.
Signed-off-by: Maoguang Meng maoguang.m...@mediatek.com
---
changes since v3:
On Wed, 2015-08-05 at 23:31 +0100, Russell King - ARM Linux wrote:
> On Wed, Aug 05, 2015 at 08:44:11PM +0200, Matthias Brugger wrote:
> > On Tuesday, July 14, 2015 01:18:26 PM Yingjoe Chen wrote:
> > > This series add SMP brinup support for MediaTek SoCs. This is based
On Wed, 2015-08-05 at 23:31 +0100, Russell King - ARM Linux wrote:
On Wed, Aug 05, 2015 at 08:44:11PM +0200, Matthias Brugger wrote:
On Tuesday, July 14, 2015 01:18:26 PM Yingjoe Chen wrote:
This series add SMP brinup support for MediaTek SoCs. This is based
on v4.2-rc1 and Matthias' next
On Wed, 2015-07-22 at 16:14 +0800, Yingjoe Chen wrote:
> Spurious mtk timer interrupt is noticed at boot and cause kernel
> crash. It seems if GPT is enabled, it will latch irq status even
> when its IRQ is disabled. When irq is enabled afterward, we see
> spurious interrupt.
> C
On Wed, 2015-07-22 at 16:14 +0800, Yingjoe Chen wrote:
Spurious mtk timer interrupt is noticed at boot and cause kernel
crash. It seems if GPT is enabled, it will latch irq status even
when its IRQ is disabled. When irq is enabled afterward, we see
spurious interrupt.
Change init flow to only
On Tue, 2015-07-14 at 15:39 +0800, Daniel Kurtz wrote:
> Hi Yingjoe,
>
> On Mon, Jul 13, 2015 at 5:32 PM, Yingjoe Chen
> wrote:
> > Spurious mtk timer interrupt is noticed at boot and cause kernel
> > crash. It seems if GPT is enabled, it will latch irq status even
>
Brugger
Reviewed-by: Daniel Kurtz
Signed-off-by: Yingjoe Chen
---
Update to my patch [1], added __init as Daniel suggest. This is the
only patch that need to change in that series, so I only sent this one.
http://lists.infradead.org/pipermail/linux-mediatek/2015-July/001545.html
drivers
On Tue, 2015-07-14 at 15:39 +0800, Daniel Kurtz wrote:
Hi Yingjoe,
On Mon, Jul 13, 2015 at 5:32 PM, Yingjoe Chen yingjoe.c...@mediatek.com
wrote:
Spurious mtk timer interrupt is noticed at boot and cause kernel
crash. It seems if GPT is enabled, it will latch irq status even
when its
Brugger matthias@gmail.com
Reviewed-by: Daniel Kurtz djku...@chromium.org
Signed-off-by: Yingjoe Chen yingjoe.c...@mediatek.com
---
Update to my patch [1], added __init as Daniel suggest. This is the
only patch that need to change in that series, so I only sent this one.
http
Hi Daniel, Chunfeng,
On Mon, 2015-07-20 at 22:39 +0800, chunfeng yun wrote:
> Hi,
>
> On Tue, 2015-07-14 at 18:12 +0800, Daniel Kurtz wrote:
<...>
> > > +
> > > + usb_p1_vbus: fixedregulator@0 {
> >
> > Why @0 ?
> It is the first fixed regulator, so set it to 0 as a index.
> I will
Hi Daniel, Chunfeng,
On Mon, 2015-07-20 at 22:39 +0800, chunfeng yun wrote:
Hi,
On Tue, 2015-07-14 at 18:12 +0800, Daniel Kurtz wrote:
...
+
+ usb_p1_vbus: fixedregulator@0 {
Why @0 ?
It is the first fixed regulator, so set it to 0 as a index.
I will remove it later
On Tue, 2015-07-14 at 09:19 -0500, Nathan Lynch wrote:
> On 07/14/2015 12:18 AM, Yingjoe Chen wrote:
> > Add arch timer node to enable arch-timer support. MT8135 firmware
> > doesn't correctly setup arch-timer frequency and CNTVOFF, add
> > pro
On Tue, 2015-07-14 at 09:19 -0500, Nathan Lynch wrote:
On 07/14/2015 12:18 AM, Yingjoe Chen wrote:
Add arch timer node to enable arch-timer support. MT8135 firmware
doesn't correctly setup arch-timer frequency and CNTVOFF, add
properties to workaround this.
[...]
+ timer
Add support for booting secondary CPUs on mt6589, mt8127
and mt8135.
Signed-off-by: Yingjoe Chen
---
arch/arm/mach-mediatek/Makefile | 3 +
arch/arm/mach-mediatek/platsmp.c | 144 +++
2 files changed, 147 insertions(+)
create mode 100644 arch/arm/mach
Add arch timer node to enable arch-timer support. MT8135 firmware
doesn't correctly setup arch-timer frequency and CNTVOFF, add
properties to workaround this.
This also set cpu enable-method to enable SMP.
Signed-off-by: Yingjoe Chen
---
arch/arm/boot/dts/mt8135.dtsi | 16
1
Add arch timer node to enable arch-timer support. MT8127 firmware
doesn't correctly setup arch-timer frequency and CNTVOFF, add
properties to workaround this.
This also set cpu enable-method to enable SMP.
Signed-off-by: Yingjoe Chen
---
arch/arm/boot/dts/mt8127.dtsi | 16
1
This commit add new cpu enable method "mediatek,mt65xx-smp" and
"mediatek,mt81xx-tz-smp".
Signed-off-by: Yingjoe Chen
---
Documentation/devicetree/bindings/arm/cpus.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/cpus.
From: Matthias Brugger
We enable GTP6 which ungates the arch timer clock.
In the future this should be done in the bootloader.
Signed-off-by: Matthias Brugger
Signed-off-by: Yingjoe Chen
---
arch/arm/mach-mediatek/mediatek.c | 27 +++
1 file changed, 27 insertions
ml
[1]
http://lists.infradead.org/pipermail/linux-mediatek/2015-July/001544.html
Matthias Brugger (1):
ARM: mediatek: enable gpt6 on boot up to make arch timer working
Yingjoe Chen (4):
devicetree: bindings: add new SMP enable method Mediatek SoC
ARM: mediatek: add smp bringup code
ARM: dts
From: Daniel Kurtz
Add device node to enable GPT timer. This timer will be
used as sched clock source.
Signed-off-by: Daniel Kurtz
Signed-off-by: Eddie Huang
Signed-off-by: Yingjoe Chen
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git
Add 13mhz clock used by GPT timer in infracfg.
Signed-off-by: Yingjoe Chen
---
drivers/clk/mediatek/clk-mt8173.c | 5 +
include/dt-bindings/clock/mt8173-clk.h | 3 ++-
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/mediatek/clk-mt8173.c
b/drivers/clk
based on Matthias' and Daniel's
comments.
[1] http://lists.infradead.org/pipermail/linux-mediatek/2015-May/000714.html
Daniel Kurtz (1):
arm64: dts: mt8173: add timer node
Yingjoe Chen (4):
clocksource: mediatek: do not enable GPT_CLK_EVT when setup
clocksource: mediatek: Use GPT as sched
When cpu is in deep idle, arch timer will stop counting. Setup GPT as
sched clock source so it can keep counting in idle.
Signed-off-by: Yingjoe Chen
---
drivers/clocksource/mtk_timer.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/clocksource/mtk_timer.c b/drivers
Enable MTK_TIMER for MediaTek plaform, which will be used as
schedule clock.
Signed-off-by: Yingjoe Chen
---
arch/arm64/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 0f6edb1..5934f51 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64
-by: Yingjoe Chen
---
drivers/clocksource/mtk_timer.c | 16 ++--
1 file changed, 10 insertions(+), 6 deletions(-)
diff --git a/drivers/clocksource/mtk_timer.c b/drivers/clocksource/mtk_timer.c
index 68ab423..237c20b 100644
--- a/drivers/clocksource/mtk_timer.c
+++ b/drivers/clocksource
based on Matthias' and Daniel's
comments.
[1] http://lists.infradead.org/pipermail/linux-mediatek/2015-May/000714.html
Daniel Kurtz (1):
arm64: dts: mt8173: add timer node
Yingjoe Chen (4):
clocksource: mediatek: do not enable GPT_CLK_EVT when setup
clocksource: mediatek: Use GPT as sched
Add 13mhz clock used by GPT timer in infracfg.
Signed-off-by: Yingjoe Chen yingjoe.c...@mediatek.com
---
drivers/clk/mediatek/clk-mt8173.c | 5 +
include/dt-bindings/clock/mt8173-clk.h | 3 ++-
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/mediatek/clk-mt8173
From: Daniel Kurtz djku...@chromium.org
Add device node to enable GPT timer. This timer will be
used as sched clock source.
Signed-off-by: Daniel Kurtz djku...@chromium.org
Signed-off-by: Eddie Huang eddie.hu...@mediatek.com
Signed-off-by: Yingjoe Chen yingjoe.c...@mediatek.com
---
arch/arm64
When cpu is in deep idle, arch timer will stop counting. Setup GPT as
sched clock source so it can keep counting in idle.
Signed-off-by: Yingjoe Chen yingjoe.c...@mediatek.com
---
drivers/clocksource/mtk_timer.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/clocksource
Enable MTK_TIMER for MediaTek plaform, which will be used as
schedule clock.
Signed-off-by: Yingjoe Chen yingjoe.c...@mediatek.com
---
arch/arm64/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 0f6edb1..5934f51 100644
--- a/arch/arm64
-by: Yingjoe Chen yingjoe.c...@mediatek.com
---
drivers/clocksource/mtk_timer.c | 16 ++--
1 file changed, 10 insertions(+), 6 deletions(-)
diff --git a/drivers/clocksource/mtk_timer.c b/drivers/clocksource/mtk_timer.c
index 68ab423..237c20b 100644
--- a/drivers/clocksource/mtk_timer.c
+++ b
Add arch timer node to enable arch-timer support. MT8127 firmware
doesn't correctly setup arch-timer frequency and CNTVOFF, add
properties to workaround this.
This also set cpu enable-method to enable SMP.
Signed-off-by: Yingjoe Chen yingjoe.c...@mediatek.com
---
arch/arm/boot/dts/mt8127.dtsi
/linux-mediatek/2015-July/001544.html
Matthias Brugger (1):
ARM: mediatek: enable gpt6 on boot up to make arch timer working
Yingjoe Chen (4):
devicetree: bindings: add new SMP enable method Mediatek SoC
ARM: mediatek: add smp bringup code
ARM: dts: mt8135: enable basic SMP bringup
Add support for booting secondary CPUs on mt6589, mt8127
and mt8135.
Signed-off-by: Yingjoe Chen yingjoe.c...@mediatek.com
---
arch/arm/mach-mediatek/Makefile | 3 +
arch/arm/mach-mediatek/platsmp.c | 144 +++
2 files changed, 147 insertions(+)
create mode
Add arch timer node to enable arch-timer support. MT8135 firmware
doesn't correctly setup arch-timer frequency and CNTVOFF, add
properties to workaround this.
This also set cpu enable-method to enable SMP.
Signed-off-by: Yingjoe Chen yingjoe.c...@mediatek.com
---
arch/arm/boot/dts/mt8135.dtsi
This commit add new cpu enable method mediatek,mt65xx-smp and
mediatek,mt81xx-tz-smp.
Signed-off-by: Yingjoe Chen yingjoe.c...@mediatek.com
---
Documentation/devicetree/bindings/arm/cpus.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/cpus.txt
b
From: Matthias Brugger matthias@gmail.com
We enable GTP6 which ungates the arch timer clock.
In the future this should be done in the bootloader.
Signed-off-by: Matthias Brugger matthias@gmail.com
Signed-off-by: Yingjoe Chen yingjoe.c...@mediatek.com
---
arch/arm/mach-mediatek
On Mon, 2015-06-29 at 11:03 +0800, Yingjoe Chen wrote:
> On Fri, 2015-06-19 at 02:01 +0800, Scott Shu wrote:
> > For MT6580 SoC platform, the secondary cores are in powered off state
> > as default, so compared with MT65xx series SoC, one new enable method
> > is needed. This
On Fri, 2015-07-03 at 17:51 +0200, Matthias Brugger wrote:
> On Friday, July 03, 2015 09:48:42 PM Daniel Kurtz wrote:
<...>
> > >> @@ -243,6 +251,8 @@ static void __init mtk_timer_init(struct device_node
> > >> *node)>>
> > >> mtk_timer_setup(evt, GPT_CLK_SRC, TIMER_CTRL_OP_FREERUN, 1);
On Fri, 2015-07-03 at 17:51 +0200, Matthias Brugger wrote:
On Friday, July 03, 2015 09:48:42 PM Daniel Kurtz wrote:
...
@@ -243,6 +251,8 @@ static void __init mtk_timer_init(struct device_node
*node)
mtk_timer_setup(evt, GPT_CLK_SRC, TIMER_CTRL_OP_FREERUN, 1);
On Mon, 2015-06-29 at 11:03 +0800, Yingjoe Chen wrote:
On Fri, 2015-06-19 at 02:01 +0800, Scott Shu wrote:
For MT6580 SoC platform, the secondary cores are in powered off state
as default, so compared with MT65xx series SoC, one new enable method
is needed. This method using the SPM (System
On Fri, 2015-06-19 at 02:01 +0800, Scott Shu wrote:
> For MT6580 SoC platform, the secondary cores are in powered off state
> as default, so compared with MT65xx series SoC, one new enable method
> is needed. This method using the SPM (System Power Manager) inside
> the SCYSYS to control the CPU
On Fri, 2015-06-19 at 02:01 +0800, Scott Shu wrote:
For MT6580 SoC platform, the secondary cores are in powered off state
as default, so compared with MT65xx series SoC, one new enable method
is needed. This method using the SPM (System Power Manager) inside
the SCYSYS to control the CPU
On Thu, 2015-06-18 at 18:19 +0800, YH Huang wrote:
> On Fri, 2015-06-12 at 12:20 +0200, Thierry Reding wrote:
> > > +/* Shift log2(PWM_PERIOD_MAX + 1) as divisor */
> > > +#define PWM_PERIOD_BIT_SHIFT 12
> >
> > I wasn't very clear about this in my earlier review, so let me try to
> > explain
On Thu, 2015-06-18 at 18:19 +0800, YH Huang wrote:
On Fri, 2015-06-12 at 12:20 +0200, Thierry Reding wrote:
+/* Shift log2(PWM_PERIOD_MAX + 1) as divisor */
+#define PWM_PERIOD_BIT_SHIFT 12
I wasn't very clear about this in my earlier review, so let me try to
explain why I think
On Wed, 2015-05-27 at 07:18 -0500, Felipe Balbi wrote:
> On Wed, May 27, 2015 at 07:48:00PM +0800, chunfeng@mediatek.com wrote:
> > From: Chunfeng Yun
> >
> > find the phy driver before add primary usb_hcd to avoid acessing
> > xHCI register which may hangup the system when the phy is not
On Wed, 2015-05-27 at 07:18 -0500, Felipe Balbi wrote:
On Wed, May 27, 2015 at 07:48:00PM +0800, chunfeng@mediatek.com wrote:
From: Chunfeng Yun chunfeng@mediatek.com
find the phy driver before add primary usb_hcd to avoid acessing
xHCI register which may hangup the system when
On Tue, 2015-05-26 at 08:05 +0200, Sascha Hauer wrote:
> On Thu, May 21, 2015 at 04:22:31PM +0800, YH Huang wrote:
> > On Mon, 2015-05-18 at 11:42 +0800, Daniel Kurtz wrote:
<...>
> > > On Mon, May 11, 2015 at 5:26 PM, YH Huang wrote:
> > > > +
> > > > +static const struct of_device_id
On Tue, 2015-05-26 at 08:05 +0200, Sascha Hauer wrote:
On Thu, May 21, 2015 at 04:22:31PM +0800, YH Huang wrote:
On Mon, 2015-05-18 at 11:42 +0800, Daniel Kurtz wrote:
...
On Mon, May 11, 2015 at 5:26 PM, YH Huang yh.hu...@mediatek.com wrote:
+
+static const struct of_device_id
On Thu, 2015-05-21 at 21:29 +0800, YH Huang wrote:
> YH Huang (2):
> dt-bindings: pwm: add MediaTek display PWM bindings
> pwm: add MediaTek display PWM driver support
>
> .../devicetree/bindings/pwm/pwm-mtk-disp.txt | 25 +++
> drivers/pwm/Kconfig| 10
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