On Fri, Jun 14, 2013 at 05:29:17PM +0200, Sebastian Andrzej Siewior wrote:
> * Zhao Chenhui | 2013-06-09 17:59:42 [+0800]:
>
> >No. _cpu_down() on mainline do not change the cpus_allowed.
> My bad.
>
> >The problem is that the task which turned off cpu2 (for instance
On Fri, Jun 14, 2013 at 05:29:17PM +0200, Sebastian Andrzej Siewior wrote:
* Zhao Chenhui | 2013-06-09 17:59:42 [+0800]:
No. _cpu_down() on mainline do not change the cpus_allowed.
My bad.
The problem is that the task which turned off cpu2 (for instance)
can not run on cpu2 again after
On Wed, Jun 12, 2013 at 01:25:22PM +1000, Benjamin Herrenschmidt wrote:
> On Mon, 2013-06-03 at 18:43 +0800, Zhao Chenhui wrote:
> > On Sat, Jun 01, 2013 at 07:49:44AM +1000, Benjamin Herrenschmidt wrote:
> > > On Tue, 2013-05-28 at 15:59 +0800, Zhao Chenhui wrote:
> >
On Wed, Jun 12, 2013 at 01:25:22PM +1000, Benjamin Herrenschmidt wrote:
On Mon, 2013-06-03 at 18:43 +0800, Zhao Chenhui wrote:
On Sat, Jun 01, 2013 at 07:49:44AM +1000, Benjamin Herrenschmidt wrote:
On Tue, 2013-05-28 at 15:59 +0800, Zhao Chenhui wrote:
Some features depend on the boot
On Fri, Jun 07, 2013 at 11:05:43AM +0200, Sebastian Andrzej Siewior wrote:
> * Zhao Chenhui | 2013-05-16 18:17:19 [+0800]:
>
> >We found a problem. When a cpu is brought down using _cpu_down(),
> >the corresponding cpu bit in the cpus_allowed of the current task is
> &
On Fri, Jun 07, 2013 at 11:05:43AM +0200, Sebastian Andrzej Siewior wrote:
* Zhao Chenhui | 2013-05-16 18:17:19 [+0800]:
We found a problem. When a cpu is brought down using _cpu_down(),
the corresponding cpu bit in the cpus_allowed of the current task is
cleared. But this bit
On Sat, Jun 01, 2013 at 07:49:44AM +1000, Benjamin Herrenschmidt wrote:
> On Tue, 2013-05-28 at 15:59 +0800, Zhao Chenhui wrote:
> > Some features depend on the boot cpu, for instance, hibernate/suspend.
> > So disable hotplug for the boot cpu.
>
> Don't we have code to "
On Sat, Jun 01, 2013 at 07:49:44AM +1000, Benjamin Herrenschmidt wrote:
On Tue, 2013-05-28 at 15:59 +0800, Zhao Chenhui wrote:
Some features depend on the boot cpu, for instance, hibernate/suspend.
So disable hotplug for the boot cpu.
Don't we have code to move the boot CPU around when
Some features depend on the boot cpu, for instance, hibernate/suspend.
So disable hotplug for the boot cpu.
Signed-off-by: Zhao Chenhui
---
arch/powerpc/kernel/sysfs.c |4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel
For the mpic with a flag MPIC_SINGLE_DEST_CPU, only one bit should be
set in interrupt destination registers.
The code is applicable to 64-bit platforms as well as 32-bit.
Signed-off-by: Zhao Chenhui
---
arch/powerpc/sysdev/mpic.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions
For the mpic with a flag MPIC_SINGLE_DEST_CPU, only one bit should be
set in interrupt destination registers.
The code is applicable to 64-bit platforms as well as 32-bit.
Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com
---
arch/powerpc/sysdev/mpic.c |4 ++--
1 files changed, 2
Some features depend on the boot cpu, for instance, hibernate/suspend.
So disable hotplug for the boot cpu.
Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com
---
arch/powerpc/kernel/sysfs.c |4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kernel
.
To fix this problem, some related code in the commit cc4088a (hotplug:
Lightweight get online cpus) is removed.
Signed-off-by: Zhao Chenhui
---
kernel/cpu.c | 15 +--
1 files changed, 1 insertions(+), 14 deletions(-)
diff --git a/kernel/cpu.c b/kernel/cpu.c
index bfeeb00..e25b05f
.
To fix this problem, some related code in the commit cc4088a (hotplug:
Lightweight get online cpus) is removed.
Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com
---
kernel/cpu.c | 15 +--
1 files changed, 1 insertions(+), 14 deletions(-)
diff --git a/kernel/cpu.c b/kernel/cpu.c
On Tue, Apr 23, 2013 at 06:53:20PM -0500, Scott Wood wrote:
> On 04/19/2013 05:47:35 AM, Zhao Chenhui wrote:
> > static int pmc_suspend_enter(suspend_state_t state)
> > {
> >-int ret;
> >+int ret = 0;
> >+
> >+switch (state) {
> >+#ifde
On Thu, Apr 25, 2013 at 07:07:24PM -0500, Scott Wood wrote:
> On 04/24/2013 07:28:18 PM, Zhao Chenhui wrote:
> >On Wed, Apr 24, 2013 at 05:38:16PM -0500, Scott Wood wrote:
> >> On 04/24/2013 06:29:29 AM, Zhao Chenhui wrote:
> >> >On Tue, Apr 23, 2013 at 07:0
On Thu, Apr 25, 2013 at 07:07:24PM -0500, Scott Wood wrote:
On 04/24/2013 07:28:18 PM, Zhao Chenhui wrote:
On Wed, Apr 24, 2013 at 05:38:16PM -0500, Scott Wood wrote:
On 04/24/2013 06:29:29 AM, Zhao Chenhui wrote:
On Tue, Apr 23, 2013 at 07:04:06PM -0500, Scott Wood wrote:
On 04/19/2013
On Tue, Apr 23, 2013 at 06:53:20PM -0500, Scott Wood wrote:
On 04/19/2013 05:47:35 AM, Zhao Chenhui wrote:
static int pmc_suspend_enter(suspend_state_t state)
{
-int ret;
+int ret = 0;
+
+switch (state) {
+#ifdef CONFIG_PPC_85xx
+case PM_SUSPEND_MEM:
+#ifdef CONFIG_SPE
On Wed, Apr 24, 2013 at 05:38:16PM -0500, Scott Wood wrote:
> On 04/24/2013 06:29:29 AM, Zhao Chenhui wrote:
> >On Tue, Apr 23, 2013 at 07:04:06PM -0500, Scott Wood wrote:
> >> On 04/19/2013 05:47:45 AM, Zhao Chenhui wrote:
> >> >From: Chen-Hui Zhao
> >> >
On Tue, Apr 23, 2013 at 07:04:06PM -0500, Scott Wood wrote:
> On 04/19/2013 05:47:45 AM, Zhao Chenhui wrote:
> >From: Chen-Hui Zhao
> >
> >For e6500, two threads in one core share one time base. Just need
> >to do time base sync on first thread of one core, and ski
On Tue, Apr 23, 2013 at 07:00:49PM -0500, Scott Wood wrote:
> On 04/19/2013 05:47:46 AM, Zhao Chenhui wrote:
> >From: Chen-Hui Zhao
> >
> >The L1 Data Cache of e6500 contains no modified data, no flush
> >is required.
> >
> >Signed-off-by: Zhao Chenhui
&
On Tue, Apr 23, 2013 at 06:46:10PM -0500, Scott Wood wrote:
> On 04/19/2013 05:47:34 AM, Zhao Chenhui wrote:
> >These cache operations support Freescale SoCs based on BOOK3E.
> >Move L1 cache operations to fsl_booke_cache.S in order to maintain
> >easily. And, add cache opera
On Tue, Apr 23, 2013 at 06:46:10PM -0500, Scott Wood wrote:
On 04/19/2013 05:47:34 AM, Zhao Chenhui wrote:
These cache operations support Freescale SoCs based on BOOK3E.
Move L1 cache operations to fsl_booke_cache.S in order to maintain
easily. And, add cache operations for backside L2 cache
On Tue, Apr 23, 2013 at 07:00:49PM -0500, Scott Wood wrote:
On 04/19/2013 05:47:46 AM, Zhao Chenhui wrote:
From: Chen-Hui Zhao chenhui.z...@freescale.com
The L1 Data Cache of e6500 contains no modified data, no flush
is required.
Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com
On Tue, Apr 23, 2013 at 07:04:06PM -0500, Scott Wood wrote:
On 04/19/2013 05:47:45 AM, Zhao Chenhui wrote:
From: Chen-Hui Zhao chenhui.z...@freescale.com
For e6500, two threads in one core share one time base. Just need
to do time base sync on first thread of one core, and skip
On Wed, Apr 24, 2013 at 05:38:16PM -0500, Scott Wood wrote:
On 04/24/2013 06:29:29 AM, Zhao Chenhui wrote:
On Tue, Apr 23, 2013 at 07:04:06PM -0500, Scott Wood wrote:
On 04/19/2013 05:47:45 AM, Zhao Chenhui wrote:
From: Chen-Hui Zhao chenhui.z...@freescale.com
For e6500, two threads
Hi Kumar, Scott,
Do you have any comments on this set of patches?
Best Regards,
-Chenhui
On Fri, Apr 19, 2013 at 06:47:34PM +0800, Zhao Chenhui wrote:
> These cache operations support Freescale SoCs based on BOOK3E.
> Move L1 cache operations to fsl_booke_cache.S in order to maintain
&g
Hi Kumar, Scott,
Do you have any comments on this set of patches?
Best Regards,
-Chenhui
On Fri, Apr 19, 2013 at 06:47:34PM +0800, Zhao Chenhui wrote:
These cache operations support Freescale SoCs based on BOOK3E.
Move L1 cache operations to fsl_booke_cache.S in order to maintain
easily
On Mon, Apr 22, 2013 at 08:55:35AM +0530, Viresh Kumar wrote:
> On Fri, Apr 19, 2013 at 4:17 PM, Zhao Chenhui
> wrote:
> > diff --git a/drivers/cpufreq/mpc85xx-cpufreq.c
> > b/drivers/cpufreq/mpc85xx-cpufreq.c
>
> > +#include
> > +#include
> >
On Mon, Apr 22, 2013 at 08:55:35AM +0530, Viresh Kumar wrote:
On Fri, Apr 19, 2013 at 4:17 PM, Zhao Chenhui
chenhui.z...@freescale.com wrote:
diff --git a/drivers/cpufreq/mpc85xx-cpufreq.c
b/drivers/cpufreq/mpc85xx-cpufreq.c
+#include linux/module.h
+#include linux/cpufreq.h
From: Chen-Hui Zhao
Add struct ccsr_rcpm_v2 to descibe the v2 RCPM register map on some SoCs,
such as T4240, etc.
Signed-off-by: Zhao Chenhui
Signed-off-by: Li Yang
Signed-off-by: Andy Fleming
---
arch/powerpc/include/asm/fsl_guts.h | 66 +++
1 files
of Linux Power Management.
Command to enter sleep mode.
echo standby > /sys/power/state
Command to enter deep sleep mode.
echo mem > /sys/power/state
Signed-off-by: Zhao Chenhui
Signed-off-by: Li Yang
---
arch/powerpc/platforms/85xx/Makefile |1 +
arch/powerpc/platforms/85xx/sleep.S
From: chenhui zhao
Add APIs for setting wakeup source and lossless Ethernet in low power modes.
These APIs can be used by wake-on-packet feature.
Change-Id: I1803dcd4571af1eac49b43d99c578e7f99e2c278
Signed-off-by: Dave Liu
Signed-off-by: Li Yang
Signed-off-by: Jin Qing
Signed-off-by: Zhao
From: Li Yang
Signed-off-by: Li Yang
Signed-off-by: Zhao Chenhui
---
.../devicetree/bindings/powerpc/fsl/pmc.txt| 59 +++
1 files changed, 34 insertions(+), 25 deletions(-)
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt
b/Documentation
supports SoCs based on e500mc/e5500, such as P4080, P5020,
etc.
Signed-off-by: Zhao Chenhui
Signed-off-by: Li Yang
---
arch/powerpc/include/asm/fsl_guts.h | 38 +++
arch/powerpc/platforms/85xx/smp.c | 32 +
2 files changed, 70 insertions
implementations can override the platform_cpu_die().
Signed-off-by: Zhao Chenhui
Signed-off-by: Li Yang
Signed-off-by: Andy Fleming
---
arch/powerpc/Kconfig |2 +-
arch/powerpc/include/asm/smp.h|1 +
arch/powerpc/kernel/smp.c | 16 ++-
arch/powerpc/platforms
From: Chen-Hui Zhao
The L1 Data Cache of e6500 contains no modified data, no flush
is required.
Signed-off-by: Zhao Chenhui
Signed-off-by: Li Yang
Signed-off-by: Andy Fleming
---
arch/powerpc/kernel/fsl_booke_cache.S | 11 ++-
1 files changed, 10 insertions(+), 1 deletions
From: Chen-Hui Zhao
For e6500, two threads in one core share one time base. Just need
to do time base sync on first thread of one core, and skip it on
the other thread.
Signed-off-by: Zhao Chenhui
Signed-off-by: Li Yang
Signed-off-by: Andy Fleming
---
arch/powerpc/platforms/85xx/smp.c
and external interrupts.
When the device enter sleep state, it will be put in LPM20 mode.
The command is "echo standby > /sys/power/state".
Signed-off-by: Zhao Chenhui
Signed-off-by: Li Yang
Signed-off-by: Andy Fleming
---
arch/powerpc/sysdev/fsl_
-by: Zhao Chenhui
Signed-off-by: Li Yang
---
arch/powerpc/Kconfig|4 +-
arch/powerpc/include/asm/fsl_guts.h |1 +
arch/powerpc/platforms/85xx/Kconfig |1 +
arch/powerpc/sysdev/Kconfig |5 ++
arch/powerpc/sysdev/Makefile|1 +
arch/powerpc/sysdev
in smp_85xx_kick_cpu() to share codes
between PPC64 and PPC32 as far as possible.
Signed-off-by: Zhao Chenhui
Signed-off-by: Li Yang
Signed-off-by: Andy Fleming
---
arch/powerpc/Kconfig |2 +-
arch/powerpc/kernel/smp.c |3 +++
arch/powerpc/mm/tlb_nohash.c
From: Chen-Hui Zhao
* Only if two threads of one core are offline, the core can
enter PH20 state.
* Clear PH20 bits before core reset, or core will not restart.
* Introduced a variable l2cache_type in the struce cpu_spec to
indentify the type of L2 cache.
Signed-off-by: Zhao Chenhui
Signed
the erratum.
Signed-off-by: Dave Liu
Signed-off-by: Li Yang
Signed-off-by: Jerry Huang
Signed-off-by: Zhao Chenhui
CC: Scott Wood
---
arch/powerpc/platforms/85xx/Makefile |1 +
drivers/cpufreq/Kconfig.powerpc | 10 +
drivers/cpufreq/Makefile |1 +
drivers/cpufreq/mpc85xx
by this patch is L2 Look-Aside Cache, which appears on SoCs
with e500v1/e500v2 core, such as MPC8572, P1020, etc.
Signed-off-by: Zhao Chenhui
Signed-off-by: Li Yang
---
arch/powerpc/include/asm/cacheflush.h |8 ++
arch/powerpc/kernel/Makefile |1 +
arch/powerpc/kernel
The Power Management device tree stub indicated that the platform
supports Power Management feature.
Signed-off-by: Zhao Chenhui
---
arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi | 14 ++-
arch/powerpc/boot/dts/fsl/mpc8544si-post.dtsi |2 +
arch/powerpc/boot/dts/fsl/mpc8548si
by this patch is L2 Look-Aside Cache, which appears on SoCs
with e500v1/e500v2 core, such as MPC8572, P1020, etc.
Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com
Signed-off-by: Li Yang le...@freescale.com
---
arch/powerpc/include/asm/cacheflush.h |8 ++
arch/powerpc/kernel/Makefile
The Power Management device tree stub indicated that the platform
supports Power Management feature.
Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com
---
arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi | 14 ++-
arch/powerpc/boot/dts/fsl/mpc8544si-post.dtsi |2 +
arch/powerpc/boot
of MPC8536 have corrected the erratum.
Signed-off-by: Dave Liu dave...@freescale.com
Signed-off-by: Li Yang le...@freescale.com
Signed-off-by: Jerry Huang chang-ming.hu...@freescale.com
Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com
CC: Scott Wood scottw...@freescale.com
---
arch/powerpc/platforms
-off-by: Zhao Chenhui chenhui.z...@freescale.com
Signed-off-by: Li Yang le...@freescale.com
Signed-off-by: Andy Fleming aflem...@freescale.com
---
arch/powerpc/include/asm/cputable.h | 10
arch/powerpc/kernel/cputable.c |5
arch/powerpc/platforms/85xx/smp.c | 40
-by: Zhao Chenhui chenhui.z...@freescale.com
Signed-off-by: Li Yang le...@freescale.com
---
arch/powerpc/Kconfig|4 +-
arch/powerpc/include/asm/fsl_guts.h |1 +
arch/powerpc/platforms/85xx/Kconfig |1 +
arch/powerpc/sysdev/Kconfig |5 ++
arch/powerpc/sysdev
.
* Rearrange the code segment in smp_85xx_kick_cpu() to share codes
between PPC64 and PPC32 as far as possible.
Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com
Signed-off-by: Li Yang le...@freescale.com
Signed-off-by: Andy Fleming aflem...@freescale.com
---
arch/powerpc/Kconfig
internal timers
and internal and external interrupts.
When the device enter sleep state, it will be put in LPM20 mode.
The command is echo standby /sys/power/state.
Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com
Signed-off-by: Li Yang le...@freescale.com
Signed-off-by: Andy Fleming aflem
From: Chen-Hui Zhao chenhui.z...@freescale.com
For e6500, two threads in one core share one time base. Just need
to do time base sync on first thread of one core, and skip it on
the other thread.
Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com
Signed-off-by: Li Yang le...@freescale.com
From: Chen-Hui Zhao chenhui.z...@freescale.com
The L1 Data Cache of e6500 contains no modified data, no flush
is required.
Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com
Signed-off-by: Li Yang le...@freescale.com
Signed-off-by: Andy Fleming aflem...@freescale.com
---
arch/powerpc/kernel
the register map.
This patch supports SoCs based on e500mc/e5500, such as P4080, P5020,
etc.
Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com
Signed-off-by: Li Yang le...@freescale.com
---
arch/powerpc/include/asm/fsl_guts.h | 38 +++
arch/powerpc/platforms/85xx/smp.c
by individual
cpus. Platform implementations can override the platform_cpu_die().
Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com
Signed-off-by: Li Yang le...@freescale.com
Signed-off-by: Andy Fleming aflem...@freescale.com
---
arch/powerpc/Kconfig |2 +-
arch/powerpc/include/asm/smp.h
From: Li Yang le...@freescale.com
Signed-off-by: Li Yang le...@freescale.com
Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com
---
.../devicetree/bindings/powerpc/fsl/pmc.txt| 59 +++
1 files changed, 34 insertions(+), 25 deletions(-)
diff --git a/Documentation
of Linux Power Management.
Command to enter sleep mode.
echo standby /sys/power/state
Command to enter deep sleep mode.
echo mem /sys/power/state
Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com
Signed-off-by: Li Yang le...@freescale.com
---
arch/powerpc/platforms/85xx/Makefile |1
le...@freescale.com
Signed-off-by: Jin Qing b24...@freescale.com
Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com
---
arch/powerpc/sysdev/fsl_pmc.c | 72 -
arch/powerpc/sysdev/fsl_soc.h | 11 ++
2 files changed, 82 insertions(+), 1 deletions
From: Chen-Hui Zhao chenhui.z...@freescale.com
Add struct ccsr_rcpm_v2 to descibe the v2 RCPM register map on some SoCs,
such as T4240, etc.
Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com
Signed-off-by: Li Yang le...@freescale.com
Signed-off-by: Andy Fleming aflem...@freescale.com
MPIC_SINGLE_DEST_CPU is set.
Signed-off-by: Zhao Chenhui
Signed-off-by: Li Yang
---
arch/powerpc/sysdev/mpic.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 9c6e535..cc537f8 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b
MPIC_SINGLE_DEST_CPU is set.
Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com
Signed-off-by: Li Yang le...@freescale.com
---
arch/powerpc/sysdev/mpic.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 9c6e535..cc537f8
On Sat, Aug 11, 2012 at 08:19:43AM -0500, Tabi Timur-B04825 wrote:
> On Tue, Aug 7, 2012 at 3:43 AM, Zhao Chenhui
> wrote:
>
> > +int mpc85xx_pmc_set_wake(struct device *dev, bool enable)
> > +{
> > + int ret = 0;
> > + struct device_node *cl
On Sat, Aug 11, 2012 at 08:19:43AM -0500, Tabi Timur-B04825 wrote:
> On Tue, Aug 7, 2012 at 3:43 AM, Zhao Chenhui
> wrote:
>
> > + return -EINVAL;
> > +
> > + prop = of_get_property(clk_np, "fsl,pmcdr-mask", NULL);
> > + if
On Sat, Aug 11, 2012 at 08:19:43AM -0500, Tabi Timur-B04825 wrote:
On Tue, Aug 7, 2012 at 3:43 AM, Zhao Chenhui chenhui.z...@freescale.com
wrote:
+ return -EINVAL;
+
+ prop = of_get_property(clk_np, fsl,pmcdr-mask, NULL);
+ if (!prop) {
+ ret
On Sat, Aug 11, 2012 at 08:19:43AM -0500, Tabi Timur-B04825 wrote:
On Tue, Aug 7, 2012 at 3:43 AM, Zhao Chenhui chenhui.z...@freescale.com
wrote:
+int mpc85xx_pmc_set_wake(struct device *dev, bool enable)
+{
+ int ret = 0;
+ struct device_node *clk_np;
+ const u32
-by: Dave Liu
Signed-off-by: Li Yang
Signed-off-by: Jerry Huang
Signed-off-by: Zhao Chenhui
CC: Scott Wood
---
v2:
* use get/put_online_cpus() to disable/enable cpu hotplug.
arch/powerpc/platforms/85xx/Makefile |1 +
arch/powerpc/platforms/85xx/cpufreq-jog.c | 388
On Tue, Aug 07, 2012 at 04:43:25PM +0800, Zhao Chenhui wrote:
> The cpufreq driver of mpc85xx will disable/enable cpu hotplug temporarily.
> Therefore, the related functions should be exported.
>
> Signed-off-by: Zhao Chenhui
> ---
> include/linux/cpu.h |4
>
On Tue, Aug 07, 2012 at 04:43:25PM +0800, Zhao Chenhui wrote:
The cpufreq driver of mpc85xx will disable/enable cpu hotplug temporarily.
Therefore, the related functions should be exported.
Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com
---
include/linux/cpu.h |4
1 files
-by: Dave Liu dave...@freescale.com
Signed-off-by: Li Yang le...@freescale.com
Signed-off-by: Jerry Huang chang-ming.hu...@freescale.com
Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com
CC: Scott Wood scottw...@freescale.com
---
v2:
* use get/put_online_cpus() to disable/enable cpu hotplug.
arch
On Wed, Aug 08, 2012 at 11:43:22AM +0530, Srivatsa S. Bhat wrote:
> On 08/07/2012 11:21 PM, Kumar Gala wrote:
> >
> > On Aug 7, 2012, at 3:43 AM, Zhao Chenhui wrote:
> >
> >> The cpufreq driver of mpc85xx will disable/enable cpu hotplug temporarily.
> >>
On Wed, Aug 08, 2012 at 11:43:22AM +0530, Srivatsa S. Bhat wrote:
On 08/07/2012 11:21 PM, Kumar Gala wrote:
On Aug 7, 2012, at 3:43 AM, Zhao Chenhui wrote:
The cpufreq driver of mpc85xx will disable/enable cpu hotplug temporarily.
Therefore, the related functions should be exported
Signed-off-by: Zhao Chenhui
---
Replace this patch "mpc85xx_defconfig: add IDE support for MPC85xxCDS".
arch/powerpc/configs/mpc85xx_defconfig |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/configs/mpc85xx_defconfig
b/arch/power
of Linux Power Management.
Command to enter sleep mode.
echo standby > /sys/power/state
Command to enter deep sleep mode.
echo mem > /sys/power/state
Signed-off-by: Dave Liu
Signed-off-by: Li Yang
Signed-off-by: Jin Qing
Signed-off-by: Jerry Huang
Cc: Scott Wood
Signed-off-by: Zhao C
Add APIs for setting wakeup source and lossless Ethernet in low power modes.
These APIs can be used by wake-on-packet feature.
Signed-off-by: Dave Liu
Signed-off-by: Li Yang
Signed-off-by: Jin Qing
Signed-off-by: Zhao Chenhui
---
arch/powerpc/sysdev/fsl_pmc.c | 77
-by: Dave Liu
Signed-off-by: Li Yang
Signed-off-by: Jerry Huang
Signed-off-by: Zhao Chenhui
CC: Scott Wood
---
arch/powerpc/platforms/85xx/Makefile |1 +
arch/powerpc/platforms/85xx/cpufreq-jog.c | 388 +
arch/powerpc/platforms/Kconfig| 11 +
arch
The cpufreq driver of mpc85xx will disable/enable cpu hotplug temporarily.
Therefore, the related functions should be exported.
Signed-off-by: Zhao Chenhui
---
include/linux/cpu.h |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/include/linux/cpu.h b/include/linux
The cpufreq driver of mpc85xx will disable/enable cpu hotplug temporarily.
Therefore, the related functions should be exported.
Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com
---
include/linux/cpu.h |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/include/linux
-by: Dave Liu dave...@freescale.com
Signed-off-by: Li Yang le...@freescale.com
Signed-off-by: Jerry Huang chang-ming.hu...@freescale.com
Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com
CC: Scott Wood scottw...@freescale.com
---
arch/powerpc/platforms/85xx/Makefile |1 +
arch/powerpc
Add APIs for setting wakeup source and lossless Ethernet in low power modes.
These APIs can be used by wake-on-packet feature.
Signed-off-by: Dave Liu dave...@freescale.com
Signed-off-by: Li Yang le...@freescale.com
Signed-off-by: Jin Qing b24...@freescale.com
Signed-off-by: Zhao Chenhui
-by: Jerry Huang chang-ming.hu...@freescale.com
Cc: Scott Wood scottw...@freescale.com
Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com
---
arch/powerpc/Kconfig |2 +-
arch/powerpc/include/asm/cacheflush.h |2 +
arch/powerpc/kernel/Makefile |1 +
arch/powerpc
Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com
---
Replace this patch mpc85xx_defconfig: add IDE support for MPC85xxCDS.
arch/powerpc/configs/mpc85xx_defconfig |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/configs/mpc85xx_defconfig
b/arch/powerpc
On Tue, Jul 31, 2012 at 09:15:33AM -0500, Kumar Gala wrote:
>
> On Jul 20, 2012, at 7:42 AM, Zhao Chenhui wrote:
>
> > In sleep PM mode, the clocks of e500 core and unused IP blocks is
> > turned off. IP blocks which are allowed to wake up the processor
> > are s
On Sat, Jul 28, 2012 at 08:20:31AM +1000, Benjamin Herrenschmidt wrote:
> On Fri, 2012-07-27 at 16:58 -0500, Kumar Gala wrote:
> > On Jul 20, 2012, at 7:47 AM, Zhao Chenhui wrote:
> >
> > > During suspend, all interrupts including IPI will be disabled. In this
>
On Sat, Jul 28, 2012 at 08:20:31AM +1000, Benjamin Herrenschmidt wrote:
On Fri, 2012-07-27 at 16:58 -0500, Kumar Gala wrote:
On Jul 20, 2012, at 7:47 AM, Zhao Chenhui wrote:
During suspend, all interrupts including IPI will be disabled. In this
case,
the suspend process will hang
On Tue, Jul 31, 2012 at 09:15:33AM -0500, Kumar Gala wrote:
On Jul 20, 2012, at 7:42 AM, Zhao Chenhui wrote:
In sleep PM mode, the clocks of e500 core and unused IP blocks is
turned off. IP blocks which are allowed to wake up the processor
are still running.
Some Freescale chips
On Fri, Jul 20, 2012 at 03:09:00PM +0100, Alan Cox wrote:
> On Fri, 20 Jul 2012 20:45:25 +0800
> Zhao Chenhui wrote:
>
> > Add IDE support for MPC85xxCDS.
> >
> > Signed-off-by: Zhao Chenhui
> > ---
> > arch/powerpc/configs/mpc85xx_defconfig |2 ++
&
On Fri, Jul 20, 2012 at 03:09:00PM +0100, Alan Cox wrote:
On Fri, 20 Jul 2012 20:45:25 +0800
Zhao Chenhui chenhui.z...@freescale.com wrote:
Add IDE support for MPC85xxCDS.
Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com
---
arch/powerpc/configs/mpc85xx_defconfig |2
The Power Management device tree stub indicated that the platform
supports Power Management feature.
Signed-off-by: Zhao Chenhui
---
arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi | 14 ++-
arch/powerpc/boot/dts/fsl/mpc8544si-post.dtsi |2 +
arch/powerpc/boot/dts/fsl/mpc8548si
standby > /sys/power/state or echo mem > /sys/power/state
Ping from PC host to wake up the station:
ping 10.193.20.169
Signed-off-by: Dave Liu
Signed-off-by: Jin Qing
Signed-off-by: Li Yang
Signed-off-by: Zhao Chenhui
Acked-by: Andy Fleming
---
drivers/net/ethernet/freescale/gia
During suspend, all interrupts including IPI will be disabled. In this case,
the suspend process will hang in SMP. To prevent this, pass the flag
IRQF_NO_SUSPEND when requesting IPI irq.
Signed-off-by: Zhao Chenhui
Signed-off-by: Li Yang
---
arch/powerpc/kernel/smp.c |2 +-
1 files changed
Add IDE support for MPC85xxCDS.
Signed-off-by: Zhao Chenhui
---
arch/powerpc/configs/mpc85xx_defconfig |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/configs/mpc85xx_defconfig
b/arch/powerpc/configs/mpc85xx_defconfig
index 03ee911..45eda33 100644
Do hardware timebase sync. Firstly, stop all timebases, and transfer
the timebase value of the boot core to the other core. Finally,
start all timebases.
Only apply to dual-core chips, such as MPC8572, P2020, etc.
Signed-off-by: Zhao Chenhui
Signed-off-by: Li Yang
---
arch/powerpc/include/asm
and 36-bit physical address.
Signed-off-by: Li Yang
Signed-off-by: Jin Qing
Signed-off-by: Zhao Chenhui
---
arch/powerpc/Kconfig |6 ++-
arch/powerpc/include/asm/cacheflush.h |2 +
arch/powerpc/include/asm/smp.h|1 +
arch/powerpc/kernel/head_fsl_booke.S | 28
Add APIs for setting wakeup source and lossless Ethernet in low power modes.
These APIs can be used by wake-on-packet feature.
Signed-off-by: Dave Liu
Signed-off-by: Li Yang
Signed-off-by: Jin Qing
Signed-off-by: Zhao Chenhui
---
arch/powerpc/sysdev/fsl_pmc.c | 77
-by: Dave Liu
Signed-off-by: Li Yang
Signed-off-by: Jerry Huang
Signed-off-by: Zhao Chenhui
CC: Scott Wood
---
arch/powerpc/platforms/85xx/Makefile |1 +
arch/powerpc/platforms/85xx/cpufreq-jog.c | 388 +
arch/powerpc/platforms/Kconfig| 11 +
arch
of Linux Power Management.
Command to enter sleep mode.
echo standby > /sys/power/state
Command to enter deep sleep mode.
echo mem > /sys/power/state
Signed-off-by: Dave Liu
Signed-off-by: Li Yang
Signed-off-by: Jin Qing
Signed-off-by: Jerry Huang
Cc: Scott Wood
Signed-off-by: Zhao C
In the case of cpu hotplug, the cpu_state should be set to CPU_UP_PREPARE when
kicking cpu.
Otherwise, the cpu_state is always CPU_DEAD after calling
generic_set_cpu_dead(), which
makes the delay in generic_cpu_die() not happen.
Signed-off-by: Zhao Chenhui
---
arch/powerpc/include/asm/smp.h
Signed-off-by: Zhao Chenhui
---
arch/powerpc/platforms/85xx/smp.c | 46 ++--
1 files changed, 23 insertions(+), 23 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/smp.c
b/arch/powerpc/platforms/85xx/smp.c
index ff42490..4827709 100644
--- a/arch/powerpc
Changes for v8:
* Separated the cpu hotplug patch into three patches, as follows
[PATCH v8 1/7] powerpc/smp: use a struct epapr_spin_table to replace macros
[PATCH v8 2/7] powerpc/smp: add generic_set_cpu_up() to set cpu_state as
CPU_UP_PREPARE
[PATCH v8 4/7] powerpc/85xx: add HOTPLUG_CPU
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