From: Srinivas Kandagatla
This patch fixes an error check while using of_irq_to_resource.
of_irq_to_resource returns non-zero interrupt number on success and zero
on error. The driver was using error check is wrong way.
Without this patch the driver will configure interrupt zero if there is
no
From: Srinivas Kandagatla srinivas.kandaga...@st.com
This patch fixes an error check while using of_irq_to_resource.
of_irq_to_resource returns non-zero interrupt number on success and zero
on error. The driver was using error check is wrong way.
Without this patch the driver will configure
From: Srinivas Kandagatla
This patch adds Maxime and Patrice to ARM/STi maintainers list.
As Stuart Menefy opted to be removed from the list, this patch removes
his email from maintainers. Updated my email with private email address.
This patch also adds few more drivers to the list so that
From: Srinivas Kandagatla srinivas.kandaga...@st.com
This patch adds Maxime and Patrice to ARM/STi maintainers list.
As Stuart Menefy opted to be removed from the list, this patch removes
his email from maintainers. Updated my email with private email address.
This patch also adds few more
From: Srinivas Kandagatla
STi series SOCs have a glue layer on top of the synopsis gmac IP, this
glue layer needs to be configured before the gmac driver starts using
the IP.
This patch adds a support to this glue layer which is configured via
stmmac setup, init, exit callbacks.
Signed-off-by:
From: Srinivas Kandagatla
This patch adds support to STiH416 SOC, which has two ethernet
snps,dwmac controllers version 3.710. With this patch B2000 and B2020
boards can boot with ethernet in MII and RGMII modes.
Tested on both B2020 and B2000.
Signed-off-by: Srinivas Kandagatla
---
From: Srinivas Kandagatla
This patch adds support to STiH415 SOC, which has two ethernet
snps,dwmac controllers version 3.610. With this patch B2000 and B2020
boards can boot with ethernet in MII and RGMII modes.
Tested on both B2020 and B2000.
Signed-off-by: Srinivas Kandagatla
---
From: Srinivas Kandagatla
Hi All,
This patch series adds Ethernet support to STi series SOCs STiH415 and STiH416.
STi SOC series integrates dwmac IP from synopsis, however there is a hardware
glue on top of this standard IP, this glue needs to configured before the
actual dwmac can be used.
From: Srinivas Kandagatla srinivas.kandaga...@st.com
This patch adds support to STiH415 SOC, which has two ethernet
snps,dwmac controllers version 3.610. With this patch B2000 and B2020
boards can boot with ethernet in MII and RGMII modes.
Tested on both B2020 and B2000.
Signed-off-by: Srinivas
From: Srinivas Kandagatla srinivas.kandaga...@st.com
Hi All,
This patch series adds Ethernet support to STi series SOCs STiH415 and STiH416.
STi SOC series integrates dwmac IP from synopsis, however there is a hardware
glue on top of this standard IP, this glue needs to configured before the
From: Srinivas Kandagatla srinivas.kandaga...@st.com
This patch adds support to STiH416 SOC, which has two ethernet
snps,dwmac controllers version 3.710. With this patch B2000 and B2020
boards can boot with ethernet in MII and RGMII modes.
Tested on both B2020 and B2000.
Signed-off-by: Srinivas
From: Srinivas Kandagatla srinivas.kandaga...@st.com
STi series SOCs have a glue layer on top of the synopsis gmac IP, this
glue layer needs to be configured before the gmac driver starts using
the IP.
This patch adds a support to this glue layer which is configured via
stmmac setup, init, exit
From: Srinivas Kandagatla
Hi All,
This patch series adds Ethernet support to STi series SOCs STiH415 and STiH416.
STi SOC series integrates dwmac IP from synopsis, however there is a hardware
glue on top of this standard IP, this glue needs to configured before the
actual dwmac can be used.
From: Srinivas Kandagatla
This patch adds support to STiH416 SOC, which has two ethernet
snps,dwmac controllers version 3.710. With this patch B2000 and B2020
boards can boot with ethernet in MII and RGMII modes.
Tested on both B2020 and B2000.
Signed-off-by: Srinivas Kandagatla
---
From: Srinivas Kandagatla
This patch adds support to STiH415 SOC, which has two ethernet
snps,dwmac controllers version 3.610. With this patch B2000 and B2020
boards can boot with ethernet in MII and RGMII modes.
Tested on both B2020 and B2000.
Signed-off-by: Srinivas Kandagatla
---
From: Srinivas Kandagatla
STi series SOCs have a glue layer on top of the synopsis gmac IP, this
glue layer needs to be configured before the gmac driver starts using
the IP.
This patch adds a support to this glue layer which is configured via
stmmac setup, init, exit callbacks.
Signed-off-by:
From: Srinivas Kandagatla srinivas.kandaga...@st.com
STi series SOCs have a glue layer on top of the synopsis gmac IP, this
glue layer needs to be configured before the gmac driver starts using
the IP.
This patch adds a support to this glue layer which is configured via
stmmac setup, init, exit
From: Srinivas Kandagatla srinivas.kandaga...@st.com
This patch adds support to STiH415 SOC, which has two ethernet
snps,dwmac controllers version 3.610. With this patch B2000 and B2020
boards can boot with ethernet in MII and RGMII modes.
Tested on both B2020 and B2000.
Signed-off-by: Srinivas
From: Srinivas Kandagatla srinivas.kandaga...@st.com
This patch adds support to STiH416 SOC, which has two ethernet
snps,dwmac controllers version 3.710. With this patch B2000 and B2020
boards can boot with ethernet in MII and RGMII modes.
Tested on both B2020 and B2000.
Signed-off-by: Srinivas
From: Srinivas Kandagatla srinivas.kandaga...@st.com
Hi All,
This patch series adds Ethernet support to STi series SOCs STiH415 and STiH416.
STi SOC series integrates dwmac IP from synopsis, however there is a hardware
glue on top of this standard IP, this glue needs to configured before the
From: Stephen Gallimore
This patch adds a reset controller platform driver for the STiH416
SoC. This initial version provides a compatible driver for the
"st,stih416-powerdown" device, which registers a system configuration
register based reset controller that controls the powerdown state of
From: Stephen Gallimore
This patch adds a reset controller implementation for STMicroelectronics
STi family SoCs; it allows a group of related reset like controls found
in multiple system configuration registers to be represented by a single
controller device. System configuration registers are
From: Stephen Gallimore
This patch selects reset controller support for ARCH_STI and
selects the reset controllers for STiH415 and STiH416 SoCs.
Signed-off-by: Stephen Gallimore
Signed-off-by: Srinivas Kandagatla
---
arch/arm/mach-sti/Kconfig |3 +++
1 file changed, 3 insertions(+)
diff
From: Srinivas Kandagatla
This patch adds softreset controller for STiH416 SOC, soft reset
controller is based on system configuration registers which are mapped
via regmap. This reset controller does not have any feedback or
acknowledgement. With this patch a new device "st,stih416-softreset"
From: Srinivas Kandagatla
This patch adds softreset controller for STiH415 SOC, soft reset
controller is based on system configuration registers which are mapped
via regmap. This reset controller does not have any feedback or
acknowledgement. With this patch a new device "st,stih415-softreset"
From: Stephen Gallimore
This patch adds a reset controller platform driver for the STiH415
SoC. This initial version provides a compatible driver for the
"st,stih415-powerdown" device, which registers a system configuration
register based reset controller that controls the powerdown state of
From: Srinivas Kandagatla
Hi All,
This patch series adds reset controller support for STi SOC series STiH415 and
STiH416. It adds support for both power down reset and soft reset controllers.
On STi series SOCs reset lines are wired up to system configuration registers.
Most of the IPs on STi
From: Srinivas Kandagatla
This patch adds support to STiH416 SOC, which has two ethernet
snps,dwmac controllers version 3.710. With this patch B2000 and B2020
boards can boot with ethernet in MII and RGMII modes.
Tested on both B2020 and B2000.
Signed-off-by: Srinivas Kandagatla
---
From: Srinivas Kandagatla
This patch adds support to STiH415 SOC, which has two ethernet
snps,dwmac controllers version 3.610. With this patch B2000 and B2020
boards can boot with ethernet in MII and RGMII modes.
Tested on both B2020 and B2000.
Signed-off-by: Srinivas Kandagatla
---
From: Srinivas Kandagatla
STi series SOCs have a glue layer on top of the synopsis gmac IP, this
glue layer needs to be configured before the gmac driver starts using
the IP.
This patch adds a support to this glue layer which is configured via
stmmac setup, init, exit callbacks.
Signed-off-by:
From: Srinivas Kandagatla
Hi All,
This patch series adds Ethernet support to STi series SOCs STiH415 and STiH416.
STi SOC series integrates dwmac IP from synopsis, however there is a hardware
glue on top of this standard IP, this glue needs to configured before the
actual dwmac can be used.
From: Srinivas Kandagatla srinivas.kandaga...@st.com
Hi All,
This patch series adds Ethernet support to STi series SOCs STiH415 and STiH416.
STi SOC series integrates dwmac IP from synopsis, however there is a hardware
glue on top of this standard IP, this glue needs to configured before the
From: Srinivas Kandagatla srinivas.kandaga...@st.com
This patch adds support to STiH416 SOC, which has two ethernet
snps,dwmac controllers version 3.710. With this patch B2000 and B2020
boards can boot with ethernet in MII and RGMII modes.
Tested on both B2020 and B2000.
Signed-off-by: Srinivas
From: Srinivas Kandagatla srinivas.kandaga...@st.com
This patch adds support to STiH415 SOC, which has two ethernet
snps,dwmac controllers version 3.610. With this patch B2000 and B2020
boards can boot with ethernet in MII and RGMII modes.
Tested on both B2020 and B2000.
Signed-off-by: Srinivas
From: Srinivas Kandagatla srinivas.kandaga...@st.com
STi series SOCs have a glue layer on top of the synopsis gmac IP, this
glue layer needs to be configured before the gmac driver starts using
the IP.
This patch adds a support to this glue layer which is configured via
stmmac setup, init, exit
From: Srinivas Kandagatla srinivas.kandaga...@st.com
Hi All,
This patch series adds reset controller support for STi SOC series STiH415 and
STiH416. It adds support for both power down reset and soft reset controllers.
On STi series SOCs reset lines are wired up to system configuration
From: Stephen Gallimore stephen.gallim...@st.com
This patch adds a reset controller platform driver for the STiH415
SoC. This initial version provides a compatible driver for the
st,stih415-powerdown device, which registers a system configuration
register based reset controller that controls the
From: Srinivas Kandagatla srinivas.kandaga...@st.com
This patch adds softreset controller for STiH416 SOC, soft reset
controller is based on system configuration registers which are mapped
via regmap. This reset controller does not have any feedback or
acknowledgement. With this patch a new
From: Srinivas Kandagatla srinivas.kandaga...@st.com
This patch adds softreset controller for STiH415 SOC, soft reset
controller is based on system configuration registers which are mapped
via regmap. This reset controller does not have any feedback or
acknowledgement. With this patch a new
From: Stephen Gallimore stephen.gallim...@st.com
This patch selects reset controller support for ARCH_STI and
selects the reset controllers for STiH415 and STiH416 SoCs.
Signed-off-by: Stephen Gallimore stephen.gallim...@st.com
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@st.com
---
From: Stephen Gallimore stephen.gallim...@st.com
This patch adds a reset controller implementation for STMicroelectronics
STi family SoCs; it allows a group of related reset like controls found
in multiple system configuration registers to be represented by a single
controller device. System
From: Stephen Gallimore stephen.gallim...@st.com
This patch adds a reset controller platform driver for the STiH416
SoC. This initial version provides a compatible driver for the
st,stih416-powerdown device, which registers a system configuration
register based reset controller that controls the
From: Srinivas Kandagatla
This patch adds interrupt support for STiH415 pin controllers.
Signed-off-by: Srinivas Kandagatla
---
arch/arm/boot/dts/stih415-pinctrl.dtsi | 75
1 files changed, 75 insertions(+), 0 deletions(-)
diff --git
From: Srinivas Kandagatla
ST pin controller does not have hardware support for detecting edge
triggered interrupts, It only has level triggering support.
This patch attempts to fake up edge triggers from hw level trigger
support in software. With this facility now the gpios can be easily used
From: Srinivas Kandagatla
This patch add interrupt support to the pincontroller driver.
ST Pincontroller GPIO bank can have one of the two possible types of
interrupt-wirings.
First type is via irqmux, single interrupt is used by multiple gpio
banks. This reduces number of overall interrupts
From: Srinivas Kandagatla
This patch adds interrupt support for STiH416 pin controllers.
Signed-off-by: Srinivas Kandagatla
---
arch/arm/boot/dts/stih416-pinctrl.dtsi | 81
1 files changed, 81 insertions(+), 0 deletions(-)
diff --git
From: Srinivas Kandagatla
Hi Linus W,
Thankyou for reviewing v1 of the patch-set the comments were very useful.
This series of v2 patches add interrupt controller support to ST pinctrl
driver incorporating all the review comments.
ST pin controller GPIO bank can have one of the two possible
From: Srinivas Kandagatla
In PM_SUSPEND_FREEZE and WOL(Wakeup On Lan) case, when the driver gets a
wakeup event, either the driver or platform specific PM code should notify
the pm core about it, so that the system can wakeup from low power.
In cases where there is no involvement of platform
From: Srinivas Kandagatla
This patch moves dma resource allocation to a new function
alloc_dma_desc_resources, the reason for moving this to a new function
is to keep the memory allocations in a separate function. One more reason
it to get suspend and hibernation cases working without releasing
From: Srinivas Kandagatla
This patch adds code to restore default pinstate of the pins when it
comes back from low power state. Without this patch the state of the
pins would be unknown and the driver would not work.
This patch also adds code to put the pins in to sleep state when the
driver
From: Srinivas Kandagatla
This patch moves hardware setup part of the code in stmmac_open to a new
function stmmac_hw_setup, the reason for doing this is to make hw
initialization independent function so that PM functions can re-use it to
re-initialize the IP after returning from low power
From: Srinivas Kandagatla
In hibernation freeze case the driver just releases the resources like
dma buffers, irqs, unregisters the drivers and during restore it does
register, request the resources. This is not really necessary, as part
of power management all the data structures are intact,
From: Srinivas Kandagatla
This patch removes gpio_free for reset line of the phy, driver stores
the gpio number in its private data-structure to use in future. As the
driver uses this pin in future this pin should not be freed.
Signed-off-by: Srinivas Kandagatla
Acked-by: Giuseppe Cavallaro
From: Srinivas Kandagatla
This patch promotes stmmac_mdio_reset function from static to
non-static, so that power management functions can decide to reset if
the IP comes out from lowe power state specially hibernation cases.
Signed-off-by: Srinivas Kandagatla
Acked-by: Giuseppe Cavallaro
---
From: Srinivas Kandagatla
The driver PM resume assumes that the IP is still powered up and the
all the register contents are not disturbed when it comes out of low
power suspend case. This assumption is wrong, basically the driver
should not consider any state of registers after it comes out of
From: Srinivas Kandagatla
This patch adds support to "max-speed" property which is a standard
Ethernet device tree property. max-speed specifies maximum speed
(specified in megabits per second) supported the device.
Depending on the clocking schemes some of the boards can only support
few link
From: Srinivas Kandagatla
Hi Peppe/Dave,
During PM_SUSPEND_FREEZE testing, I have noticed that PM support in STMMAC is
partly broken. I had to re-arrange the code to do PM correctly. There were lot
of things I did not like personally and some bits did not work in the first
place. I thought this
From: Srinivas Kandagatla
Hi Peppe/Dave,
During PM_SUSPEND_FREEZE testing, I have noticed that PM support in STMMAC is
partly broken. I had to re-arrange the code to do PM correctly. There were lot
of things I did not like personally and some bits did not work in the first
place. I thought this
From: Srinivas Kandagatla srinivas.kandaga...@st.com
Hi Peppe/Dave,
During PM_SUSPEND_FREEZE testing, I have noticed that PM support in STMMAC is
partly broken. I had to re-arrange the code to do PM correctly. There were lot
of things I did not like personally and some bits did not work in the
From: Srinivas Kandagatla srinivas.kandaga...@st.com
Hi Peppe/Dave,
During PM_SUSPEND_FREEZE testing, I have noticed that PM support in STMMAC is
partly broken. I had to re-arrange the code to do PM correctly. There were lot
of things I did not like personally and some bits did not work in the
From: Srinivas Kandagatla srinivas.kandaga...@st.com
This patch adds support to max-speed property which is a standard
Ethernet device tree property. max-speed specifies maximum speed
(specified in megabits per second) supported the device.
Depending on the clocking schemes some of the boards
From: Srinivas Kandagatla srinivas.kandaga...@st.com
The driver PM resume assumes that the IP is still powered up and the
all the register contents are not disturbed when it comes out of low
power suspend case. This assumption is wrong, basically the driver
should not consider any state of
From: Srinivas Kandagatla srinivas.kandaga...@st.com
This patch moves hardware setup part of the code in stmmac_open to a new
function stmmac_hw_setup, the reason for doing this is to make hw
initialization independent function so that PM functions can re-use it to
re-initialize the IP after
From: Srinivas Kandagatla srinivas.kandaga...@st.com
In hibernation freeze case the driver just releases the resources like
dma buffers, irqs, unregisters the drivers and during restore it does
register, request the resources. This is not really necessary, as part
of power management all the data
From: Srinivas Kandagatla srinivas.kandaga...@st.com
This patch removes gpio_free for reset line of the phy, driver stores
the gpio number in its private data-structure to use in future. As the
driver uses this pin in future this pin should not be freed.
Signed-off-by: Srinivas Kandagatla
From: Srinivas Kandagatla srinivas.kandaga...@st.com
This patch promotes stmmac_mdio_reset function from static to
non-static, so that power management functions can decide to reset if
the IP comes out from lowe power state specially hibernation cases.
Signed-off-by: Srinivas Kandagatla
From: Srinivas Kandagatla srinivas.kandaga...@st.com
This patch moves dma resource allocation to a new function
alloc_dma_desc_resources, the reason for moving this to a new function
is to keep the memory allocations in a separate function. One more reason
it to get suspend and hibernation cases
From: Srinivas Kandagatla srinivas.kandaga...@st.com
This patch adds code to restore default pinstate of the pins when it
comes back from low power state. Without this patch the state of the
pins would be unknown and the driver would not work.
This patch also adds code to put the pins in to
From: Srinivas Kandagatla srinivas.kandaga...@st.com
In PM_SUSPEND_FREEZE and WOL(Wakeup On Lan) case, when the driver gets a
wakeup event, either the driver or platform specific PM code should notify
the pm core about it, so that the system can wakeup from low power.
In cases where there is no
From: Srinivas Kandagatla srinivas.kandaga...@st.com
Hi Linus W,
Thankyou for reviewing v1 of the patch-set the comments were very useful.
This series of v2 patches add interrupt controller support to ST pinctrl
driver incorporating all the review comments.
ST pin controller GPIO bank can
From: Srinivas Kandagatla srinivas.kandaga...@st.com
ST pin controller does not have hardware support for detecting edge
triggered interrupts, It only has level triggering support.
This patch attempts to fake up edge triggers from hw level trigger
support in software. With this facility now the
From: Srinivas Kandagatla srinivas.kandaga...@st.com
This patch add interrupt support to the pincontroller driver.
ST Pincontroller GPIO bank can have one of the two possible types of
interrupt-wirings.
First type is via irqmux, single interrupt is used by multiple gpio
banks. This reduces
From: Srinivas Kandagatla srinivas.kandaga...@st.com
This patch adds interrupt support for STiH416 pin controllers.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@st.com
---
arch/arm/boot/dts/stih416-pinctrl.dtsi | 81
1 files changed, 81
From: Srinivas Kandagatla srinivas.kandaga...@st.com
This patch adds interrupt support for STiH415 pin controllers.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@st.com
---
arch/arm/boot/dts/stih415-pinctrl.dtsi | 75
1 files changed, 75
From: Srinivas Kandagatla
Hi Linus W,
This series of patches add interrupt controller support to ST pinctrl driver.
ST pin controller GPIO bank can have one of the two possible types of
interrupt-wirings.
First type is via irqmux, single interrupt is used by multiple gpio
banks. This reduces
From: Srinivas Kandagatla
This patch adds interrupt support for STiH415 pin controllers.
Signed-off-by: Srinivas Kandagatla
---
arch/arm/boot/dts/stih415-pinctrl.dtsi | 75
1 files changed, 75 insertions(+), 0 deletions(-)
diff --git
From: Srinivas Kandagatla
ST pin controller does not have hardware support for detecting edge
triggered interrupts, It only has level triggering support.
This patch attempts to fake up edge triggers from hw level trigger
support in software. With this facility now the gpios can be easily used
From: Srinivas Kandagatla
This patch add interrupt support to the pincontroller driver.
ST Pincontroller GPIO bank can have one of the two possible types of
interrupt-wirings.
First type is via irqmux, single interrupt is used by multiple gpio
banks. This reduces number of overall interrupts
From: Srinivas Kandagatla
This patch adds interrupt support for STiH416 pin controllers.
Signed-off-by: Srinivas Kandagatla
---
arch/arm/boot/dts/stih416-pinctrl.dtsi | 81
1 files changed, 81 insertions(+), 0 deletions(-)
diff --git
From: Srinivas Kandagatla
Probe function had commas instead of semi-colons on some of the lines.
This patch just fixes those lines. No functional chagnes done in this
patch.
Signed-off-by: Srinivas Kandagatla
---
drivers/pinctrl/pinctrl-st.c |8
1 files changed, 4 insertions(+),
From: Srinivas Kandagatla
Some of the SOCs hold the IRB IP in softreset state by default.
For this IP to work driver needs to bring it out of softreset.
This patch adds support to reset the IP via reset framework.
Without this patch the driver can not work with SoCs which holds the IP
in
From: Srinivas Kandagatla srinivas.kandaga...@st.com
Some of the SOCs hold the IRB IP in softreset state by default.
For this IP to work driver needs to bring it out of softreset.
This patch adds support to reset the IP via reset framework.
Without this patch the driver can not work with SoCs
From: Srinivas Kandagatla srinivas.kandaga...@st.com
Probe function had commas instead of semi-colons on some of the lines.
This patch just fixes those lines. No functional chagnes done in this
patch.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@st.com
---
drivers/pinctrl/pinctrl-st.c
From: Srinivas Kandagatla srinivas.kandaga...@st.com
This patch adds interrupt support for STiH416 pin controllers.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@st.com
---
arch/arm/boot/dts/stih416-pinctrl.dtsi | 81
1 files changed, 81
From: Srinivas Kandagatla srinivas.kandaga...@st.com
ST pin controller does not have hardware support for detecting edge
triggered interrupts, It only has level triggering support.
This patch attempts to fake up edge triggers from hw level trigger
support in software. With this facility now the
From: Srinivas Kandagatla srinivas.kandaga...@st.com
This patch add interrupt support to the pincontroller driver.
ST Pincontroller GPIO bank can have one of the two possible types of
interrupt-wirings.
First type is via irqmux, single interrupt is used by multiple gpio
banks. This reduces
From: Srinivas Kandagatla srinivas.kandaga...@st.com
Hi Linus W,
This series of patches add interrupt controller support to ST pinctrl driver.
ST pin controller GPIO bank can have one of the two possible types of
interrupt-wirings.
First type is via irqmux, single interrupt is used by multiple
From: Srinivas Kandagatla srinivas.kandaga...@st.com
This patch adds interrupt support for STiH415 pin controllers.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@st.com
---
arch/arm/boot/dts/stih415-pinctrl.dtsi | 75
1 files changed, 75
From: Srinivas Kandagatla
This patch adds ST serial driver (st-asc) and ICPLUS ethernet PHY to
multi_v7_defconfig. All STi based SOCs use ST-ASC as default serial
console, and most of the STi SOC based boards have ICPLUS external
ethernet PHY. These two options makes the system boot nfs root
From: Srinivas Kandagatla srinivas.kandaga...@st.com
This patch adds ST serial driver (st-asc) and ICPLUS ethernet PHY to
multi_v7_defconfig. All STi based SOCs use ST-ASC as default serial
console, and most of the STi SOC based boards have ICPLUS external
ethernet PHY. These two options makes
From: Srinivas Kandagatla
This patch moves hardware setup part of the code in stmmac_open to a new
function stmmac_hw_setup, the reason for doing this is to make hw
initialization independent function so that PM functions can re-use it to
re-initialize the IP after returning from low power
From: Srinivas Kandagatla
This patch adds code to restore default pinstate of the pins when it
comes back from low power state. Without this patch the state of the
pins would be unknown and the driver would not work.
This patch also adds code to put the pins in to sleep state when the
driver
From: Srinivas Kandagatla
This patch promotes stmmac_mdio_reset function from static to
non-static, so that power management functions can decide to reset if
the IP comes out from lowe power state specially hibernation cases.
Signed-off-by: Srinivas Kandagatla
---
From: Srinivas Kandagatla
In PM_SUSPEND_FREEZE and WOL(Wakeup On Lan) case, when the driver gets a
wakeup event, either the driver or platform specific PM code should notify
the pm core about it, so that the system can wakeup from low power.
In cases where there is no involvement of platform
From: Srinivas Kandagatla
The driver PM resume assumes that the IP is still powered up and the
all the register contents are not disturbed when it comes out of low
power suspend case. This assumption is wrong, basically the driver
should not consider any state of registers after it comes out of
From: Srinivas Kandagatla
In hibernation freeze case the driver just releases the resources like
dma buffers, irqs, unregisters the drivers and during restore it does
register, request the resources. This is not really necessary, as part
of power management all the data structures are intact,
From: Srinivas Kandagatla
This patch removes gpio_free for reset line of the phy, driver stores
the gpio number in its private data-structure to use in future. As the
driver uses this pin in future this pin should not be freed.
Signed-off-by: Srinivas Kandagatla
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From: Srinivas Kandagatla
This patch adds support to "max-speed" property which is a standard
ethernet device tree property. max-speed specifies maximum speed
(specified in megabits per second) supported the device.
Depending on the clocking schemes some of the boards can only support
few link
From: Srinivas Kandagatla
This patch moves dma resource allocation to a new function
alloc_dma_desc_resources, the reason for moving this to a new function
is to keep the memory allocations in a separate function. One more reason
it to get suspend and hibernation cases working without releasing
From: Srinivas Kandagatla
Hi Peppe,
During PM_SUSPEND_FREEZE testing, I have noticed that PM support in STMMAC is
partly broken. I had to re-arrange the code to do PM correctly. There were lot
of things I did not like personally and some bits did not work in the first
place. I thought this is
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