On Thu 11 Mar 15:54 CST 2021, Doug Anderson wrote:
> Hi,
>
> On Wed, Mar 10, 2021 at 7:41 PM Roja Rani Yarubandi
> wrote:
> >
> > +_cs0 {
> > + pinconf {
> > + pins = "gpio15";
> > + bias-disable;
> > + };
>
> The "pinconf" / "pinmux" subnode shouldn't
Hi,
On Wed, Mar 10, 2021 at 7:41 PM Roja Rani Yarubandi
wrote:
>
> +_cs0 {
> + pinconf {
> + pins = "gpio15";
> + bias-disable;
> + };
The "pinconf" / "pinmux" subnode shouldn't be used for new SoCs. See:
Add QSPI and QUP SE instances configuration for sc7280.
Signed-off-by: Roja Rani Yarubandi
---
This patch depends on base dtsi and interconnect changes
[1] https://lore.kernel.org/patchwork/project/lkml/list/?series=487403
[2] https://lore.kernel.org/patchwork/project/lkml/list/?series=488429
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