Michal Hocko writes:
> On Tue 15-08-17 09:46:18, Huang, Ying wrote:
>> From: Huang Ying
>>
>> Huge page helps to reduce TLB miss rate, but it has higher cache
>> footprint, sometimes this may cause some issue. For example, when
>> clearing huge page on
Michal Hocko writes:
> On Tue 15-08-17 09:46:18, Huang, Ying wrote:
>> From: Huang Ying
>>
>> Huge page helps to reduce TLB miss rate, but it has higher cache
>> footprint, sometimes this may cause some issue. For example, when
>> clearing huge page on x86_64 platform, the cache footprint is
On Tue 15-08-17 09:46:18, Huang, Ying wrote:
> From: Huang Ying
>
> Huge page helps to reduce TLB miss rate, but it has higher cache
> footprint, sometimes this may cause some issue. For example, when
> clearing huge page on x86_64 platform, the cache footprint is 2M. But
On Tue 15-08-17 09:46:18, Huang, Ying wrote:
> From: Huang Ying
>
> Huge page helps to reduce TLB miss rate, but it has higher cache
> footprint, sometimes this may cause some issue. For example, when
> clearing huge page on x86_64 platform, the cache footprint is 2M. But
> on a Xeon E5 v3
From: Huang Ying
Huge page helps to reduce TLB miss rate, but it has higher cache
footprint, sometimes this may cause some issue. For example, when
clearing huge page on x86_64 platform, the cache footprint is 2M. But
on a Xeon E5 v3 2699 CPU, there are 18 cores, 36
From: Huang Ying
Huge page helps to reduce TLB miss rate, but it has higher cache
footprint, sometimes this may cause some issue. For example, when
clearing huge page on x86_64 platform, the cache footprint is 2M. But
on a Xeon E5 v3 2699 CPU, there are 18 cores, 36 threads, and only 45M
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