Re: [PATCH 0/3] pci: let devices flush DMA to host memory

2007-08-27 Thread akepner
On Mon, Aug 27, 2007 at 04:05:48PM -0600, Grant Grundler wrote: > . > After reading the thread, my take is we need a more elegant way for a > device driver to handle registration of DMA regions allocated by user > space. The API would "make this page/region act like dma_alloc_coherent()". >

Re: [PATCH 0/3] pci: let devices flush DMA to host memory

2007-08-27 Thread Grant Grundler
On Fri, Aug 24, 2007 at 11:02:32AM -0700, [EMAIL PROTECTED] wrote: > > On Altix, DMA may be reordered within the NUMA interconnect. > This can be a problem with Infiniband, where DMA to Completion > Queues can race with data DMA. This patchset allows a driver > to associate a memory region

Re: [PATCH 0/3] pci: let devices flush DMA to host memory

2007-08-27 Thread Grant Grundler
On Fri, Aug 24, 2007 at 11:02:32AM -0700, [EMAIL PROTECTED] wrote: On Altix, DMA may be reordered within the NUMA interconnect. This can be a problem with Infiniband, where DMA to Completion Queues can race with data DMA. This patchset allows a driver to associate a memory region with a

Re: [PATCH 0/3] pci: let devices flush DMA to host memory

2007-08-27 Thread akepner
On Mon, Aug 27, 2007 at 04:05:48PM -0600, Grant Grundler wrote: . After reading the thread, my take is we need a more elegant way for a device driver to handle registration of DMA regions allocated by user space. The API would make this page/region act like dma_alloc_coherent(). That

[PATCH 0/3] pci: let devices flush DMA to host memory

2007-08-24 Thread akepner
On Altix, DMA may be reordered within the NUMA interconnect. This can be a problem with Infiniband, where DMA to Completion Queues can race with data DMA. This patchset allows a driver to associate a memory region with a "dmaflush" attribute, so that writes to the memory region flush

[PATCH 0/3] pci: let devices flush DMA to host memory

2007-08-24 Thread akepner
On Altix, DMA may be reordered within the NUMA interconnect. This can be a problem with Infiniband, where DMA to Completion Queues can race with data DMA. This patchset allows a driver to associate a memory region with a dmaflush attribute, so that writes to the memory region flush in-flight