Re: [PATCH 2/2] dmaengine: bcm2835: Avoid splitting periods into very small chunks

On Mon, Jun 13, 2016 at 10:06:49PM -0700, Eric Anholt wrote: > Matthias Reichl writes: > > > The current cyclic DMA period splitting implementation can generate > > very small chunks at the end of each period. For example a 65536 byte > > period will be split into a 65532 byte

Re: [PATCH 2/2] dmaengine: bcm2835: Avoid splitting periods into very small chunks

On Mon, Jun 13, 2016 at 10:06:49PM -0700, Eric Anholt wrote: > Matthias Reichl writes: > > > The current cyclic DMA period splitting implementation can generate > > very small chunks at the end of each period. For example a 65536 byte > > period will be split into a 65532 byte chunk and a 4 byte

Re: [PATCH 2/2] dmaengine: bcm2835: Avoid splitting periods into very small chunks

Matthias Reichl writes: > The current cyclic DMA period splitting implementation can generate > very small chunks at the end of each period. For example a 65536 byte > period will be split into a 65532 byte chunk and a 4 byte chunk on > the "lite" DMA channels. > > This increases

Re: [PATCH 2/2] dmaengine: bcm2835: Avoid splitting periods into very small chunks

Matthias Reichl writes: > The current cyclic DMA period splitting implementation can generate > very small chunks at the end of each period. For example a 65536 byte > period will be split into a 65532 byte chunk and a 4 byte chunk on > the "lite" DMA channels. > > This increases pressure on the

[PATCH 2/2] dmaengine: bcm2835: Avoid splitting periods into very small chunks

The current cyclic DMA period splitting implementation can generate very small chunks at the end of each period. For example a 65536 byte period will be split into a 65532 byte chunk and a 4 byte chunk on the "lite" DMA channels. This increases pressure on the RAM controller as the DMA controller

[PATCH 2/2] dmaengine: bcm2835: Avoid splitting periods into very small chunks

The current cyclic DMA period splitting implementation can generate very small chunks at the end of each period. For example a 65536 byte period will be split into a 65532 byte chunk and a 4 byte chunk on the "lite" DMA channels. This increases pressure on the RAM controller as the DMA controller