On Thu, 2020-07-23 at 09:24 +0800, Yingjoe Chen wrote:
> On Wed, 2020-07-22 at 20:31 +0800, Qii Wang wrote:
> > Replace 'support_33bits with 'dma_max_support' for DMA mask
> > operation, and replace 'mtk_i2c_set_4g_mode' with 'upper_32_bits'.
>
> This doesn't explain why we need this patch. How
On Wed, 2020-07-22 at 17:38 +0200, Matthias Brugger wrote:
>
> On 22/07/2020 14:31, Qii Wang wrote:
> > Replace 'support_33bits with 'dma_max_support' for DMA mask
> > operation, and replace 'mtk_i2c_set_4g_mode' with 'upper_32_bits'.
>
> Please explain more in detail what you are doing and how
On Wed, 2020-07-22 at 20:31 +0800, Qii Wang wrote:
> Replace 'support_33bits with 'dma_max_support' for DMA mask
> operation, and replace 'mtk_i2c_set_4g_mode' with 'upper_32_bits'.
This doesn't explain why we need this patch. How about:
Newer MTK chip support more than 8GB of dram. Replace
On 22/07/2020 14:31, Qii Wang wrote:
Replace 'support_33bits with 'dma_max_support' for DMA mask
operation, and replace 'mtk_i2c_set_4g_mode' with 'upper_32_bits'.
Please explain more in detail what you are doing and how this fits to the way
the HW works.
Signed-off-by: Qii Wang
---
Replace 'support_33bits with 'dma_max_support' for DMA mask
operation, and replace 'mtk_i2c_set_4g_mode' with 'upper_32_bits'.
Signed-off-by: Qii Wang
---
drivers/i2c/busses/i2c-mt65xx.c | 37 +
1 file changed, 17 insertions(+), 20 deletions(-)
diff --git
5 matches
Mail list logo
