[PATCH 3/4] irqchip/gicv3: Remove disabling redistributor and group1 non-secure interrupts

From: Sudeep Holla As per the GICv3 specification, to power down a processor using GICv3 and allow automatic power-on if an interrupt must be sent to a processor, software must set Enable to zero for all interrupt groups(by writing to GICC_CTLR or ICC_IGRPEN{0,1}_EL1/3 as

[PATCH 3/4] irqchip/gicv3: Remove disabling redistributor and group1 non-secure interrupts

From: Sudeep Holla As per the GICv3 specification, to power down a processor using GICv3 and allow automatic power-on if an interrupt must be sent to a processor, software must set Enable to zero for all interrupt groups(by writing to GICC_CTLR or ICC_IGRPEN{0,1}_EL1/3 as appropriate. When