On Wed, Mar 31, 2021 at 11:06 PM David E. Box
wrote:
>
> From: Gayatri Kammela
>
> Platforms that support low power modes (LPM) such as Tiger Lake maintain
> requirements for each sub-state that a readable in the PMC. However, unlike
> LPM status registers, requirement registers are not memory
Hi,
On 4/1/21 5:05 AM, David E. Box wrote:
> From: Gayatri Kammela
>
> Platforms that support low power modes (LPM) such as Tiger Lake maintain
> requirements for each sub-state that a readable in the PMC. However, unlike
> LPM status registers, requirement registers are not memory mapped but
From: Gayatri Kammela
Platforms that support low power modes (LPM) such as Tiger Lake maintain
requirements for each sub-state that a readable in the PMC. However, unlike
LPM status registers, requirement registers are not memory mapped but are
available from an ACPI _DSM. Collect the
3 matches
Mail list logo
