On 2014-05-22 09:08:20 [-0500], Alan Tull wrote:
> >> - int err, irq;
> >> + int err, irq, i;
> >> =20
> >> irq =3D irq_of_parse_and_map(node, 0);
> >>
> >> Notice spurious =20 and =3D encoding.
> >>
> >> Please resend in ISO8859-1 and take this opportunity to add
> >
> > doesn't "git am" handle
On 2014-05-22 09:08:20 [-0500], Alan Tull wrote:
- int err, irq;
+ int err, irq, i;
=20
irq =3D irq_of_parse_and_map(node, 0);
Notice spurious =20 and =3D encoding.
Please resend in ISO8859-1 and take this opportunity to add
doesn't git am handle this on its own?
Neither
On Thu, May 22, 2014 at 4:42 AM, Sebastian Andrzej Siewior
wrote:
> On 05/16/2014 05:01 PM, Linus Walleij wrote:
>> OK this patch is ACKed by Alan so I would like to apply it but:
>>
>> Content-Type: text/plain; charset=utf-8
>> Content-Disposition: inline
>> Content-Transfer-Encoding:
On 05/16/2014 05:01 PM, Linus Walleij wrote:
> OK this patch is ACKed by Alan so I would like to apply it but:
>
> Content-Type: text/plain; charset=utf-8
> Content-Disposition: inline
> Content-Transfer-Encoding: quoted-printable
>
> This is not good. Quoted-printable makes the raw patch look
On 05/16/2014 05:01 PM, Linus Walleij wrote:
OK this patch is ACKed by Alan so I would like to apply it but:
Content-Type: text/plain; charset=utf-8
Content-Disposition: inline
Content-Transfer-Encoding: quoted-printable
This is not good. Quoted-printable makes the raw patch look like
On Thu, May 22, 2014 at 4:42 AM, Sebastian Andrzej Siewior
bige...@linutronix.de wrote:
On 05/16/2014 05:01 PM, Linus Walleij wrote:
OK this patch is ACKed by Alan so I would like to apply it but:
Content-Type: text/plain; charset=utf-8
Content-Disposition: inline
Content-Transfer-Encoding:
On Wed, Apr 30, 2014 at 1:13 PM, Sebastian Andrzej Siewior
wrote:
> Right new have one irq chip running always in level mode. It would nicer
> to have two irq chips where one is handling level type interrupts and
> the other one is doing edge interrupts. So we can have at runtime two users
>
On Wed, Apr 30, 2014 at 1:13 PM, Sebastian Andrzej Siewior
bige...@linutronix.de wrote:
Right new have one irq chip running always in level mode. It would nicer
to have two irq chips where one is handling level type interrupts and
the other one is doing edge interrupts. So we can have at
On Fri, May 9, 2014 at 6:46 AM, Linus Walleij wrote:
> On Wed, Apr 30, 2014 at 1:13 PM, Sebastian Andrzej Siewior
> wrote:
>
>> Right new have one irq chip running always in level mode. It would nicer
>> to have two irq chips where one is handling level type interrupts and
>> the other one is
On Fri, May 9, 2014 at 6:46 AM, Linus Walleij linus.wall...@linaro.org wrote:
On Wed, Apr 30, 2014 at 1:13 PM, Sebastian Andrzej Siewior
bige...@linutronix.de wrote:
Right new have one irq chip running always in level mode. It would nicer
to have two irq chips where one is handling level type
On Wed, Apr 30, 2014 at 1:13 PM, Sebastian Andrzej Siewior
wrote:
> Right new have one irq chip running always in level mode. It would nicer
> to have two irq chips where one is handling level type interrupts and
> the other one is doing edge interrupts. So we can have at runtime two users
>
On Wed, Apr 30, 2014 at 1:13 PM, Sebastian Andrzej Siewior
bige...@linutronix.de wrote:
Right new have one irq chip running always in level mode. It would nicer
to have two irq chips where one is handling level type interrupts and
the other one is doing edge interrupts. So we can have at
Right new have one irq chip running always in level mode. It would nicer
to have two irq chips where one is handling level type interrupts and
the other one is doing edge interrupts. So we can have at runtime two users
where one is using edge and the other level.
Signed-off-by: Sebastian Andrzej
Right new have one irq chip running always in level mode. It would nicer
to have two irq chips where one is handling level type interrupts and
the other one is doing edge interrupts. So we can have at runtime two users
where one is using edge and the other level.
Signed-off-by: Sebastian Andrzej
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