Re: [PATCH v1] clk: qcom: gdsc: Add support to poll CFG register to check GDSC state

2018-05-04 Thread Taniya Das
Yeah sure Stephen. On 5/5/2018 8:21 AM, Stephen Boyd wrote: Quoting Taniya Das (2018-05-03 02:09:57) Hello Stephen, I have tested the below patch & didn't see any issues. Alright. Thanks! Can I take that as a "Tested-by"? -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc.

Re: [PATCH v1] clk: qcom: gdsc: Add support to poll CFG register to check GDSC state

2018-05-04 Thread Taniya Das
Yeah sure Stephen. On 5/5/2018 8:21 AM, Stephen Boyd wrote: Quoting Taniya Das (2018-05-03 02:09:57) Hello Stephen, I have tested the below patch & didn't see any issues. Alright. Thanks! Can I take that as a "Tested-by"? -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc.

Re: [PATCH v1] clk: qcom: gdsc: Add support to poll CFG register to check GDSC state

2018-05-04 Thread Stephen Boyd
Quoting Taniya Das (2018-05-03 02:09:57) > Hello Stephen, > > I have tested the below patch & didn't see any issues. Alright. Thanks! Can I take that as a "Tested-by"?

Re: [PATCH v1] clk: qcom: gdsc: Add support to poll CFG register to check GDSC state

2018-05-04 Thread Stephen Boyd
Quoting Taniya Das (2018-05-03 02:09:57) > Hello Stephen, > > I have tested the below patch & didn't see any issues. Alright. Thanks! Can I take that as a "Tested-by"?

Re: [PATCH v1] clk: qcom: gdsc: Add support to poll CFG register to check GDSC state

2018-05-03 Thread Taniya Das
Hello Stephen, I have tested the below patch & didn't see any issues. On 5/2/2018 12:27 PM, Stephen Boyd wrote: Quoting Taniya Das (2018-04-30 22:03:33) @@ -45,15 +50,28 @@ #define domain_to_gdsc(domain) container_of(domain, struct gdsc, pd) -static int gdsc_is_enabled(struct gdsc *sc,

Re: [PATCH v1] clk: qcom: gdsc: Add support to poll CFG register to check GDSC state

2018-05-03 Thread Taniya Das
Hello Stephen, I have tested the below patch & didn't see any issues. On 5/2/2018 12:27 PM, Stephen Boyd wrote: Quoting Taniya Das (2018-04-30 22:03:33) @@ -45,15 +50,28 @@ #define domain_to_gdsc(domain) container_of(domain, struct gdsc, pd) -static int gdsc_is_enabled(struct gdsc *sc,

Re: [PATCH v1] clk: qcom: gdsc: Add support to poll CFG register to check GDSC state

2018-05-02 Thread Stephen Boyd
Quoting Taniya Das (2018-04-30 22:03:33) > @@ -45,15 +50,28 @@ > > #define domain_to_gdsc(domain) container_of(domain, struct gdsc, pd) > > -static int gdsc_is_enabled(struct gdsc *sc, unsigned int reg) > +static int gdsc_is_enabled(struct gdsc *sc, bool en) > { > + unsigned int reg; >

Re: [PATCH v1] clk: qcom: gdsc: Add support to poll CFG register to check GDSC state

2018-05-02 Thread Stephen Boyd
Quoting Taniya Das (2018-04-30 22:03:33) > @@ -45,15 +50,28 @@ > > #define domain_to_gdsc(domain) container_of(domain, struct gdsc, pd) > > -static int gdsc_is_enabled(struct gdsc *sc, unsigned int reg) > +static int gdsc_is_enabled(struct gdsc *sc, bool en) > { > + unsigned int reg; >

[PATCH v1] clk: qcom: gdsc: Add support to poll CFG register to check GDSC state

2018-04-30 Thread Taniya Das
From: Amit Nischal The default behavior of the GDSC enable/disable sequence is to poll the status bits of either the actual GDSCR or the corresponding HW_CTRL registers. On targets which have support for a CFG_GDSCR register, the status bits might not show the correct

[PATCH v1] clk: qcom: gdsc: Add support to poll CFG register to check GDSC state

2018-04-30 Thread Taniya Das
From: Amit Nischal The default behavior of the GDSC enable/disable sequence is to poll the status bits of either the actual GDSCR or the corresponding HW_CTRL registers. On targets which have support for a CFG_GDSCR register, the status bits might not show the correct state of the GDSC,