Hi Stafford,
On Mon, Jan 18, 2021 at 10:16 PM Stafford Horne wrote:
> On Mon, Jan 18, 2021 at 01:27:32PM +0100, Geert Uytterhoeven wrote:
> > On Mon, Jan 18, 2021 at 12:43 PM Stafford Horne wrote:
> > > On Thu, Jan 14, 2021 at 02:48:49PM +0100, Geert Uytterhoeven wrote:
> > > > On Thu, Jan 14,
On Mon, Jan 18, 2021 at 01:27:32PM +0100, Geert Uytterhoeven wrote:
> Hi Stafford,
>
> On Mon, Jan 18, 2021 at 12:43 PM Stafford Horne wrote:
> > On Thu, Jan 14, 2021 at 02:48:49PM +0100, Geert Uytterhoeven wrote:
> > > On Thu, Jan 14, 2021 at 3:03 AM Stafford Horne wrote:
> > > > On Mon, Jan
Hi Stafford,
On Mon, Jan 18, 2021 at 12:43 PM Stafford Horne wrote:
> On Thu, Jan 14, 2021 at 02:48:49PM +0100, Geert Uytterhoeven wrote:
> > On Thu, Jan 14, 2021 at 3:03 AM Stafford Horne wrote:
> > > On Mon, Jan 04, 2021 at 05:49:03PM +0100, Geert Uytterhoeven wrote:
> > > > On Mon, Jan 4,
On Thu, Jan 14, 2021 at 02:48:49PM +0100, Geert Uytterhoeven wrote:
> Hi Stafford,
>
> On Thu, Jan 14, 2021 at 3:03 AM Stafford Horne wrote:
> > On Mon, Jan 04, 2021 at 05:49:03PM +0100, Geert Uytterhoeven wrote:
> > > On Mon, Jan 4, 2021 at 5:45 PM Geert Uytterhoeven
> > > wrote:
> > > > Let
Hi Stafford,
On Thu, Jan 14, 2021 at 3:03 AM Stafford Horne wrote:
> On Mon, Jan 04, 2021 at 05:49:03PM +0100, Geert Uytterhoeven wrote:
> > On Mon, Jan 4, 2021 at 5:45 PM Geert Uytterhoeven
> > wrote:
> > > Let the LiteX SoC Controller a register a restart handler, which resets
> > > the
On Mon, Jan 04, 2021 at 05:49:03PM +0100, Geert Uytterhoeven wrote:
> On Mon, Jan 4, 2021 at 5:45 PM Geert Uytterhoeven
> wrote:
> > Let the LiteX SoC Controller a register a restart handler, which resets
> > the LiteX SoC by writing 1 to CSR_CTRL_RESET_ADDR.
> >
> > Signed-off-by: Geert
On Mon, Jan 4, 2021 at 5:45 PM Geert Uytterhoeven wrote:
> Let the LiteX SoC Controller a register a restart handler, which resets
> the LiteX SoC by writing 1 to CSR_CTRL_RESET_ADDR.
>
> Signed-off-by: Geert Uytterhoeven
> ---
> Tested with linux-on-litex-vexriscv.
>
> This patch is based on
Let the LiteX SoC Controller a register a restart handler, which resets
the LiteX SoC by writing 1 to CSR_CTRL_RESET_ADDR.
Signed-off-by: Geert Uytterhoeven
---
Tested with linux-on-litex-vexriscv.
This patch is based on upstream, i.e. not on top of Gabriel Somlo's
"[PATCH v5 0/4]
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