On 23/07/20 01:02, Thomas Gleixner wrote:
>> I am cc'ing Fenghua, who has volunteered to work on this. Addind support
>> for SERIALIZE in sync_core() should not block merging these patches,
>> correct?
> Come on. We are not serving KVM first before making this usable on bare
> metal.
This in the
On Thu, Jul 23, 2020 at 01:02:43AM +0200, Thomas Gleixner wrote:
> Ricardo Neri writes:
> > On Tue, Jul 07, 2020 at 09:36:15AM -0700, Andy Lutomirski wrote:
> >> On Mon, Jul 6, 2020 at 7:21 PM Cathy Zhang wrote:
> >> >
> >> > This instruction gives software a way to force the processor to
Ricardo Neri writes:
> On Tue, Jul 07, 2020 at 09:36:15AM -0700, Andy Lutomirski wrote:
>> On Mon, Jul 6, 2020 at 7:21 PM Cathy Zhang wrote:
>> >
>> > This instruction gives software a way to force the processor to complete
>> > all modifications to flags, registers and memory from previous
On Tue, Jul 07, 2020 at 09:36:15AM -0700, Andy Lutomirski wrote:
> On Mon, Jul 6, 2020 at 7:21 PM Cathy Zhang wrote:
> >
> > This instruction gives software a way to force the processor to complete
> > all modifications to flags, registers and memory from previous instructions
> > and drain all
On Mon, Jul 6, 2020 at 7:21 PM Cathy Zhang wrote:
>
> This instruction gives software a way to force the processor to complete
> all modifications to flags, registers and memory from previous instructions
> and drain all buffered writes to memory before the next instruction is
> fetched and
This instruction gives software a way to force the processor to complete
all modifications to flags, registers and memory from previous instructions
and drain all buffered writes to memory before the next instruction is
fetched and executed.
The same effect can be obtained using the cpuid
6 matches
Mail list logo