On Thu, Jun 08, 2017 at 12:39:20PM -0600, Jason Gunthorpe wrote:
> On Thu, Jun 08, 2017 at 07:22:59PM +0100, Alan Cox wrote:
> > > > > + outb(0x80, 0xCC);
> > > > > +
> > > > > + /* Make sure the above write is completed */
> > > > > + wmb();
> > > >
> > > > Why the wmb(). It
On Thu, Jun 08, 2017 at 12:39:20PM -0600, Jason Gunthorpe wrote:
> On Thu, Jun 08, 2017 at 07:22:59PM +0100, Alan Cox wrote:
> > > > > + outb(0x80, 0xCC);
> > > > > +
> > > > > + /* Make sure the above write is completed */
> > > > > + wmb();
> > > >
> > > > Why the wmb(). It
dd-de...@lists.sourceforge.net; linux-
> ker...@vger.kernel.org; linux-security-mod...@vger.kernel.org
> Subject: Re: [PATCH v3] tpm: Enable CLKRUN protocol for Braswell systems
>
> > For that purpose all that should be required is strong ordering of the
> > outb relative to
g; linux-security-mod...@vger.kernel.org
> Subject: Re: [PATCH v3] tpm: Enable CLKRUN protocol for Braswell systems
>
> > For that purpose all that should be required is strong ordering of the
> > outb relative to the other TPM commands at the LPC interface FIFO. I
> > also think
eforge.net; linux-kernel@vger.kernel.org; linux-
> security-mod...@vger.kernel.org
> Subject: Re: [PATCH v3] tpm: Enable CLKRUN protocol for Braswell systems
>
> > > > + outb(0x80, 0xCC);
> > > > +
> > > > + /* Make sure the above write is complet
.kernel.org; linux-
> security-mod...@vger.kernel.org
> Subject: Re: [PATCH v3] tpm: Enable CLKRUN protocol for Braswell systems
>
> > > > + outb(0x80, 0xCC);
> > > > +
> > > > + /* Make sure the above write is completed */
> > > > +
> For that purpose all that should be required is strong ordering of the
> outb relative to the other TPM commands at the LPC interface FIFO. I
> also think the wmb is not needed because outb is already defined to be
> strongly in order with respect to writel/readl ?
That's my assumption but
> For that purpose all that should be required is strong ordering of the
> outb relative to the other TPM commands at the LPC interface FIFO. I
> also think the wmb is not needed because outb is already defined to be
> strongly in order with respect to writel/readl ?
That's my assumption but
On Thu, Jun 08, 2017 at 07:22:59PM +0100, Alan Cox wrote:
> > > > + outb(0x80, 0xCC);
> > > > +
> > > > + /* Make sure the above write is completed */
> > > > + wmb();
> > >
> > > Why the wmb(). It doesn't do what the comment says! Also this code is x86
> > > specific
> > >
>
On Thu, Jun 08, 2017 at 07:22:59PM +0100, Alan Cox wrote:
> > > > + outb(0x80, 0xCC);
> > > > +
> > > > + /* Make sure the above write is completed */
> > > > + wmb();
> > >
> > > Why the wmb(). It doesn't do what the comment says! Also this code is x86
> > > specific
> > >
>
> > > + outb(0x80, 0xCC);
> > > +
> > > + /* Make sure the above write is completed */
> > > + wmb();
> >
> > Why the wmb(). It doesn't do what the comment says! Also this code is x86
> > specific
> >
> >
>
> Memory barrier to enforce the order so that the outb() is completed, which
>
> > > + outb(0x80, 0xCC);
> > > +
> > > + /* Make sure the above write is completed */
> > > + wmb();
> >
> > Why the wmb(). It doesn't do what the comment says! Also this code is x86
> > specific
> >
> >
>
> Memory barrier to enforce the order so that the outb() is completed, which
>
: jarkko.sakki...@linux.intel.com; jguntho...@obsidianresearch.com;
> > tpmdd-de...@lists.sourceforge.net; linux-kernel@vger.kernel.org; linux-
> > security-mod...@vger.kernel.org
> > Subject: Re: [PATCH v3] tpm: Enable CLKRUN protocol for Braswell systems
> >
> > > +
com; jguntho...@obsidianresearch.com;
> > tpmdd-de...@lists.sourceforge.net; linux-kernel@vger.kernel.org; linux-
> > security-mod...@vger.kernel.org
> > Subject: Re: [PATCH v3] tpm: Enable CLKRUN protocol for Braswell systems
> >
> > > +++ b/drivers/char/tpm/tpm_tis.c
&
eforge.net; linux-kernel@vger.kernel.org; linux-
> security-mod...@vger.kernel.org
> Subject: Re: [PATCH v3] tpm: Enable CLKRUN protocol for Braswell systems
>
> > +++ b/drivers/char/tpm/tpm_tis.c
> > @@ -89,13 +89,89 @@ static inline int is_itpm(struct acpi_device *dev)
> > } #
.kernel.org; linux-
> security-mod...@vger.kernel.org
> Subject: Re: [PATCH v3] tpm: Enable CLKRUN protocol for Braswell systems
>
> > +++ b/drivers/char/tpm/tpm_tis.c
> > @@ -89,13 +89,89 @@ static inline int is_itpm(struct acpi_device *dev)
> > } #endif
> >
> &g
> +++ b/drivers/char/tpm/tpm_tis.c
> @@ -89,13 +89,89 @@ static inline int is_itpm(struct acpi_device *dev)
> }
> #endif
>
> +#ifdef CONFIG_X86
> +static inline bool is_bsw(void)
> +{
> + return ((boot_cpu_data.x86_model == INTEL_FAM6_ATOM_AIRMONT) ? 1 : 0);
> +}
> +#else
> +static inline
> +++ b/drivers/char/tpm/tpm_tis.c
> @@ -89,13 +89,89 @@ static inline int is_itpm(struct acpi_device *dev)
> }
> #endif
>
> +#ifdef CONFIG_X86
> +static inline bool is_bsw(void)
> +{
> + return ((boot_cpu_data.x86_model == INTEL_FAM6_ATOM_AIRMONT) ? 1 : 0);
> +}
> +#else
> +static inline
To overcome a hardware limitation on Intel Braswell systems,
disable CLKRUN protocol during TPM transactions and re-enable
once the transaction is completed.
Signed-off-by: Azhar Shaikh
---
Changes from v1:
- Add CONFIG_X86 around disable_lpc_clk_run () and
To overcome a hardware limitation on Intel Braswell systems,
disable CLKRUN protocol during TPM transactions and re-enable
once the transaction is completed.
Signed-off-by: Azhar Shaikh
---
Changes from v1:
- Add CONFIG_X86 around disable_lpc_clk_run () and enable_lpc_clk_run() to avoid
- build
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