On Sat, 2020-10-24 at 22:35 +0100, David Woodhouse wrote:
> Fix the conditions for enabling x2apic on guests without interrupt
> remapping, and support 15-bit Extended Destination ID to allow 32768
> CPUs without IR on hypervisors that support it.
>
> Make the I/OAPIC code generate its RTE
Fix the conditions for enabling x2apic on guests without interrupt
remapping, and support 15-bit Extended Destination ID to allow 32768
CPUs without IR on hypervisors that support it.
Make the I/OAPIC code generate its RTE directly from the MSI message
created by the parent irqchip, and fix
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