Re: [PATCH v3 06/11] x86/mm: Rework lazy TLB mode and TLB freshness tracking

2017-07-27 Thread Andy Lutomirski
> On Jul 27, 2017, at 3:53 PM, Andrew Banman wrote: > >> On Thu, Jun 22, 2017 at 10:47:29AM -0700, Andy Lutomirski wrote: >>> On Thu, Jun 22, 2017 at 7:50 AM, Borislav Petkov wrote: On Tue, Jun 20, 2017 at 10:22:12PM -0700, Andy Lutomirski wrote:

Re: [PATCH v3 06/11] x86/mm: Rework lazy TLB mode and TLB freshness tracking

2017-07-27 Thread Andy Lutomirski
> On Jul 27, 2017, at 3:53 PM, Andrew Banman wrote: > >> On Thu, Jun 22, 2017 at 10:47:29AM -0700, Andy Lutomirski wrote: >>> On Thu, Jun 22, 2017 at 7:50 AM, Borislav Petkov wrote: On Tue, Jun 20, 2017 at 10:22:12PM -0700, Andy Lutomirski wrote: Rewrite it entirely. When we enter

Re: [PATCH v3 06/11] x86/mm: Rework lazy TLB mode and TLB freshness tracking

2017-07-27 Thread Andrew Banman
On Thu, Jun 22, 2017 at 10:47:29AM -0700, Andy Lutomirski wrote: > On Thu, Jun 22, 2017 at 7:50 AM, Borislav Petkov wrote: > > On Tue, Jun 20, 2017 at 10:22:12PM -0700, Andy Lutomirski wrote: > >> Rewrite it entirely. When we enter lazy mode, we simply remove the > >> cpu from

Re: [PATCH v3 06/11] x86/mm: Rework lazy TLB mode and TLB freshness tracking

2017-07-27 Thread Andrew Banman
On Thu, Jun 22, 2017 at 10:47:29AM -0700, Andy Lutomirski wrote: > On Thu, Jun 22, 2017 at 7:50 AM, Borislav Petkov wrote: > > On Tue, Jun 20, 2017 at 10:22:12PM -0700, Andy Lutomirski wrote: > >> Rewrite it entirely. When we enter lazy mode, we simply remove the > >> cpu from mm_cpumask. This

Re: [PATCH v3 06/11] x86/mm: Rework lazy TLB mode and TLB freshness tracking

2017-06-23 Thread Andy Lutomirski
On Fri, Jun 23, 2017 at 6:34 AM, Boris Ostrovsky wrote: > >> diff --git a/arch/x86/xen/mmu_pv.c b/arch/x86/xen/mmu_pv.c >> index 1d7a7213a310..f5df56fb8b5c 100644 >> --- a/arch/x86/xen/mmu_pv.c >> +++ b/arch/x86/xen/mmu_pv.c >> @@ -1005,8 +1005,7 @@ static void

Re: [PATCH v3 06/11] x86/mm: Rework lazy TLB mode and TLB freshness tracking

2017-06-23 Thread Andy Lutomirski
On Fri, Jun 23, 2017 at 6:34 AM, Boris Ostrovsky wrote: > >> diff --git a/arch/x86/xen/mmu_pv.c b/arch/x86/xen/mmu_pv.c >> index 1d7a7213a310..f5df56fb8b5c 100644 >> --- a/arch/x86/xen/mmu_pv.c >> +++ b/arch/x86/xen/mmu_pv.c >> @@ -1005,8 +1005,7 @@ static void xen_drop_mm_ref(struct mm_struct

Re: [PATCH v3 06/11] x86/mm: Rework lazy TLB mode and TLB freshness tracking

2017-06-23 Thread Boris Ostrovsky
diff --git a/arch/x86/xen/mmu_pv.c b/arch/x86/xen/mmu_pv.c index 1d7a7213a310..f5df56fb8b5c 100644 --- a/arch/x86/xen/mmu_pv.c +++ b/arch/x86/xen/mmu_pv.c @@ -1005,8 +1005,7 @@ static void xen_drop_mm_ref(struct mm_struct *mm) /* Get the "official" set of cpus referring to our

Re: [PATCH v3 06/11] x86/mm: Rework lazy TLB mode and TLB freshness tracking

2017-06-23 Thread Boris Ostrovsky
diff --git a/arch/x86/xen/mmu_pv.c b/arch/x86/xen/mmu_pv.c index 1d7a7213a310..f5df56fb8b5c 100644 --- a/arch/x86/xen/mmu_pv.c +++ b/arch/x86/xen/mmu_pv.c @@ -1005,8 +1005,7 @@ static void xen_drop_mm_ref(struct mm_struct *mm) /* Get the "official" set of cpus referring to our

Re: [PATCH v3 06/11] x86/mm: Rework lazy TLB mode and TLB freshness tracking

2017-06-22 Thread Borislav Petkov
On Thu, Jun 22, 2017 at 10:47:29AM -0700, Andy Lutomirski wrote: > I figured that some future reader of this patch might actually want to > see this text, though. Oh, don't get me wrong: with commit messages more is more, in the general case. That's why I said "if". > >> The UV tlbflush code is

Re: [PATCH v3 06/11] x86/mm: Rework lazy TLB mode and TLB freshness tracking

2017-06-22 Thread Borislav Petkov
On Thu, Jun 22, 2017 at 10:47:29AM -0700, Andy Lutomirski wrote: > I figured that some future reader of this patch might actually want to > see this text, though. Oh, don't get me wrong: with commit messages more is more, in the general case. That's why I said "if". > >> The UV tlbflush code is

Re: [PATCH v3 06/11] x86/mm: Rework lazy TLB mode and TLB freshness tracking

2017-06-22 Thread Andy Lutomirski
On Thu, Jun 22, 2017 at 7:50 AM, Borislav Petkov wrote: > On Tue, Jun 20, 2017 at 10:22:12PM -0700, Andy Lutomirski wrote: >> Rewrite it entirely. When we enter lazy mode, we simply remove the >> cpu from mm_cpumask. This means that we need a way to figure out > > s/cpu/CPU/

Re: [PATCH v3 06/11] x86/mm: Rework lazy TLB mode and TLB freshness tracking

2017-06-22 Thread Andy Lutomirski
On Thu, Jun 22, 2017 at 7:50 AM, Borislav Petkov wrote: > On Tue, Jun 20, 2017 at 10:22:12PM -0700, Andy Lutomirski wrote: >> Rewrite it entirely. When we enter lazy mode, we simply remove the >> cpu from mm_cpumask. This means that we need a way to figure out > > s/cpu/CPU/ Done. > >>

Re: [PATCH v3 06/11] x86/mm: Rework lazy TLB mode and TLB freshness tracking

2017-06-22 Thread Borislav Petkov
On Tue, Jun 20, 2017 at 10:22:12PM -0700, Andy Lutomirski wrote: > x86's lazy TLB mode used to be fairly weak -- it would switch to > init_mm the first time it tried to flush a lazy TLB. This meant an > unnecessary CR3 write and, if the flush was remote, an unnecessary > IPI. > > Rewrite it

Re: [PATCH v3 06/11] x86/mm: Rework lazy TLB mode and TLB freshness tracking

2017-06-22 Thread Borislav Petkov
On Tue, Jun 20, 2017 at 10:22:12PM -0700, Andy Lutomirski wrote: > x86's lazy TLB mode used to be fairly weak -- it would switch to > init_mm the first time it tried to flush a lazy TLB. This meant an > unnecessary CR3 write and, if the flush was remote, an unnecessary > IPI. > > Rewrite it

Re: [PATCH v3 06/11] x86/mm: Rework lazy TLB mode and TLB freshness tracking

2017-06-21 Thread Borislav Petkov
On Wed, Jun 21, 2017 at 09:04:48AM -0700, Andy Lutomirski wrote: > I'll look at the end of the whole series and see if I can come up with > something good. ... along with the logic what we flush when, please. I.e., the text in struct flush_tlb_info. Thanks. -- Regards/Gruss, Boris. Good

Re: [PATCH v3 06/11] x86/mm: Rework lazy TLB mode and TLB freshness tracking

2017-06-21 Thread Borislav Petkov
On Wed, Jun 21, 2017 at 09:04:48AM -0700, Andy Lutomirski wrote: > I'll look at the end of the whole series and see if I can come up with > something good. ... along with the logic what we flush when, please. I.e., the text in struct flush_tlb_info. Thanks. -- Regards/Gruss, Boris. Good

Re: [PATCH v3 06/11] x86/mm: Rework lazy TLB mode and TLB freshness tracking

2017-06-21 Thread Andy Lutomirski
On Wed, Jun 21, 2017 at 2:01 AM, Thomas Gleixner wrote: > On Tue, 20 Jun 2017, Andy Lutomirski wrote: >> -/* >> - * The flush IPI assumes that a thread switch happens in this order: >> - * [cpu0: the cpu that switches] >> - * 1) switch_mm() either 1a) or 1b) >> - * 1a) thread

Re: [PATCH v3 06/11] x86/mm: Rework lazy TLB mode and TLB freshness tracking

2017-06-21 Thread Andy Lutomirski
On Wed, Jun 21, 2017 at 2:01 AM, Thomas Gleixner wrote: > On Tue, 20 Jun 2017, Andy Lutomirski wrote: >> -/* >> - * The flush IPI assumes that a thread switch happens in this order: >> - * [cpu0: the cpu that switches] >> - * 1) switch_mm() either 1a) or 1b) >> - * 1a) thread switch to a

Re: [PATCH v3 06/11] x86/mm: Rework lazy TLB mode and TLB freshness tracking

2017-06-21 Thread Thomas Gleixner
On Tue, 20 Jun 2017, Andy Lutomirski wrote: > -/* > - * The flush IPI assumes that a thread switch happens in this order: > - * [cpu0: the cpu that switches] > - * 1) switch_mm() either 1a) or 1b) > - * 1a) thread switch to a different mm > - * 1a1) set cpu_tlbstate to TLBSTATE_OK > - * Now the

Re: [PATCH v3 06/11] x86/mm: Rework lazy TLB mode and TLB freshness tracking

2017-06-21 Thread Thomas Gleixner
On Tue, 20 Jun 2017, Andy Lutomirski wrote: > -/* > - * The flush IPI assumes that a thread switch happens in this order: > - * [cpu0: the cpu that switches] > - * 1) switch_mm() either 1a) or 1b) > - * 1a) thread switch to a different mm > - * 1a1) set cpu_tlbstate to TLBSTATE_OK > - * Now the

[PATCH v3 06/11] x86/mm: Rework lazy TLB mode and TLB freshness tracking

2017-06-20 Thread Andy Lutomirski
x86's lazy TLB mode used to be fairly weak -- it would switch to init_mm the first time it tried to flush a lazy TLB. This meant an unnecessary CR3 write and, if the flush was remote, an unnecessary IPI. Rewrite it entirely. When we enter lazy mode, we simply remove the cpu from mm_cpumask.

[PATCH v3 06/11] x86/mm: Rework lazy TLB mode and TLB freshness tracking

2017-06-20 Thread Andy Lutomirski
x86's lazy TLB mode used to be fairly weak -- it would switch to init_mm the first time it tried to flush a lazy TLB. This meant an unnecessary CR3 write and, if the flush was remote, an unnecessary IPI. Rewrite it entirely. When we enter lazy mode, we simply remove the cpu from mm_cpumask.