[PATCH v4 7/9] arm64: Introduce raw_{d,i}cache_line_size

2016-09-09 Thread Suzuki K Poulose
On systems with mismatched i/d cache min line sizes, we need to use the smallest size possible across all CPUs. This will be done by fetching the system wide safe value from CPU feature infrastructure. However the some special users(e.g kexec, hibernate) would need the line size on the CPU (rather

[PATCH v4 7/9] arm64: Introduce raw_{d,i}cache_line_size

2016-09-09 Thread Suzuki K Poulose
On systems with mismatched i/d cache min line sizes, we need to use the smallest size possible across all CPUs. This will be done by fetching the system wide safe value from CPU feature infrastructure. However the some special users(e.g kexec, hibernate) would need the line size on the CPU (rather