[PATCH v4 9/9] arm64: Work around systems with mismatched cache line sizes

2016-09-09 Thread Suzuki K Poulose
Systems with differing CPU i-cache/d-cache line sizes can cause problems with the cache management by software when the execution is migrated from one to another. Usually, the application reads the cache size on a CPU and then uses that length to perform cache operations. However, if it gets

[PATCH v4 9/9] arm64: Work around systems with mismatched cache line sizes

2016-09-09 Thread Suzuki K Poulose
Systems with differing CPU i-cache/d-cache line sizes can cause problems with the cache management by software when the execution is migrated from one to another. Usually, the application reads the cache size on a CPU and then uses that length to perform cache operations. However, if it gets