Re: [PATCH v5 1/3] PCI: altera: Add Stratix 10 PCIe support

2019-02-27 Thread Ley Foon Tan
On Wed, 2019-02-27 at 17:38 +, Lorenzo Pieralisi wrote: > On Tue, Feb 26, 2019 at 05:15:46PM +0800, Ley Foon Tan wrote: > > > > Add PCIe Root Port support for Stratix 10 device. > > > > Main differences compare with PCIe Root Port IP on Cyclone V > > and Arria 10 devices: > > > > - HIP

Re: [PATCH v5 1/3] PCI: altera: Add Stratix 10 PCIe support

2019-02-27 Thread Lorenzo Pieralisi
On Tue, Feb 26, 2019 at 05:15:46PM +0800, Ley Foon Tan wrote: > Add PCIe Root Port support for Stratix 10 device. > > Main differences compare with PCIe Root Port IP on Cyclone V > and Arria 10 devices: > > - HIP interface to access Root Port configuration register. > - TLP programming flow: >

[PATCH v5 1/3] PCI: altera: Add Stratix 10 PCIe support

2019-02-26 Thread Ley Foon Tan
Add PCIe Root Port support for Stratix 10 device. Main differences compare with PCIe Root Port IP on Cyclone V and Arria 10 devices: - HIP interface to access Root Port configuration register. - TLP programming flow: - One REG0 register - Don't need to check alignment Signed-off-by: Ley