Re: [PATCH v6 2/9] PCI: mediatek: Fixup class ID for MT7622 as PCI_CLASS_BRIDGE_PCI

2018-10-15 Thread Bjorn Helgaas
On Mon, Oct 15, 2018 at 10:42:23AM +0800, Honghui Zhang wrote: > On Fri, 2018-10-12 at 09:12 -0500, Bjorn Helgaas wrote: > > On Fri, Oct 12, 2018 at 11:22:30AM +0100, Lorenzo Pieralisi wrote: > > > On Fri, Oct 12, 2018 at 04:01:29PM +0800, Honghui Zhang wrote: > > >> On Thu, 2018-10-11 at 12:38

Re: [PATCH v6 2/9] PCI: mediatek: Fixup class ID for MT7622 as PCI_CLASS_BRIDGE_PCI

2018-10-15 Thread Bjorn Helgaas
On Mon, Oct 15, 2018 at 10:42:23AM +0800, Honghui Zhang wrote: > On Fri, 2018-10-12 at 09:12 -0500, Bjorn Helgaas wrote: > > On Fri, Oct 12, 2018 at 11:22:30AM +0100, Lorenzo Pieralisi wrote: > > > On Fri, Oct 12, 2018 at 04:01:29PM +0800, Honghui Zhang wrote: > > >> On Thu, 2018-10-11 at 12:38

Re: [PATCH v6 2/9] PCI: mediatek: Fixup class ID for MT7622 as PCI_CLASS_BRIDGE_PCI

2018-10-14 Thread Honghui Zhang
On Fri, 2018-10-12 at 09:12 -0500, Bjorn Helgaas wrote: > On Fri, Oct 12, 2018 at 11:22:30AM +0100, Lorenzo Pieralisi wrote: > > On Fri, Oct 12, 2018 at 04:01:29PM +0800, Honghui Zhang wrote: > >> On Thu, 2018-10-11 at 12:38 +0100, Lorenzo Pieralisi wrote: > >>> On Tue, Oct 09, 2018 at 11:08:15AM

Re: [PATCH v6 2/9] PCI: mediatek: Fixup class ID for MT7622 as PCI_CLASS_BRIDGE_PCI

2018-10-14 Thread Honghui Zhang
On Fri, 2018-10-12 at 09:12 -0500, Bjorn Helgaas wrote: > On Fri, Oct 12, 2018 at 11:22:30AM +0100, Lorenzo Pieralisi wrote: > > On Fri, Oct 12, 2018 at 04:01:29PM +0800, Honghui Zhang wrote: > >> On Thu, 2018-10-11 at 12:38 +0100, Lorenzo Pieralisi wrote: > >>> On Tue, Oct 09, 2018 at 11:08:15AM

Re: [PATCH v6 2/9] PCI: mediatek: Fixup class ID for MT7622 as PCI_CLASS_BRIDGE_PCI

2018-10-14 Thread Honghui Zhang
On Fri, 2018-10-12 at 11:22 +0100, Lorenzo Pieralisi wrote: > On Fri, Oct 12, 2018 at 04:01:29PM +0800, Honghui Zhang wrote: > > On Thu, 2018-10-11 at 12:38 +0100, Lorenzo Pieralisi wrote: > > > On Tue, Oct 09, 2018 at 11:08:15AM +0800, Honghui Zhang wrote: > > > > On Mon, 2018-10-08 at 18:23

Re: [PATCH v6 2/9] PCI: mediatek: Fixup class ID for MT7622 as PCI_CLASS_BRIDGE_PCI

2018-10-14 Thread Honghui Zhang
On Fri, 2018-10-12 at 11:22 +0100, Lorenzo Pieralisi wrote: > On Fri, Oct 12, 2018 at 04:01:29PM +0800, Honghui Zhang wrote: > > On Thu, 2018-10-11 at 12:38 +0100, Lorenzo Pieralisi wrote: > > > On Tue, Oct 09, 2018 at 11:08:15AM +0800, Honghui Zhang wrote: > > > > On Mon, 2018-10-08 at 18:23

Re: [PATCH v6 2/9] PCI: mediatek: Fixup class ID for MT7622 as PCI_CLASS_BRIDGE_PCI

2018-10-12 Thread Bjorn Helgaas
On Fri, Oct 12, 2018 at 11:22:30AM +0100, Lorenzo Pieralisi wrote: > On Fri, Oct 12, 2018 at 04:01:29PM +0800, Honghui Zhang wrote: >> On Thu, 2018-10-11 at 12:38 +0100, Lorenzo Pieralisi wrote: >>> On Tue, Oct 09, 2018 at 11:08:15AM +0800, Honghui Zhang wrote: On Mon, 2018-10-08 at 18:23

Re: [PATCH v6 2/9] PCI: mediatek: Fixup class ID for MT7622 as PCI_CLASS_BRIDGE_PCI

2018-10-12 Thread Bjorn Helgaas
On Fri, Oct 12, 2018 at 11:22:30AM +0100, Lorenzo Pieralisi wrote: > On Fri, Oct 12, 2018 at 04:01:29PM +0800, Honghui Zhang wrote: >> On Thu, 2018-10-11 at 12:38 +0100, Lorenzo Pieralisi wrote: >>> On Tue, Oct 09, 2018 at 11:08:15AM +0800, Honghui Zhang wrote: On Mon, 2018-10-08 at 18:23

Re: [PATCH v6 2/9] PCI: mediatek: Fixup class ID for MT7622 as PCI_CLASS_BRIDGE_PCI

2018-10-12 Thread Lorenzo Pieralisi
On Fri, Oct 12, 2018 at 04:01:29PM +0800, Honghui Zhang wrote: > On Thu, 2018-10-11 at 12:38 +0100, Lorenzo Pieralisi wrote: > > On Tue, Oct 09, 2018 at 11:08:15AM +0800, Honghui Zhang wrote: > > > On Mon, 2018-10-08 at 18:23 +0100, Lorenzo Pieralisi wrote: > > > > On Mon, Oct 08, 2018 at

Re: [PATCH v6 2/9] PCI: mediatek: Fixup class ID for MT7622 as PCI_CLASS_BRIDGE_PCI

2018-10-12 Thread Lorenzo Pieralisi
On Fri, Oct 12, 2018 at 04:01:29PM +0800, Honghui Zhang wrote: > On Thu, 2018-10-11 at 12:38 +0100, Lorenzo Pieralisi wrote: > > On Tue, Oct 09, 2018 at 11:08:15AM +0800, Honghui Zhang wrote: > > > On Mon, 2018-10-08 at 18:23 +0100, Lorenzo Pieralisi wrote: > > > > On Mon, Oct 08, 2018 at

Re: [PATCH v6 2/9] PCI: mediatek: Fixup class ID for MT7622 as PCI_CLASS_BRIDGE_PCI

2018-10-12 Thread Honghui Zhang
On Thu, 2018-10-11 at 12:38 +0100, Lorenzo Pieralisi wrote: > On Tue, Oct 09, 2018 at 11:08:15AM +0800, Honghui Zhang wrote: > > On Mon, 2018-10-08 at 18:23 +0100, Lorenzo Pieralisi wrote: > > > On Mon, Oct 08, 2018 at 11:24:41AM +0800, honghui.zh...@mediatek.com > > > wrote: > > > > From:

Re: [PATCH v6 2/9] PCI: mediatek: Fixup class ID for MT7622 as PCI_CLASS_BRIDGE_PCI

2018-10-12 Thread Honghui Zhang
On Thu, 2018-10-11 at 12:38 +0100, Lorenzo Pieralisi wrote: > On Tue, Oct 09, 2018 at 11:08:15AM +0800, Honghui Zhang wrote: > > On Mon, 2018-10-08 at 18:23 +0100, Lorenzo Pieralisi wrote: > > > On Mon, Oct 08, 2018 at 11:24:41AM +0800, honghui.zh...@mediatek.com > > > wrote: > > > > From:

Re: [PATCH v6 2/9] PCI: mediatek: Fixup class ID for MT7622 as PCI_CLASS_BRIDGE_PCI

2018-10-11 Thread Lorenzo Pieralisi
On Tue, Oct 09, 2018 at 11:08:15AM +0800, Honghui Zhang wrote: > On Mon, 2018-10-08 at 18:23 +0100, Lorenzo Pieralisi wrote: > > On Mon, Oct 08, 2018 at 11:24:41AM +0800, honghui.zh...@mediatek.com wrote: > > > From: Honghui Zhang > > > > > > The PCIe controller of MT7622 has TYPE 1

Re: [PATCH v6 2/9] PCI: mediatek: Fixup class ID for MT7622 as PCI_CLASS_BRIDGE_PCI

2018-10-11 Thread Lorenzo Pieralisi
On Tue, Oct 09, 2018 at 11:08:15AM +0800, Honghui Zhang wrote: > On Mon, 2018-10-08 at 18:23 +0100, Lorenzo Pieralisi wrote: > > On Mon, Oct 08, 2018 at 11:24:41AM +0800, honghui.zh...@mediatek.com wrote: > > > From: Honghui Zhang > > > > > > The PCIe controller of MT7622 has TYPE 1

Re: [PATCH v6 2/9] PCI: mediatek: Fixup class ID for MT7622 as PCI_CLASS_BRIDGE_PCI

2018-10-08 Thread Honghui Zhang
On Mon, 2018-10-08 at 18:23 +0100, Lorenzo Pieralisi wrote: > On Mon, Oct 08, 2018 at 11:24:41AM +0800, honghui.zh...@mediatek.com wrote: > > From: Honghui Zhang > > > > The PCIe controller of MT7622 has TYPE 1 configuration space type, but > > the HW default class type values is invalid. > > >

Re: [PATCH v6 2/9] PCI: mediatek: Fixup class ID for MT7622 as PCI_CLASS_BRIDGE_PCI

2018-10-08 Thread Honghui Zhang
On Mon, 2018-10-08 at 18:23 +0100, Lorenzo Pieralisi wrote: > On Mon, Oct 08, 2018 at 11:24:41AM +0800, honghui.zh...@mediatek.com wrote: > > From: Honghui Zhang > > > > The PCIe controller of MT7622 has TYPE 1 configuration space type, but > > the HW default class type values is invalid. > > >

Re: [PATCH v6 2/9] PCI: mediatek: Fixup class ID for MT7622 as PCI_CLASS_BRIDGE_PCI

2018-10-08 Thread Lorenzo Pieralisi
On Mon, Oct 08, 2018 at 11:24:41AM +0800, honghui.zh...@mediatek.com wrote: > From: Honghui Zhang > > The PCIe controller of MT7622 has TYPE 1 configuration space type, but > the HW default class type values is invalid. > > The commit 101c92dc80c8 ("PCI: mediatek: Set up vendor ID and class >

Re: [PATCH v6 2/9] PCI: mediatek: Fixup class ID for MT7622 as PCI_CLASS_BRIDGE_PCI

2018-10-08 Thread Lorenzo Pieralisi
On Mon, Oct 08, 2018 at 11:24:41AM +0800, honghui.zh...@mediatek.com wrote: > From: Honghui Zhang > > The PCIe controller of MT7622 has TYPE 1 configuration space type, but > the HW default class type values is invalid. > > The commit 101c92dc80c8 ("PCI: mediatek: Set up vendor ID and class >

[PATCH v6 2/9] PCI: mediatek: Fixup class ID for MT7622 as PCI_CLASS_BRIDGE_PCI

2018-10-07 Thread honghui.zhang
From: Honghui Zhang The PCIe controller of MT7622 has TYPE 1 configuration space type, but the HW default class type values is invalid. The commit 101c92dc80c8 ("PCI: mediatek: Set up vendor ID and class type for MT7622") have set the class ID for MT7622 as PCI_CLASS_BRIDGE_HOST, but it's not

[PATCH v6 2/9] PCI: mediatek: Fixup class ID for MT7622 as PCI_CLASS_BRIDGE_PCI

2018-10-07 Thread honghui.zhang
From: Honghui Zhang The PCIe controller of MT7622 has TYPE 1 configuration space type, but the HW default class type values is invalid. The commit 101c92dc80c8 ("PCI: mediatek: Set up vendor ID and class type for MT7622") have set the class ID for MT7622 as PCI_CLASS_BRIDGE_HOST, but it's not